NCS2553DGEVB_SCHEMATIC.PDF

5
4
3
2
1
NCS2553
Inputs
Outputs
D
D
J1
C1
5
4
3
2
1
R5
75
SD IN1
0.1u
75
0
C2
5
4
3
2
1
J4
C5
5
4
3
2
1
220u
R6
75
1
2
3
4
0.1u
R2
8
7
6
5
IN1 IN6
IN2 IN5
IN3 IN4
Vcc GND
75
5
4
3
2
1
220u
J3
0
C3
R7
75
0.1u
R3
C9
75
0
C7
J6
5
4
3
2
1
220u
J8
GND
0.1u
C8
SD IN3
C
SD OUT2
0
5
4
3
2
1
J5
C6
NCS2553
SD IN2
SD OUT1
0
U1
J2
C
R1
0
0
SD OUT3
2
1
1
2
10u
0
B
0
J7
Vcc
Standoffs
J11
J10
NC
NC
J12
J13
Test Point
B
TP1
GND
Power Supply
0
NC
NC
A
A
ON Semiconductor
Title
NCS2553 Evaluation Board
Size
A
Date:
5
4
3
Document Number
NCS2553DGEVB
Thursday, November 11, 2010
2
Rev
A
Sheet
1
of
1
1

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