Test Procedure for the NCV7471A5V1GEVB Evaluation Board Required Equipment Oscilloscope with digital inputs Bench Power Supply Voltmeter Signal Generator (SPI capable) NCV7471 Evaluation Board, 250 mA version 2/17/2014 1 www.onsemi.com Test procedure Step 1 (Power-up sequence, Normal mode, Boost-buck operation): 1. 2. 3. 4. 5. Connect the setup as shown above, but without VOUT load; SWDM and CFG soldering straps have to be in “+” position Set VS_VOUT2 to “VMID” position Apply an input voltage, VBAT = 12 V, current capability min. 1.5 A Check VOUT, LIN1, LIN2, CANH, CANL, RxDL1, RxDL2, RxDC, RSTN, INTN and UVN_ VOUT State Check IBAT. Table 1: Desired Results IBAT < 20 mA VOUT = ON LIN1/2 = RECESSIVE CANH, CANL = RECESSIVE RxDL1/2 = HIGH RxDC = HIGH RSTN = HIGH (LED_RSTN = off) INTN = HIGH (LED_INTN = off) UVN_VOUT = HIGH (LED_UVN = off) Test procedure Step 2 (Boost-buck converter function): 1. 2. 3. 4. 5. Connect load to VOUT (500 mA, depending on assembly option) Alternate , VBAT voltage in full operating range (3.3 – 28 V or 2.5 – 28 V) Check VOUT, RSTN, INTN and UVN_VOUT State Check IBAT. Set input voltage to initial value, VBAT = 12 V Table 2: Desired Results IBAT should decrease with increasing VBAT VOUT ON RSTN = HIGH (LED_RSTN = off) INTN = HIGH (LED_INTN = off) UVN_VOUT = HIGH (LED_UVN = off) for VOUT = 5 V UVN_VOUT = LOW (LED_UVN = on) for VOUT < 4.65 V (Typ.) VMID > 6.5 V (optional check on test point) Test procedure Step 3 (LIN1/2 Transmit in Normal mode): 1. 2. Set TxDL1/2 to LOW, wait < 6 ms, set TxDL1/2 HIGH (Generate LIN Dominant state); can be repeated with 50% duty cycle Observe LIN1/2 and RxDL1/2. Start observation with TxDL1/2 falling edge. Table 3: Desired Results LIN1/2 = Contain one Dominant pattern RxDL1/2 = Contain one Dominant pattern 2/17/2014 2 www.onsemi.com Test procedure Step 4 (CAN Transmit in Normal mode): 1. 2. Set TxDC to LOW, wait < 300 μs, set TxDC HIGH (Generate CAN Dominant state); can be repeated with 50% duty cycle Observe CANH, CANL and RxDC. Start observation with TxDC falling edge. Table 4: Desired Results CANH, CANL = Contain one Dominant pattern RxDC = Contains one Dominant pattern Test procedure Step 5 (VOUT2 LDO function, SPI function): 1. 2. 3. 4. Send SPI command to activate VOUT2 regulator (SPI bit enVOUT2=1 in CONTROL1 register; SPI frame = 0x2400) Read SPI data from CONTROL1 register (send SPI frame = 0x3000) Connect load to VOUT2 (50 mA) Check VOUT2 State Table 5: Desired Results CONTROL1 = 0x3400 VOUT2 = ON Test procedure Step 6 (Transition to Sleep mode): 1. 2. 3. 4. Leave TxDL1, TxDL2 and TxDC floating (to simulate a microcontroller without power supply being connected to digital pins) Send SPI Sleep command (SPI frame = 0x0600) Disconnect SPI digital pins (to simulate a microcontroller without power supply being connected to digital pins) Check IBAT, VOUT, VOUT2, RSTN, INTN, UVN_VOUT State. Caution should be taken with oscilloscope digital probes resistance which could have influence on overall IBAT current. Table 6: Desired Results IBAT = Typ. 300 µA (incl. R_SWDM and R_CFG pull-up current) VOUT = OFF RSTN = LOW (LED_RSTN = off, due to VOUT off) INTN = LOW (LED_INTN = off, due to VOUT off) UVN_VOUT = LOW (LED_UVN = off, due to VOUT off) Test procedure Step 7 (LIN1/2 Wakeup): 1. 2. In Sleep, generate Remote LIN1 pattern: Set Gen HIGH, wait > 150 μs, set Gen LOW Check VOUT, RxDL1/2, RSTN, INTN State Table 7: Desired Results VOUT = ON RxDL1 = LOW – Signaling Wakeup source RxDL2 = HIGH RSTN = HIGH (LED_RSTN = off) INTN = 1 ms HIGH / 5 ms LOW pulses – Signaling Wakeup (LED_INTN = on) UVN_VOUT = HIGH (LED_UVN = off) 2/17/2014 3 www.onsemi.com Test procedure Step 8 (Fail-safe mode, FSO1 functionality): 1. 2. 3. 4. FSO1 soldering strap has to be connected Short VOUT, wait > 1.65 s Check VOUT, RSTN, FSO1 State Remove VOUT short VOUT = OFF RSTN = LOW (LED_RSTN = on) FSO1 = HIGH (LED_FSO = on) Test procedure Step 9 (WU function, wakeup from Fail-safe mode): 1. 2. Generate Local wakeup: Short WU pin to GND, wait > 50 μs (or press the SW_WU button) Check VOUT, RSTN, FSO1 State VOUT = ON RSTN = HIGH (LED_RSTN = off) FSO1 = HIGH (LED_FSO = on) DC Characteristics VOUT ON VOUT ON (Vbat < ~ 3 V) VOUT2 ON RSTN, INTN, UVN_VOUT, RxDL1/2, RxDC LOW RxDL1/2, RxDC HIGH LIN DOMINANT LIN RECESSIVE CANH DOMINANT CANL DOMINANT CANH-CANL RECESSIVE 2/17/2014 MIN TYP MAX 4.9 V 3.3 V 4.83 V 5.0 V 5.1 V 5.0 V 5.17 V 0.4 V VOUT-0.4 V 2V VBAT – 1.5 V 3.0 V 0.5 V -0.12 V 3.6 V 1.4 V 4 4.25 V 1.75 V 0.05 V www.onsemi.com