PDF Circuit Note

Circuit Note
CN-0325
Devices Connected/Referenced
AD7795
Circuits from the Lab® reference designs
are engineered and tested for quick
and easy system integration to help
solve today’s analog, mixed-signal,
and RF design challenges. For more
information and/or support, visit
www.analog.com/CN0325.
AD8226
ADT7310
16-Bit, Sigma-Delta
ADC, 40 nV Noise
36 V Instrumentation
Amplifier, >90 dB
CMRR
±0.5°C Digital
Temperature Sensor
ADP2441
36 V, 1 A, Step-Down,
DC-to-DC Regulator
ADG442
LC2MOS Quad SPST
Switch
ADP1720
ADR441
ADuM1311
ADuM3471
50 mA, High Voltage
Linear Regulator
Ultralow Noise, LDO
XFET®, 2.5 V Voltage
Reference
Triple-Channel
Digital Isolator
Quad Isolator
with Integrated
Transformer Driver
and PWM
PLC and DCS Universal Analog Input Using Either 4-Pin or 6-Pin Terminal Block
EVALUATION AND DESIGN SUPPORT
Circuit Evaluation Boards
CN-0325 Evaluation Board (EVAL-CN0325-SDPZ)
System Demonstration Platform (EVAL-SDP-CB1Z)
Design and Integration Files
Schematics, Layout Files, Bill of Materials
CIRCUIT FUNCTION AND BENEFITS
The circuit shown in Figure 1 provides two, 16-bit, fully isolated,
universal analog input channels suitable for programmable logic
controllers (PLCs) and distributed control system (DCS) modules.
Both channels are software programmable and support a number
of voltage, current ranges, thermocouple, and RTD types, as
shown in Figure 1.
CH1:
6-PIN
TERMINAL
BLOCK
CURRENT: 0mA TO 20mA, 4mA TO 20mA, ±20mA
VOLTAGE: 0V TO 5V, 0V TO 10V, ±5V, ±10V
THERMOCOUPLE: Type K, J, T, S
RTD: PT100, PT1000
CH2:
4-PIN
TERMINAL
BLOCK
SDP-B
BOARD
11462-001
PC
CURRENT: 0mA TO 20mA, 4mA TO 20mA, ±20mA
VOLTAGE: 0V TO 5V, 0V TO 10V, ±5V, ±10V
THERMOCOUPLE: TYPE K, J, T, S
RTD: PT100, PT1000
For the 4-terminal block channel (CH2), the voltage, current,
thermocouple, and RTD inputs all share the same 4 terminals,
thus minimizing the number of terminal pins required. For the
6-pin terminal block channel (CH1), the voltage and current
inputs share a set of 3 terminals, and the thermocouple and RTD
inputs share another set of 3 terminals; this configuration requires
more terminals but has a lower part count and component cost.
Figure 2 shows a photo of the printed circuit board (PCB), and
Figure 3 shows a more detailed schematic of the circuit.
The evaluation board contains two different fully isolated
universal input channels, one with a 4-pin terminal block (CH2),
and one with a 6-pin terminal block (CH1).
11462-002
Figure 1. Universal Analog Input Overview
Figure 2. Universal Analog Input Board
Rev. 0
Circuits from the Lab reference designs from Analog Devices have been designed and built by Analog
Devices engineers. Standard engineering practices have been employed in the design and
construction of each circuit, and their function and performance have been tested and verified in a lab
environment at room temperature. However, you are solely responsible for testing the circuit and
determining its suitability and applicability for your use and application. Accordingly, in no event shall
Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due
toanycausewhatsoeverconnectedtotheuseofanyCircuitsfromtheLabcircuits.(Continuedonlastpage)
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2015 Analog Devices, Inc. All rights reserved.
CN-0325
Circuit Note
CH2: 4-PIN TERMINAL BLOCK FOR COMPACT SOLUTION
AVDD
0.1µF
V
R5
2.2kΩ
+15V –15V
V1+
R2
2.2kΩ
ADG442
V1–
R3
2.2kΩ
I1
AD8226
S1
INA1
S3
R1
249Ω
R6
1MΩ
S4
DVDD
ADP1720
ADR441
AD7795
R9
10kΩ
R10
2kΩ
R7
1MΩ
5V
(AVDD/DVDD)
0.1µF
AVDD
IOUT1
D1
S2
DVDD
–15V +15V
REFIN2(+)
AIN1+
REFIN2(–)
AIN1–
24V
2.5V
AIN2+
IN1 IN2 IN3 IN4
ADuM3471
AIN2–
Vm
R8
2.2kΩ
ADP2441
P1
D2
IOUT2
R4
2.2kΩ
CS
CLK
REFIN1(+)
R11
4.75kΩ
CLK, DIN, DOUT
DIN
DOUT
REFIN1(–)
CS_ADT,
INT, CT
GND
ADT7310
5V
ADuM1311
CS_ADT, INT, CT
TO SDP-B
CH1: 6-PIN TERMINAL BLOCK FOR FURTHER COST SAVING
AVDD
+15V –15V
V
R2
2.2kΩ
V1–
R3
2.2kΩ
I1
INA1
R6
1MΩ
R5
2.2kΩ
R1
249Ω
R10
2kΩ
R7
1MΩ
D1
R8
2.2kΩ
R4
2.2kΩ
REFIN2(+)
2.5V
–15V +15V
AIN1–
REFIN2(–)
AIN2+
ADuM3471
AIN2–
CS
D2
CLK
IOUT2
REFIN1(+)
R11
4.75kΩ
CS_ADT
DIN
DOUT
REFIN1(–)
P1
GND
CLK, DIN, DOUT
11462-003
ADT7310
AIN1+
ADP1720
ADR441
IOUT1
R12
2.2kΩ
V–
DVDD
AD7795
2.5V
R13
2.2kΩ
V+
Vm
R9
10kΩ
5V
(AVDD/DVDD)
0.1µF
AVDD
AD8226
V1+
0.1µF
AVDD
Figure 3. Functional Block Diagram (Simplified Schematic: All Connections and Decoupling Not Shown)
CIRCUIT DESCRIPTION
The AD7795 low noise, 16-bit, Σ-Δ ADC with on-chip in-amp
and reference is used for the data conversion. The on-chip in-amp
and current sources provide a complete solution for RTD and
thermocouple measurement. For the voltage and current inputs,
the AD8226 instrumentation amplifier with >90 dB CMRR is used
to provide a high input impedance and reject any common-mode
interference. The voltage and current signals are scaled to the
range of the ADC using a precision resistor divider.
The ADR441, an ultralow noise, low dropout XFET® 2.5 V
voltage reference is used as the reference for the ADC.
For the 4-pin terminal block channel (CH2), the ADG442, low
RON, latch-up proof switch is used to switch between voltage,
current, thermocouple, and RT D input modes.
Digital and power isolation is achieved using ADuM3471, a
PWM controller and transformer driver with quad-channel
isolator which is used to generate an isolated ±15 V supply
using an external transformer. The ADuM1311, triple-channel
digital isolator is also used in the 4-pin terminal block circuit to
isolate the control lines for the ADG442 switches.
The ADP2441, 36 V step-down dc-to-dc regulator has a wide
tolerance on its input supply making it ideal for accepting a
24 V industrial supply. It accepts up to 36 V, thereby making
reliable transient protection of the supply input more easily
achievable. It steps the input voltage down to 5 V to power the
ADuM3471 as well as all other controller-side circuitry. The
circuit also includes standard external protection on the 24 V
supply terminals.
Rev. 0 | Page 2 of 13
Circuit Note
CN-0325
Power Configurations
The ADP2441 also features a number of other safety and
reliability functions, such as undervoltage lockout (UVLO),
a precision enable, a power good pin, and overcurrent-limit
protection. It also can achieve up to 90% efficiency in the 24 V
input, 5 V output configuration.
A 24 V supply powers the controller side of the board.
Alternately, a 5 V supply can be used, bypassing the ADP2441
circuitry. This 5 V input has no overvoltage protection and
must not exceed 6 V. The supply used must be configured using
the J4 link option as described in Table 2.
HARDWARE
Figure 4 shows the location of the channel containing the 4-pin
terminal block and the channel with the 6-pin terminal block. It
also shows the location of the 24 V supply input.
SDP-B
Table 2. External Power Supply Configuration Settings
Link
No.
J4
Link Position to Select
24 V Input (Default)
VCC1
Link Position to Select
5 V Input (Default)
VCC2
For the analog input side of the isolation barrier, there are two
options for powering a regulated 5 V for the analog circuitry.
Either the ADP1720 linear regulator can be used to step the
15 V down to 5 V, or else the internal 5 V regulator of the
ADuM3471 can be used. The link configurations for each is
shown in Table 3.
CH1:
6-PIN
TERMINAL
BLOCK
Table 3. Field 5 V Supply Configuration Settings
Link
No.
J3
J9
ALTERNATE
5V SUPPLY
CH2: 4-PIN TERMINAL BLOCK CHANNEL
Channel Selection
Jumpers need to be inserted and switched to configure both
supply and SPI signals between CH1 and CH2, as shown in
Table 1.
Vm
V1+
P12
THERMOCOUPLE/
3-WIRE RTD/
VOLTAGE/CURRENT
V1–
I1
Table 1. Channel Selection Configuration Settings
Digital
Function
5 V supply
SCLK
CS
DIN
DOUT
TEMP_CS
EARTH
P13
Link Position to
Select CH1, 6-Pin
Terminal Block
CH1
CH1
CH1
CH1
CH1
Not inserted
Link Position for
ADuM3471 5 V Regulator
Vaum
Vaum
Input Connectors
Figure 4. Channel Locations
Link
No.
JK0
JK1
JK2
JK3
JK4
JK11
Link Position for ADP1720,
5 V Regulator (Default)
Vreg
Vreg
11462-005
24V
SUPPLY
11462-004
CH2:
4-PIN
TERMINAL
BLOCK
Figure 5. CH2 Input Connectors
Link Position to
Select CH2, 4-Pin
Terminal Block
CH2
CH2
CH2
CH2
CH2
Inserted
Voltage and Current
The P12 connector is used for voltage and current input
connections. Figure 11 and Figure 12 show simplified
schematics for this input connection and configuration. This
configuration allows differential inputs in the ranges of 0 V to
5 V, 0 V to 10 V, ±5 V, ±10 V, 0 mA to 20 mA, 4 mA to 20 mA,
and ±20 mA. Connect voltage or current inputs between V1+
and V1−, because current inputs also short the V1+ and I1 pins
together. Shorting V1+ to I1 allows the 249 Ω, 0.1%, 0.25 W to
be used as a current sensing resistor.
Rev. 0 | Page 3 of 13
CN-0325
Circuit Note
Thermocouple
CH1: 6-PIN TERMINAL BLOCK CHANNEL
The P12 connector is also used for thermocouple inputs. Various
thermocouple types can be connected including J, K, T, and S types.
The thermocouple is connected between the V1+ and V1− inputs
(see Figure 5). Figure 6 shows how to connect a thermocouple
(Type T, in this example) to the universal analog input board. See
Figure 13 for a simplified schematic of the thermocouple input.
Input Connectors
V+
P11
V–
THERMOCOUPLE/
3-WIRE RTD
Vm
V1– VOLTAGE/CURRENT
I1
11462-008
V1+
P10
Figure 8. CH1 Channel Input Connectors;
See Figure 13 for a Simplified Input Diagram
Voltage and Current
The P10 connector is used for voltage and current input
connections. This allows differential inputs in the ranges of 0 V
to 5 V, 0 V to 10 V, ±5 V, ±10 V, 0 mA to20 mA, 4 mA to 20 mA,
and ±20 mA. Connect voltage or current inputs between V1+
and V1− (see Figure 13). For current inputs, also short V1+ and
I1 pins together, thereby connecting a 249 Ω precision current
sensing resistor with 0.1% accuracy and 0.25 W rating.
11462-006
Thermocouple
Figure 6. CH2 Thermocouple Connector
RTD
The P11 connector is used for thermocouple inputs. Various
thermocouple types can be connected including J, K, T, and S
types. The thermocouple is connected between the V+ and V−
inputs (see Figure 8). Figure 9 shows how to connect a
thermocouple (Type T in this example) to the universal analog
input board.
11462-009
The P12, P13 connectors are used for RTD inputs. The hardware
can support both 1000 Ω and 100 Ω platinum RTD inputs. For
3-wire mode, the two common wires are connected to V1+ and
V1−, and the return is connected to Vm (see Figure 5). Figure 7
shows how to connect a 3-wire RTD sensor to the universal
analog input board. See Figure 14 for a simplified schematic of
the RTD input.
Figure 9. CH1 Thermocouple Connector
11462-007
RTD
Figure 7. CH2 RTD Connector
The P11 connector is also used for RTD input. The hardware
can support both 1000 Ω and 100 Ω platinum RTD inputs. For
3-wire mode, the two common wires are connected to V+ and
V−, and the return is connected to Vm (see Figure 8). Figure 10
shows how to connect a 3-wire RTD sensor to the universal
analog input board.
Rev. 0 | Page 4 of 13
Circuit Note
CN-0325
System Resolution for 4-Pin Terminal Block Channel
With chop enable or disable selected and the data update rate
selected, Table 4 shows the 4-pin terminal block channel system
resolution measured with effective resolution and peak-to-peak
resolutions for each input type. Note that all resolution
measurements are based on the full-scale ranges as follows:
±10 V: full-scale range referred to 20 V
0 V to 5 V: full-scale range referred to 5 V
Type K: full-scale range referred to 1520°C
Type J : full-scale range referred to 900°C
Type T: full-scale range referred to 550°C
Type S: full-scale range referred to 1765°C
PT100: full-scale range referred to 850°C
PT1000: full-scale range referred to 850°C
11462-010








Figure 10. CH1 RTD Connector
Table 4. Measured RMS Noise, Peak-to-Peak Noise, RMS Resolution, and Peak-to-Peak Resolution
Range
−10 V to +10 V
0 V to 5 V
Type K (°C)
Type J (°C)
Type T (°C)
Type S (°C)
PT100 (°C)
PT1000 (°C)
Data Update
Rate (Hz)
470
470
16.7
16.7
470
470
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
Chop
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Samples
2700
1759
1024
1020
1660
2263
2872
1325
1010
1032
1020
1858
1041
1048
1025
1013
1025
594
1034
589
RMS Noise (V/°C)
1.14E-04
8.17E-05
0.00E+00
0.00E+00
1.08E-04
8.73E-05
5.40E-05
0.00E+00
1.14E-02
3.23E-03
7.98E-03
2.17E-03
6.44E-03
5.98E-03
3.97E-02
4.38E-02
1.30E-02
0.00E+00
1.67E-03
0.00E+00
Rev. 0 | Page 5 of 13
Peak-to-Peak
Noise (V/°C)
6.72E-04
6.72E-04
0.00E+00
0.00E+00
5.04E-04
5.04E-04
1.68E-04
0.00E+00
5.17E-02
5.17E-02
4.01E-02
4.01E-02
2.95E-02
2.95E-02
2.11E-01
2.10E-01
2.80E-02
0.00E+00
2.68E-02
0.00E+00
RMS Resolution
(Bits)
16.0
16.0
16.0
16.0
15.8
16.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
15.7
15.6
16.0
16.0
16.0
16.0
Peak-to-Peak
Resolution (Bits)
15.2
15.2
16.0
16.0
13.6
13.6
15.2
16.0
15.1
15.1
14.7
14.7
14.5
14.5
13.3
13.3
15.2
16.0
15.3
16.0
CN-0325
Circuit Note
System Resolution for 6-Pin Terminal Block Channel
With chop enable or disable selected and the data update rate
selected, Table 5 shows the 6-pin terminal block channel system
resolution measured with effective resolution and peak-to-peak
resolutions for each input type. Note that all resolution
measurements are based on the full scale ranges as follows:
•
±10 V: full-scale range referred to 20 V
•
•
•
•
•
•
•
0 V to 5 V: full-scale range referred to 5 V
Type K: full-scale range referred to 1520°C
Type J: full-scale range referred to 900°C
Type T: full-scale range referred to 550°C
Type S: full-scale range referred to 1765°C
PT100: full-scale range referred to 850°C
PT1000: full-scale range referred to 850°C
Table 5. Measured RMS Noise, Peak-to-Peak Noise, RMS Resolution, and Peak-to-Peak Resolution
Range
−10 V to +10 V
0 V to 5V
Type K (°C)
Type J (°C)
Type T (°C)
Type S (°C)
PT100 (°C)
PT1000 (°C)
Data Update
Rate (Hz)
470
470
16.7
16.7
470
470
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
16.7
Chop
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Samples
2229
1309
1067
1047
2598
1412
593
400
1280
1280
1104
452
1643
1043
579
548
528
359
658
4506
RMS Noise (V/°C)
1.44E-04
1.67E-04
0.00E+00
0.00E+00
9.31E-05
6.36E-05
8.22E-05
0.00E+00
2.33E-02
6.60E-03
4.65E-03
1.98E-02
6.12E-03
6.77E-03
4.60E-02
3.37E-02
1.40E-02
1.40E-02
1.01E-02
4.87E-03
Rev. 0 | Page 6 of 13
Peak-to-Peak
Noise (V/°C)
6.72E-04
3.36E-04
0.00E+00
0.00E+00
5.04E-04
3.36E-04
1.68E-04
0.00E+00
5.14E-02
5.16E-02
4.00E-02
4.06E-02
2.95E-02
2.95E-02
3.16E-01
2.09E-01
2.80E-02
2.80E-02
2.68E-02
2.68E-02
RMS Resolution
(Bits)
16.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
15.8
16.0
16.0
15.5
16.0
16.2
16.0
16.0
16.0
Peak-to-Peak
Resolution (Bits)
15.2
16.0
16.0
16.0
13.6
14.2
15.2
16.0
15.1
15.1
14.7
14.7
14.5
14.5
12.7
13.3
15.2
15.2
15.3
15.3
Circuit Note
CN-0325
SIMPLIFIED INPUT CIRCUIT DIAGRAMS
DVDD
AVDD
0.1µF
D1
R2
V1+
R5
AD7795
SW1
INA1
S1
R9
S2
R3
V1–
I1
S3
R6
VOLTAGE
REFERENCE
2.5V
AIN1+
VREF2–
AIN1–
R7
2.5V
AIN2+
IN1 IN2 IN3 IN4
AIN2–
Vm
D2
VREF2+
R10
S4
R1
DVDD
AVDD
IOUT1
P1
R8
IOUT2
R4
VREF1+
R11
VREF1–
11462-011
GND
Figure 11. CH2 Simplified Voltage Input Diagram
DVDD
AVDD
0.1µF
D1
R2
V1+
+15V –15V
I1
AD7795
SW1
INA1
S1
R9
S3
2.5V
VREF2–
AIN1–
R7
2.5V
AIN2+
IN1 IN2 IN3 IN4
AIN2–
Vm
D2
VREF2+
VOLTAGE
REFERENCE
AIN1+
R10
R6
S4
R1
DVDD
AVDD
IOUT1
R5
S2
R3
V1–
0.1µF
P1
R8
IOUT2
R4
VREF1+
R11
VREF1–
GND
Figure 12. CH2 Simplified Current Input Diagram
Rev. 0 | Page 7 of 13
11462-012
V
+15V –15V
0.1µF
CN-0325
Circuit Note
AVDD
0.1µF
D1
+
V1+
–
V1–
R2
+15V –15V
INA1
S1
VREF2+
R9
R6
2.5V
VREF2–
R10
S3
VOLTAGE
REFERENCE
AIN1+
S2
I1
DVDD
AD7795
SW1
AIN1–
R7
S4
R1
0.1µF
AVDD
IOUT1
R5
R3
DVDD
2.5V
AIN2+
IN1 IN2 IN3 IN4
AIN2–
Vm
D2
P1
R8
IOUT2
R4
VREF1+
R11
VREF1–
11462-013
GND
Figure 13. CH2 Simplified Thermocouple Input Diagram
DVDD
AVDD
0.1µF
D1
R2
V1+
+15V –15V
AVDD
IOUT1
R5
R3
V1–
I1
INA1
S1
VOLTAGE
REFERENCE
AIN1+
VREF2–
R10
S3
R6
2.5V
VREF2+
R9
AIN1–
R7
S4
R1
DVDD
AD7795
SW1
S2
RTD
0.1µF
2.5V
AIN2+
IN1 IN2 IN3 IN4
AIN2–
Vm
D2
P1
R8
IOUT2
R4
VREF1+
R11
VREF1–
11462-014
GND
Figure 14. CH2 Simplified RTD Input Diagram
AVDD
+15V –15V
0.1µF
AD8226
0.1µF
AVDD
R3
V1–
I1
AIN1+
R10
R2
R6
R5
DVDD
VOLTAGE
REFERENCE
AD7795
R9
INA1
V1+
DVDD
VREF2+
2.5V
AIN1–
R7
D1
VREF2–
2.5V
IOUT1
R1
R13
AIN2+
R12
V–
Vm
R8
AIN2–
D2
IOUT2
R4
VREF1+
R11
VREF1–
GND
Figure 15. CH1 Simplified Input Diagram
Rev. 0 | Page 8 of 13
11462-015
V+
Circuit Note
CN-0325
SOFTWARE DESCRIPTION
USING THE SOFTWARE
The universal analog input board is shipped with a CD-ROM
containing the CN0325 Evaluation Software designed using
LabVIEW®. This evaluation software can be installed onto a
standard PC with Windows® XP (SP2), Windows Vista (32-bit
and 64-bit), or Windows 7 (32-bit and 64-bit). To use the evaluation software, the Analog Devices, Inc., System Demonstration
Platform—Blackfin® (SDP-B) board is required.
The main window of the software is shown in Figure 16. The
hardware is configured via the Configuration tab, which is
divided into three separate subtabs: Hardware Configuration,
AD7795 Configuration, and ADT7310 Configuration. The
Acquisition Result tab shows all the data from the ADC and
converts results to the relevant units. The Calibration tab
allows the user to calibrate any of the ranges. Details about the
connected SDP-B board and evaluation software can be found
in the S/W Version Info tab.
When the evaluation software runs, the optimized default
configurations as well as the calibrated parameters from the onboard EEPROM are loaded into the software. The evaluation
software allows the user to acquire data from the universal
analog input board, which can be analyzed or saved to a file.
The analysis results are displayed on the screen in plots and in
digital format. The user can set up their own configuration and
calibration values and save these into the on-board EEPROM; the
software records the configuration and uploads it automatically
the next time the software runs.
Software Installation
To install the evaluation software, do the following:
2.
3.
Insert the CD-ROM into the PC, or download the software
installation package from the following location:
ftp://ftp.analog.com/pub/cftl/CN0325/.
Locate the setup.exe file. Double-click the setup.exe file to
start the installation procedure.
Follow the on-screen instructions to complete the
installation.
Install the evaluation software before connecting the evaluation
board and SDP-B board to the USB port of the PC to ensure
that the evaluation system and SDP-B board are correctly
recognized when connected to the PC.
11462-016
1.
Figure 16. Evaluation Software Main Window
Main Window Buttons
After the evaluation software is installed, do the following:
The main window contains several buttons. Their functions are
as follows:
1.

2.
3.
4.
Connect the SDP-B board to the USB port of the PC using
the supplied cable.
Connect the EVAL-CN0325-SDPZ evaluation board to
either of the SDP connectors (CON A or CON B).
Power up the evaluation board. Ensure that the jumpers are
set up correctly, as described in the Hardware section.
Start the CN-0325 evaluation software (CN0325.exe) and
proceed through any dialog boxes that appear. This step
completes the installation.





Rev. 0 | Page 9 of 13
Connect to SDP: click to set up the connection between
the SDP-B board and the evaluation board.
Disconnect to SDP: click to stop the connection between
the SDP-B board and the evaluation board.
Capture Mode: select Single Capture for single capture, or
Continuous Capture for continuous capture.
Start Acquisition/Stop Acquisition: click to start or stop
data capture.
Save Data: save the data shown from the software into a
file for further analysis.
QUIT: quit the application.
CN-0325
Circuit Note
Configuration Tab
Hardware Configuration Tab
ADT7310 Configuration Tab
The screenshot of the Configuration tab (see Figure 17) shows
the correct jumper settings and wire connections based on the
input selection. To ensure correct results, the jumper settings on
the hardware must be the same as the settings in the software.
The different input selection options are as follows:
•
•
•
Circuit Type: there are two, fully isolated, universal analog
input circuits to choose from. The 6-terminal block is the
lowest cost solution with six terminals for sensor and
signal connection. The 4-terminal block is a more compact
solution with 4-pin terminals for sensor and signal
connections.
Input Signal Type: the evaluation board can convert
multiple types of signals including voltage, current,
thermocouple, and RTD. After the input signal type is
selected, the desired range of the thermocouple/RTD type
must also be chosen.
Capture Mode: the user must set the method for capturing
the data. In single capture mode, only the specified number
of samples are captured. In continues capture mode, data is
continuously captured until the user stops the acquisition.
An on-board temperature sensor chip, the ADT7310, is placed
close to the terminal blocks for cold-junction compensation
during thermocouple measurements. In a typical measurement
setup, a default configuration is loaded to the universal analog
input board. The ADT7310 Configuration tab (see Figure 18)
allows more advanced configuration and provides the flexibility
to evaluate the board with a different configurations than the
default value. Using this tab requires specific knowledge of the
ADT7310 registers, functions, and hardware structure.
AD7795 Configuration Tab
11462-018
For each type of input signal range selected in the Hardware
Configuration tab, there is a default configuration loaded to
the universal analog input board. The AD7795 Configuration
tab (see Figure 17) allows more advanced configurations and
provides the flexibility to evaluate the board with a different
configuration than the default value.
Figure 18. ADT7310 Configuration Tab
Acquisition Result Tab
Converted Result Tab
A result is converted to the relevant units based on the raw data
from the data converter along with the channel configuration
and calibration values. The data is shown in a waveform chart
in the Converted Result tab (see Figure 19). The data is also
analyzed to provide the number of samples, the mean, the
minimum and maximum values, the RMS and peak-to-peak
noise, as well as the RMS and peak-to-peak resolution.
11462-019
11462-017
Using this tab requires specific knowledge of the AD7795
registers, functions, and hardware structure. An incorrect
configuration can cause acquisition and operation error. Click
Recover All range to Default to recover the default
configurations for the range(s).
Figure 17. AD7795 Configuration Tab
Figure 19. Converted Result Tab
Rev. 0 | Page 10 of 13
Circuit Note
CN-0325
ADC RAWData Tab
The acquisition data read directly from ADC is shown in the
waveform chart in the ADC RAWData tab. The data is also
analyzed to provide the number of samples, the mean, the
minimum and maximum values, the RMS and peak-to-peak
noise, as well as the RMS and peak-to-peak resolution.
Histogram Tab
11462-021
The Histogram tab (see Figure 20) shows the distribution of the
raw ADC data that has been captured. This histogram graph
can be used to evaluate the noise and acquisition stability.
Figure 21. Calibration Tab
To ensure a proper calibration, take the following steps:
1.
11462-020
2.
3.
Figure 20. Histogram Tab
Calibration Tab
The evaluation software also provides independent calibrated
parameters for each input signal and sensor type, which allows
the user to accurately calibrate the offset and gain of the system to
achieve a high level of dc precision for the system (see Figure 21).
The calibrated parameters can be stored into the on-board
EEPROM for later reuse. A complete calibration requires both
a zero-scale calibration and a full-scale calibration.
4.
From the Range for Calibration drop-down box, select the
desired input range.
Apply the correct input signal specified in Zeroscale Value
and click Zeroscale Calibrate. Follow the prompt to
complete the zero-scale calibration.
Apply the correct input signal specified in Fullscale Value
and click Fullscale Calibrate. Follow the prompt to
complete the full-scale calibration.
Click Save into EEPROM.
The calibrated parameters are placed into the internal
calibration register of ADC. When the user clicks Save into
EEPROM, the new calibration values are permanently saved to
the EEPROM, and these values are loaded the next time this
range is selected.
Copies of the factory default calibrated values are stored in the
on-board EEPROM. Click Recover to Default to return all the
calibrated values to their factory default values.
Rev. 0 | Page 11 of 13
CN-0325
Circuit Note
S/W Version Info Tab
The fields in the S/W Version Info tab are as follows:
Figure 22 shows the S/W Version Info tab. This tab provides
information about the connected SDP-B board.
•
•
•
Clicking Flash LED flashes the LED on the SDP-B board, which
indicates that the connection between the SDP-B and
evaluation boards is successfully set up.
Clicking Read Firmware reads the information about the
current code on the SDP-B board.
•
11462-022
•
•
Figure 22. Software Version Information Tab
Rev. 0 | Page 12 of 13
Major Rev: the major code revision number
Minor Rev: the minor code revision number
Host Code Rev: the version of the host code with which
the firmware was developed
BF Code Rev: the Blackfin code revision number of the
firmware
Date: the date the code was compiled
Time: the time the code was compiled
Circuit Note
CN-0325
LEARN MORE
Data Sheets and Evaluation Boards
CN-0325 Design Support Package:
www.analog.com/CN0325-DesignSupport
AD7795 Data Sheet
AD779x Instrumentation Converters—Frequently Asked
Questions
ADT7310 Data Sheet
MT-004 Tutorial. The Good, the Bad, and the Ugly Aspects of
ADC Input Noise—Is No Noise Good Noise? Analog Devices.
ADR441 Data Sheet
AD8226 Data Sheet
MT-022 Tutorial. ADC Architectures III: Sigma-Delta ADC
Basics. Analog Devices.
ADP2441 Data Sheet
ADP1720 Data Sheet
ADuM3471 Data Sheet
MT-023 Tutorial. ADC Architectures IV: Sigma-Delta ADC
Advanced Concepts and Applications. Analog Devices.
System Demonstration Platform (EVAL-SDP-CB1Z)
MT-031 Tutorial. Grounding Data Converters and Solving the
Mystery of "AGND" and "DGND". Analog Devices.
11/15—Revision 0: Initial Version
REVISION HISTORY
MT-101 Tutorial. Decoupling Techniques. Analog Devices.
Chen, Baoxing. iCoupler Products with isoPower Technology:
Signal and Power Transfer Across Isolation Barrier Using
Microtransformers. Analog Devices, 2006.
Zhao, Flow. Inside iCoupler® Technology:ADuM347x PWM
Controller and Transformer Driver with Quad-Channel
Isolators Design Summary. Analog Devices, 2010.
Slattery, Colm, Derrick Hartmann and Li Ke. “PLC Evaluation
Board Simplifies Design of Industrial Process Control
Systems.” Analog Dialogue. Analog Devices, April 2009.
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CN11462-0-11/15(0)
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