Data Sheet, Rev. 1.1, January 2010 TLE42744 Low Dropout Linear Voltage Regulator Automotive Power Low Dropout Linear Voltage Regulator 1 TLE42744 Overview Features • • • • • • • • • • Very Low Current Consumption Output Voltages 5 V and 3.3 V ±2% Output Current up to 400 mA Very Low Dropout Voltage Output Current Limitation Reverse Polarity Protection Overtemperature Shutdown Wide Temperature Range From -40 °C up to 150 °C Green Product (RoHS compliant) AEC Qualified PG-TO252-3 PG-SSOP-14 exposed pad PG-TO263-3 PG-SOT223-4 Description The TLE42744 is a monolithic integrated low dropout voltage regulator for load currents up to 400 mA. An input voltage up to 40 V is regulated to VQ,nom = 5 V / 3.3 V with a precision of ±2%. The device is designed for the harsh environment of automotive applications. Therefore it is protected against overload, short circuit and overtemperature conditions by the implemented output current limitation and the overtemperature shutdown circuit. The TLE42744 can be also used in all other applications requiring a stabilized 5 V / 3.3 V voltage. Due to its very low quiescent current the TLE42744 is dedicated for use in applications permanently connected to VBAT. Type Package Marking TLE42744DV50 PG-TO252-3 42744V5 TLE42744GV50 PG-TO263-3 42744V5 TLE42744EV50 PG-SSOP-14 exposed pad 42744V5 TLE42744DV33 PG-TO252-3 42744V33 TLE42744GV33 PG-TO263-3 42744V33 TLE42744GSV33 PG-SOT223-4 42744V33 Data Sheet 2 Rev. 1.1, 2010-01-13 TLE42744 Block Diagram 2 Block Diagram Saturation Control and Protection Circuit Temperature Sensor Ι Q Control Amplifier Buffer Bandgap Reference GND AEB01959 Figure 1 Data Sheet Block Diagram 3 Rev. 1.1, 2010-01-13 TLE42744 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment PG-TO252-3, PG-TO263-3 and PG-SOT223-4 GND 4 GND 1 3 1 I Ι Q AEP02561 Ι GND Q 2 GND 3 Q PinConfig_PG-SOT2234.vsd AEP02281 Figure 2 Pin Configuration (top view) 3.2 Pin Definitions and Functions PG-TO252-3, PG-TO263-3and PG-SOT223-4 Pin No. Symbol Function 1 I Input block to ground directly at the IC with a ceramic capacitor 2 GND Ground internally connected to heat slug 3 Q Output block to ground with a capacitor close to the IC terminals, respecting the values given for its capacitance and ESR in “Functional Range” on Page 7 Heat Slug / 4 – Heat Slug internally connected to GND; connect to GND and heatsink area Data Sheet 4 Rev. 1.1, 2010-01-13 TLE42744 Pin Configuration 3.3 Pin Assignment PG-SSOP-14 exposed pad QF QF QF , QF QF *1' QF QF QF QF 4 QF QF 7/(B3,1&21),*B6623 69* Figure 3 Pin Configuration (top view) 3.4 Pin Definitions and Functions PG-SSOP-14 exposed pad Pin No. Symbol Function 1, 2, 3, 5, 6, 7 n.c. not connected can be open or connected to GND 4 GND Ground 8, 10, 11, 12, 14 n.c. not connected can be open or connected to GND 9 Q Output block to ground with a capacitor close to the IC terminals, respecting the values given for its capacitance and ESR in “Functional Range” on Page 7 13 I Input block to ground directly at the IC with a ceramic capacitor Pad – Exposed Pad connect to GND and heatsink area Data Sheet 5 Rev. 1.1, 2010-01-13 TLE42744 General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings1) Tj = -40 °C to 150 °C; all voltages with respect to ground, (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Max. Unit Test Condition Input I 4.1.1 Voltage VI -42 45 V – Voltage VQ -1 40 V – Tj Tstg -40 150 °C – -50 150 °C – VESD,HBM -4 4 kV Human Body Model (HBM)2) VESD,CDM -1000 1000 V Charge Device Model (CDM)3) at all pins Output Q 4.1.2 Temperature 4.1.3 Junction temperature 4.1.4 Storage temperature ESD Susceptibility 4.1.5 ESD Absorption 4.1.6 1) not subject to production test, specified by design 2) ESD susceptibility Human Body Model “HBM” according to AEC-Q100-002 - JESD22-A114 3) ESD susceptibility Charged Device Model “CDM” according to ESDA STM5.3.1 Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 6 Rev. 1.1, 2010-01-13 TLE42744 General Product Characteristics 4.2 Pos. Functional Range Parameter Symbol Limit Values Min. Max. Unit Remarks 4.2.1 Input voltage VI 5.5 40 V TLE42744DV50, TLE42744GV50, TLE42744EV50 4.2.2 Input voltage VI 4.7 40 V TLE42744GV33, TLE42744DV33, TLE42744GSV33 4.2.3 – µF 1) – 3 Ω 2) 4.2.5 Junction temperature CQ ESR(CQ) Tj 22 4.2.4 Output Capacitor’s Requirements for Stability -40 150 °C – 1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30% 2) relevant ESR value at f = 10 kHz Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions TLE42744DV50, TLE42744DV33 (PG-TO252-3) 4.3.1 Junction to Case1) RthJC – 3.6 – K/W measured to heat slug 4.3.2 Junction to Ambient1) RthJA – 27 – K/W 2) 4.3.3 – 115 – K/W footprint only3) 4.3.4 – 52 – K/W 300 mm² heatsink area3) 4.3.5 – 40 – K/W 600 mm² heatsink area3) K/W measured to heat slug TLE42744GV50, TLE42744GV33 (PG-TO263-3) 4.3.6 Junction to Case1) RthJC – 3.6 – 4.3.7 Junction to Ambient1) RthJA – 22 – 4.3.8 – 74 – K/W footprint only3) 4.3.9 – 42 – K/W 300 mm² heatsink area3) 4.3.10 – 34 – K/W 600 mm² heatsink area3) Data Sheet 7 2) Rev. 1.1, 2010-01-13 TLE42744 General Product Characteristics Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions TLE42744EV50 (PG-SSOP-14 exposed pad) 4.3.11 Junction to Case1) RthJC – 7 – K/W measured to exposed pad 4.3.12 Junction to Ambient1) RthJA – 43 – K/W 2) 4.3.13 – 120 – K/W footprint only3) 4.3.14 – 59 – K/W 300 mm² heatsink area3) 4.3.15 – 49 – K/W 600 mm² heatsink area3) TLE42744GSV33 (PG-SOT223-4) 4.3.16 Junction to Case1) RthJC – 17 – K/W measured to heat slug 4.3.17 Junction to Ambient1) RthJA – 54 – K/W 2) 4.3.18 – 139 – K/W footprint only3) 4.3.19 – 73 – K/W 300 mm² heatsink area3) 4.3.20 – 64 – K/W 600 mm² heatsink area3) 1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 3) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu). Data Sheet 8 Rev. 1.1, 2010-01-13 TLE42744 Electrical Characteristics 5 Electrical Characteristics 5.1 Electrical Characteristics Voltage Regulator Electrical Characteristics VI =13.5 V; Tj = -40 °C to 150 °C; all voltages with respect to ground (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Measuring Condition Output Q 5.1.1 Output Voltage VQ 4.9 5.0 5.1 V TLE42744DV50, TLE42744GV50, TLE42744EV50 5 mA < IQ< 400 mA 6 V < VI < 28 V 5.1.2 Output Voltage VQ 4.9 5.0 5.1 V TLE42744DV50, TLE42744GV50, TLE42744EV50 5 mA < IQ<200 mA 6 V < VI < 40 V 5.1.3 Output Voltage VQ 3.23 3.3 3.37 V TLE42744GV33, TLE42744DV33, TLE42744GSV33; 5 mA < IQ< 400 mA 4.7 V < VI < 28 V 5.1.4 Output Voltage VQ 3.23 3.3 3.37 V TLE42744GV33, TLE42744DV33, TLE42744GSV33; 5 mA < IQ<200 mA 4.7 V < VI < 40 V 5.1.5 Dropout Voltage Vdr – 250 500 mV TLE42744DV50, TLE42744GV50, TLE42744EV50 IQ = 250 mA Vdr = VI – VQ1) 5.1.6 Load Regulation ∆VQ, lo – 20 50 mV TLE42744DV50, TLE42744GV50, TLE42744EV50; IQ = 5 mA to 400 mA VI = 6 V 5.1.7 Load Regulation ∆VQ, lo – 40 70 mV TLE42744GV33, TLE42744DV33, TLE42744GSV33; IQ = 5 mA to 300 mA 5.1.8 Line Regulation ∆VQ, li – 10 25 mV Vl = 12 V to 32 V IQ = 5 mA 5.1.9 Output Current Limitation IQ 400 600 1100 mA 1) 5.1.10 Power Supply Ripple Rejection2) PSRR – 60 – dB fr = 100 Hz; Vr = 0.5 Vpp Data Sheet 9 Rev. 1.1, 2010-01-13 TLE42744 Electrical Characteristics Electrical Characteristics VI =13.5 V; Tj = -40 °C to 150 °C; all voltages with respect to ground (unless otherwise specified) Pos. Parameter Symbol 2) Limit Values Unit Measuring Condition Min. Typ. Max. dVQ ----------dT – 0.5 – mV/K – 5.1.11 Temperature Output Voltage Drift 5.1.12 Overtemperature Shutdown Threshold Tj,sd 151 – 200 °C Tj increasing2) 5.1.13 Overtemperature Shutdown Threshold Hysteresis Tj,sdh – 25 – °C Tj decreasing2) 220 µA IQ = 1 mA Current Consumption 5.1.14 Quiescent Current Iq = II – IQ Iq – 100 5.1.15 Current Consumption Iq = II – IQ Iq Iq – 8 15 mA IQ = 250 mA – 15 25 mA TLE42744DV50, TLE42744GV50, TLE42744EV50; IQ = 400 mA – 20 30 mA TLE42744GV33, TLE42744DV33, TLE42744GSV33; IQ = 400 mA 5.1.16 5.1.17 1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V. 2) not subject to production test, specified by design Data Sheet 10 Rev. 1.1, 2010-01-13 TLE42744 Electrical Characteristics 5.2 Typical Performance Characteristics Voltage Regulator Current Consumption Iq versus Output Current IQ Current Consumption Iq versus Low Output Current IQ 16 01_IQ_IQ.VSD 02_IQ_IQLOW.VSD 1,4 14 1,2 V I = 13.5 V T j = 25 °C 12 V I = 13.5 V T j = 25 °C 1 I q [mA] I q [mA] 10 8 6 0,8 0,6 0,4 4 0,2 2 0 0 0 100 200 300 400 0 20 I Q [mA] 100 T j = 25 °C 400 0,2 350 0,1 300 -0,1 T j = 150 °C 450 I Q = 5 mA V I = 13.5 V 0 04_VDR_IQ.VSD 500 V DR [mV] ∆V Q [%] 80 Dropout Voltage Vdr versus Output Current IQ (5 V versions only) 03_VQ_TJ.VSD 0,5 0,3 60 I Q [mA] Output Voltage Variation ∆VQ versus Junction Temperature TJ 0,4 40 250 200 -0,2 150 -0,3 100 -0,4 50 -0,5 T j = -40 °C 0 -40 0 40 80 120 150 0 T j [°C] Data Sheet 100 200 300 400 I Q [mA] 11 Rev. 1.1, 2010-01-13 TLE42744 Electrical Characteristics Dropout Voltage Vdr versus Junction Temperature (5 V versions only) Maximum Output Current IQ versus Input Voltage VI 05_VDR_TJ.VSD 500 450 800 400 I Q = 400 mA 350 300 IQ,max [mA] V DR [mV] 06_IQMAX_VI.VSD 900 250 200 I Q = 100 mA 150 700 T j = 25 °C 600 T j = -40 °C T j = 150 °C 500 400 300 100 200 V Q = V Q,nom - 100 mV I Q = 10 mA 50 100 0 -40 0 40 80 120 0 160 0 T j [°C] 10 20 30 40 V I [V] Region Of Stability: Output Capacitor’s ESR ESR(CQ) versus Output Current IQ ESR(C Q ) [Ω ] 10 07_ESR_IQ.VSD Unstable Region 1 C Q = 22 µF V I = 13.5 V Stable Region 0,1 0,01 0 100 200 300 400 I Q [mA] Data Sheet 12 Rev. 1.1, 2010-01-13 TLE42744 Package Outlines 6 Package Outlines 6.5 +0.15 -0.10 2.3 +0.05 -0.10 4.57 0.51 MIN. 0.15 MAX. per side 0.9 +0.08 -0.04 B 5.4 ±0.1 0.8 ±0.15 9.9 ±0.5 6.22 -0.2 1 ±0.1 A 3x 0.75 ±0.1 0...0.15 0.5 +0.08 -0.04 2.28 1 ±0.1 0.25 M A B 0.1 All metal surfaces tin plated, except area of cut. Figure 4 Data Sheet PG-TO252-3 13 Rev. 1.1, 2010-01-13 TLE42744 Package Outlines 4.4 10 ±0.2 1.27 ±0.1 B 0.1 A 8.5 1) 0.05 2.4 2.7 ±0.3 4.7 ±0.5 7.55 1) 9.25 ±0.2 (15) 1 ±0.3 0...0.3 0...0.15 0.75 ±0.1 0.5 ±0.1 1.05 8˚ MAX. 2.54 5.08 0.25 M A B 1) Typical All metal surfaces: tin plated, except area of cut. Metal surface min. x=7.25, y=6.9 Figure 5 Data Sheet 0.1 B GPT09362 PG-TO263-3 14 Rev. 1.1, 2010-01-13 TLE42744 Package Outlines 0.19 +0.06 0.08 C 0.15 M C A-B D 14x 0.64 ±0.25 1 8 1 7 0.2 M D 8x Bottom View 3 ±0.2 A 14 6 ±0.2 D Exposed Diepad B 0.1 C A-B 2x 14 7 8 2.65 ±0.2 0.25 ±0.05 2) 0.1 C D 8˚ MAX. C 0.65 3.9 ±0.11) 1.7 MAX. Stand Off (1.45) 0 ... 0.1 0.35 x 45˚ 4.9 ±0.11) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion PG-SSOP-14-1,-2,-3-PO V02 Figure 6 Data Sheet PG-SSOP-14 exposed pad 15 Rev. 1.1, 2010-01-13 TLE42744 Package Outlines 1.6±0.1 6.5 ±0.2 3 ±0.1 A 0.1 MAX. B 1 0.25 M A 2 3 2.3 0.7 ±0.1 4.6 3.5 ±0.2 0.5 MIN. 7 ±0.3 4 0.28 ±0.04 0.25 M B 0...10˚ SOT223-PO V04 Figure 7 PG-SOT223-4 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 16 Dimensions in mm Rev. 1.1, 2010-01-13 TLE42744 Revision History 7 Revision History Revision Date Changes 1.1 2010-01-13 Updated Version Data Sheet: version TLE42744EV50 in PG-SSOP-14 exposed pad and all related description added; 3.3V versions TLE42744GV33 in PG-TO263-3, TLE42744DV33 in PG-TO252-3 and TLE42744GSV33 in PG-SOT223-4 and all related description added 1.0 2009-01-14 Initial Version final Data Sheet Data Sheet 17 Rev. 1.1, 2010-01-13 Edition 2010-01-13 Published by Infineon Technologies AG 81726 Munich, Germany © 2010 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.