Evaluation Board User Guide UG-122 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADP2140 Buck and LDO Combination Regulator FEATURES GENERAL DESCRIPTION Buck regulator input voltage range: 2.3 V to 5.5 V 600 mA buck regulator output current LDO input voltage range: 1.65 V to 5.5 V 300 mA LDO output current LDO input can come from the output of the buck regulator or another supply Operating temperature range: −40°C to +125°C The ADP2140 evaluation board (ADP2140CP-EVALZ) is used to demonstrate the functionality of the ADP2140 buck and LDO combination regulator. Basic electrical performance measurements, such as line and load regulation, dropout, efficiency, and ground current can be demonstrated with a few voltage supplies, voltmeters, current meters, and load resistors. For more details about the ADP2140 buck and LDO combination regulators, visit www.analog.com. EQUIPMENT NEEDED Voltmeters, ammeters, power supply Electronic or resistive loads DOCUMENTS NEEDED ADP2140 UG-089 08968-001 EVALUATION BOARD DIGITAL PICTURE Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 16 UG-122 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 LDO Measurements ..........................................................................8 Equipment Needed ........................................................................... 1 Line Regulation—LDO Regulator ..............................................9 Documents Needed .......................................................................... 1 Load Regulation—LDO Regulator .............................................9 General Description ......................................................................... 1 Dropout Voltage ............................................................................9 Evaluation Board Digital Picture .................................................... 1 Ground Current Measurement ..................................................... 10 Revision History ............................................................................... 2 Ground Current Consumption ................................................ 11 Evaluation Board Hardware and Schematic ................................. 3 Power Sequencing ...................................................................... 11 Evaluation Board Configurations .............................................. 3 Power Good Pin ......................................................................... 12 Buck Regulator Measurements ....................................................... 4 LDO as a Post Regulator to Reduce Buck Output Noise ...... 13 Line Regulation—Buck Regulator.............................................. 5 PCB Layout Considerations .......................................................... 14 Load Regulation—Buck Regulator............................................. 5 Thermal Considerations............................................................ 14 Efficiency ....................................................................................... 5 Ordering Information .................................................................... 16 Quiescent Current Measurement ............................................... 6 Bill of Materials ........................................................................... 16 Quiescent Current Consumption ............................................... 7 Related Links ................................................................................... 16 REVISION HISTORY 7/10—Revision 0: Initial Version Rev. 0 | Page 2 of 16 Evaluation Board User Guide UG-122 EVALUATION BOARD HARDWARE AND SCHEMATIC mized for low noise and the smallest footprint possible. Figure 2 shows the schematic of this evaluation board configuration. Table 1 lists and describes the hardware components. EVALUATION BOARD CONFIGURATIONS The ADP2140 evaluation board ships with all the components such as the input and output capacitors, buck inductor, and power-good pull-up resistor that are necessary to perform basic electrical performance measurements. The placement of the critical components in the buck (inductor and capacitors) have been optiTB1 The theory of operation and a functional description of the ADP2140 shown in Figure 2 are available in the ADP2140 data sheet. VIN1 VIN JP3 1 2 3 TB2 PGND TB3 R1 1 2 3 100K LDO PB U1 1 TB4 L1 BVOUT BUCK OUT C1 10uF 6.3V FB JP2 EN2 1 2 3 2 1uH 3 4 5 PGND VIN1 SW PG AGND EN1 FB EN2 VIN2 VOUT2 10 C2 10uF 6.3V 9 8 7 6 LVOUT TB5 LDO OUT VIN2 1 2 3 EN2 ADP2140 C3 1uF JP1 EN1 1 2 3 1 2 3 EN1 08968-002 GND Figure 2. Evaluation Board Schematic Table 1. Evaluation Board Hardware Components Component U1 1 C1 C2 C3 L1 R1 JP1 JP2 JP3 1 Function Linear regulator Buck output capacitor Input capacitor LDO output capacitor Inductor Pull-up resistor Jumper Jumper Jumper Description ADP2140 buck and LDO combination regulator 10 μF output bypass capacitor required for transient performance 10 μF input capacitor required for stability and transient performance 1 μF output bypass capacitor required for transient performance 1 μH inductor 100 kΩ pull-up resistor for power good (PG) Connects EN1 to VIN1 or GND Connects EN2 to VIN1 or GND Connects LDO input to VIN1 or to the buck output Component varies depending on the evaluation board model ordered. Rev. 0 | Page 3 of 16 UG-122 Evaluation Board User Guide BUCK REGULATOR MEASUREMENTS Figure 3 shows how to connect the evaluation board to a voltage source and a voltmeter for basic output voltage accuracy measurements. A resistor can be used as the load for the regulator. 3. Ensure that the resistor has a power rating adequate to handle the power that is expected to dissipate across it or, as an alternative, use an electronic load. In addition, ensure that the voltage source can supply enough current for the expected load levels. 5. Follow these steps to connect to a voltage source and voltage meter: 7. 2. Connect the negative terminal (−) of the voltage source to the PGND (TB2) pad on the evaluation board. Connect the positive terminal (+) of the voltage source to the VIN (TB1) pad of the evaluation board. 6. 8. If the load current is large, connect the voltmeter as close as possible to TB4 to reduce the effects of IR drops. VOLTAGE SOURCE – + LOAD VOLTMETER 1.99711 – + 08968-003 1. 4. Connect a load between the BUCK VOUT (TB4) pad and one of the PGND pads. Connect the negative terminal (−) of the voltmeter to one of the PGND pads. Connect the positive terminal (+) of the voltmeter to the BUCK VOUT pad. Connect a jumper between Pin 1 and Pin 2 of JP1 to enable the buck. Connect a jumper between Pin 2 and Pin 3 of JP2 to disable the LDO. Turn on the voltage source. Figure 3. Buck Output Voltage Regulation Measurement Setup Rev. 0 | Page 4 of 16 Evaluation Board User Guide UG-122 LINE REGULATION—BUCK REGULATOR EFFICIENCY For line regulation measurements, the buck output is monitored while its input is varied. For good line regulation, the output must change as little as possible with varying input levels. Figure 6 shows how to connect the evaluation board to a voltage source, two voltmeters, and two ammeters for basic efficiency measurements. Use a resistor as the load for the buck regulator. For example, for an ADP2140 with a fixed 1.8 V output, VIN needs to be varied between 2.5 V and 5.5 V. This measurement can be repeated under different load conditions. Figure 4 shows the typical line regulation performance of an ADP2140 with a fixed 1.8 V output. Ensure that the resistor has a power rating adequate to handle the power that is expected to dissipate across it, or, as an alternative, use an electronic load. In addition, ensure that the voltage source can supply enough current for the expected load levels. 1.82 1. 1.81 1.80 VOUT (V) Follow these steps to connect to a voltage source and meters: 1.79 1.78 1.77 1.76 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 VIN (V) 08968-004 LOAD = 1mA LOAD = 10mA LOAD = 50mA LOAD = 100mA LOAD = 300mA LOAD = 600mA Figure 4. Output Voltage vs. Input Voltage LOAD REGULATION—BUCK REGULATOR For load regulation measurements, the output of the buck is monitored while the load is varied. For good load regulation, the output must change as little as possible with varying loads. The input voltage must be held constant during this measurement. The load current can be varied from 0 mA to 600 mA. Figure 5 shows the typical load regulation performance of an ADP2140 with a fixed 1.8 V output for an input voltage of 3.0 V. 1.82 1.81 Connect a jumper between Pin 1 and Pin 2 of JP1 to enable the buck regulator. 2. Connect a jumper between Pin 2 and Pin 3 of JP2 to disable the LDO regulator. 3. Connect the negative terminal (−) of the voltage source to the PGND pad on the evaluation board. 4. Connect the positive terminal (+) of the voltage source to the positive terminal (+) of an input ammeter. 5. Connect the negative terminal (−) of the input ammeter to the VIN pad of the evaluation board. 6. Connect the positive terminal (+) of the input voltmeter to the VIN pad of the evaluation board. 7. Connect the negative terminal (−) of the input voltmeter to the PGND pad of the evaluation board. 8. Connect the positive terminal (+) of the output ammeter to the buck output pad on the evaluation board. Connect a load between the negative terminal (−) of the output ammeter and the PGND pad. 9. Connect the positive terminal (+) of the output voltmeter to the buck output pad of the evaluation board. 10. Connect the negative terminal (−) of the output voltmeter to the PGND pad of the evaluation board. 11. Turn on the voltage source. If the load current is large, connect the voltmeters as close as possible to the VIN and buck output pads to reduce the effects of IR drops. 1.79 1.78 1.77 1.76 1 10 100 LOAD CURRENT (mA) 1000 08968-005 VOUT (V) 1.80 Figure 5. Output Voltage vs. Load Current Rev. 0 | Page 5 of 16 UG-122 Evaluation Board User Guide VOLTAGE SOURCE AMMETER VOLTMETER 0.00112 1.99711 VOLTMETER – 1.99711 – + + – – + + LOAD AMMETER 08968-006 0.00112 – + Figure 6. Buck Efficiency Measurement The efficiency is calculated as follows: QUIESCENT CURRENT MEASUREMENT Efficiency = 100% × (VOUT × IOUT)/(VIN × IIN) The efficiency of the buck regulator can be measured over several combinations of input voltage and load currents. Figure 7 shows the efficiency of a 1.8 V output buck over input voltage and load current. Figure 8 shows how to connect the evaluation board to a voltage source and an ammeter for quiescent current measurements. VOLTAGE SOURCE 0.00112 – 100 AMMETER + + – 90 80 60 50 40 30 2.5V 3V 4V 5V 5.5V 10 0 1 10 100 LOAD (mA) 1000 08968-009 20 08968-007 EFFICIENCY (%) 70 Figure 7. Efficiency vs. Input Voltage and Load Figure 8. Buck Quiescent Current Measurement Rev. 0 | Page 6 of 16 Evaluation Board User Guide UG-122 2. 3. 4. 5. 6. 7. Connect a jumper between Pin 1 and Pin 2 of JP1 to enable the buck regulator. Connect a jumper between Pin 2 and Pin 3 of JP2 to disable the LDO regulator. Connect the positive terminal (+) of the voltage source to the positive terminal (+) of the ammeter. Connect the negative terminal (−) of the ammeter to the VIN pad of the evaluation board. Connect the negative terminal (−) of the voltage source to the PGND pad of the evaluation board. Remove R3. Alternatively, R3 can remain in circuit, but it increases the quiescent current by 100 kΩ/VIN. Turn on the voltage source. 30 25 20 15 10 5 QUIESCENT CURRENT CONSUMPTION Quiescent current measurements can determine how much current the internal circuits of the buck regulator are consuming under no load conditions. To be efficient, the regulator needs to Rev. 0 | Page 7 of 16 0 2.3 –40°C –5°C +25°C +85°C +125C 2.8 3.3 3.8 4.3 4.8 VIN (V) Figure 9. Quiescent Current vs. Input Voltage 5.3 08968-008 1. consume as little current as possible. Figure 9 shows the typical quiescent current consumption at no load for various input voltages. When the device is disabled (EN1 = PGND), ground current drops to less than 2 μA. QUIESCENT CURRENT (µA) Follow these steps to connect to a voltage source and ammeter: UG-122 Evaluation Board User Guide LDO MEASUREMENTS 5. Figure 10 shows how to connect the evaluation board to a voltage source and a voltmeter for basic LDO output voltage accuracy measurements. A resistor can be used as the load for the regulator. Ensure that the resistor has a power rating adequate to handle the power that is expected to dissipate across it or, as an alternative, use an electronic load. In addition, ensure that the voltage source can supply enough current for the expected load levels. Follow these steps to connect the evaluation board to a voltage source and voltage meter: 2. 3. 4. Connect a jumper between Pin 3 and Pin 2 of JP1 to disable the buck. Connect a jumper between Pin 2 and Pin 1 of JP2 to enable the LDO. Connect the negative terminal (−) of a voltage source to one of the PGND pads on the evaluation board. Connect the positive terminal (+) of a voltage source to the VIN pad of the evaluation board. Set this voltage source to 3.0 V. VOLTAGE SOURCE If the load current is large, connect the voltmeter as close as possible to the LDO output pad (TB5) to reduce the effects of IR drops. VOLTAGE SOURCE VOLTMETER 1.99711 + – – + – + LOAD 08968-010 1. Connect the negative terminal (−) of the LDO input voltage source to one of the PGND pads on the evaluation board. 6. Connect the positive terminal (+) of the LDO input voltage source to Pin 2 of JP3. 7. Connect a load between the VOUT pad and the PGND pad. 8. Connect the negative terminal (−) of the voltmeter to the PGND pad. 9. Connect the positive terminal (+) of the voltmeter to the VOUT pad. 10. If the connection between the LDO input voltage source and Pin 2 of JP3 is longer than six inches, connect a 1 μF ceramic capacitor from PGND to Pin 2 of JP3. 11. Turn on the voltage source. Figure 10. LDO Output Voltage Regulation Measurement Setup Rev. 0 | Page 8 of 16 Evaluation Board User Guide UG-122 1.820 For line regulation measurements, the LDO output is monitored while its input voltage is varied. For good line regulation, the output must change as little as possible with varying input levels. 1.815 1.810 1.805 1.800 1.795 1.790 1.785 1.780 1 100 1000 LOAD CURRENT (mA) 1.820 Figure 12. Output Voltage vs. Load Current 1.815 DROPOUT VOLTAGE 1.810 Dropout voltage can be measured using the configuration shown in Figure 10. Dropout voltage is defined as the inputto-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 1.65 V. Dropout voltage increases with larger loads. 1.805 1.800 1.795 1.790 1.785 1.780 2.2 LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT 2.6 3.0 3.4 = 1mA = 5mA = 10mA = 50mA = 100mA = 300mA 3.8 4.2 4.6 5.0 INPUT VOLTAGE (V) 5.4 To obtain measurements that are more accurate, use a second voltmeter to monitor the LDO input voltage at Pin 2 of JP3. The input supply voltage may need to be adjusted to account for IR drops, especially if large load currents are used. Figure 13 shows a typical curve of dropout voltage measurements with different load currents for a 1.8 V output. 08968-011 OUTPUT VOLTAGE (V) 10 08968-012 To ensure that the device is not in dropout mode during this measurement, the LDO input voltage must be varied between VOUTNOM + 0.4 V (or +1.65 V, whichever is greater) and VINMAX. For example, for an ADP2140 with a fixed 1.2 V output, the LDO input voltage needs to be varied between 1.65 V and 5.5 V. This measurement can be repeated under different load conditions. Figure 11 shows the typical line regulation performance of an ADP2140 with fixed 1.2 V output. OUTPUT VOLTAGE (V) LINE REGULATION—LDO REGULATOR Figure 11. Output Voltage vs. Input Voltage 150 LOAD REGULATION—LDO REGULATOR 100 75 50 25 0 1 10 100 LOAD CURRENT (mA) Figure 13. Dropout Voltage vs. Load Current Rev. 0 | Page 9 of 16 1000 08968-013 The LDO input voltage must be held constant during this measurement. The load current can be varied from 0 mA to 300 mA. Figure 12 shows the typical load regulation performance of an ADP2140 with a fixed 1.2 V output for an input voltage of 1.8 V. 125 DROPOUT VOLTAGE (mV) For load regulation measurements, the output of the regulator is monitored while the load is varied. For good load regulation, the output must change as little as possible with varying loads. UG-122 Evaluation Board User Guide GROUND CURRENT MEASUREMENT 3. Figure 14 shows how to connect the evaluation board to a voltage source and an ammeter for ground current measurements. A resistor can be used as the load for the regulator. Ensure that the resistor has a power rating adequate to handle the power that is expected to dissipate across it or, as an alternative, use an electronic load. Ensure that the voltage source used can supply enough current for the expected load levels. 4. 5. 6. Follow these steps to connect to a voltage source and ammeter: 2. 7. Connect a jumper between Pin 3 and Pin 2 of JP1 to disable the buck. Connect a jumper between Pin 2 and Pin 1 of JP2 to enable the LDO. 8. 9. AMMETER VOLTAGE SOURCE 0.00112 – + + – LOAD 08968-014 1. Connect a jumper between Pin 1 and Pin 2 of JP3 to power the LDO from VIN. Connect the positive terminal (+) of the voltage source to the VIN pad on the evaluation board. Connect the positive terminal (+) of the ammeter to the PGND pad of the evaluation board. Connect the negative terminal (−) of the ammeter to the negative (−) terminal of the voltage source. Connect a load between the VOUT pad of the evaluation board and the negative (−) terminal of the voltage source. Remove R3. Alternatively, R3 can remain in circuit but it increases the quiescent current by 100 kΩ/VIN. Turn on the voltage source. Figure 14. LDO Ground Current Measurement Rev. 0 | Page 10 of 16 Evaluation Board User Guide UG-122 GROUND CURRENT CONSUMPTION Ground current measurements can determine how much current the internal circuits of the regulator are consuming while the circuits perform the regulation function. To be efficient, the regulator needs to consume as little current as possible. Typically, the regulator uses the maximum current when supplying its largest load level (300 mA). Figure 15 shows the typical ground current consumption for various load levels at VIN = 2.5 V. When the device is disabled (EN2 = PGND), ground current drops to less than 2 μA. 160 GROUND CURRENT (µA) 140 120 80 When the autosequence mode is selected, the EN1 pin is used to start the on/off sequence of the regulators. A logic high sequences the regulators on whereas a logic low sequences the regulators off. The regulator activation order is associated with the voltage selected for the buck regulator and the LDO regulator. When the application requires activating and deactivating the regulators at the same time, the independent activation mode can be used, which connects the EN1 and EN2 pins together, as shown in Figure 21. 60 40 1 10 100 LOAD CURRENT (mA) 1000 08968-015 Table 2. Power Sequencing Modes 0 Figure 15. Ground Current vs. Load Current POWER SEQUENCING The ADP2140 has a flexible power sequencing system supporting two distinct activation modes, individual or autosequence, as follows: • Upon ENx activation or deactivation, a 4 μs deglitch filter prevents unwanted changes in the regulator state due to line noise or perturbation. When the turn on or turn off autosequence starts, the startup delay between the first and the second regulator is fixed to 5 ms (tREG12, as shown in Figure 17 and Figure 18). 100 20 • noise and transients. The termination resistor is disabled in the event that the EN2 pin is driven externally to a logic level high (individual activation mode assumed) to reduce the quiescent current consumption. In addition, the termination resistor on the EN2 pin is enabled by default after power-up. Individual activation control is where EN1 controls only the buck regulator and EN2 controls only the LDO regulator. A high level on the EN1 pin turns on the buck regulator and a high level on the EN2 pin turns on the LDO regulator. A logic low level turns off the respective regulator. Autosequence is where the two regulators are turned on in a specified order and delay after a low-to-high transition on the EN1 pin. Select the activation mode (individual or autosequence) by decoding the state of Pin EN2. The individual activation mode is selected when the EN2 pin is driven externally or hard wired to a voltage level (VIN1, PGND). The autosequencing mode is selected when the EN2 pin remains unconnected (floating). EN21 0 EN1 0 0 1 1 1 0 1 NC Rising edge NC Rising edge NC Rising edge NC Falling edge 1 Description Individual mode: LDO and buck regulators are off. Individual mode: buck regulator is on. Individual mode: LDO regulator is on. Individual mode: LDO and buck regulators are on. Autosequence: buck regulator turns on then the LDO regulator turns on. The LDO voltage is less than the buck voltage. Autosequence: LDO regulator turns on and then the buck regulator turns on. The LDO voltage is greater than the buck voltage. Autosequence: If the buck regulator = 1.875 V, the LDO regulator always turns on first, then the buck regulator turns on. Autosequence: the LDO and buck regulators turn off at the same time. NC means not connected. Table 3 describes the symbols in Figure 16 through Figure 21. Table 3. Symbol Descriptions To minimize quiescent current consumption, mode selection is performed only after a low-to-high transition of the EN1 pin. The detection circuit then activates for the time needed to assess the EN2 state, after which time the circuit is disabled until the next EN1 low-to-high transition. The detection circuit has a 4 μs deglitch time to avoid false activations. Symbol Name tSTART When EN2 is unconnected, the internal control circuit provides a termination resistor to ground to avoid false detection levels, which can occur when EN2 remains floating. The 100 kΩ termination resistor is low enough to guarantee insensitivity to tREG12 tSS tRESET Rev. 0 | Page 11 of 16 Description Time needed for the internal circuitry to activate the first regulator Regulator soft start time Time delay from power-good (PG) condition to the release of PG Delay time between buck and LDO activation Typical Value 60 μs 330 μs 5 ms 5 ms UG-122 Evaluation Board User Guide V As soon as either the buck or the LDO regulator output voltage drops below 85% of the respective nominal level, the powergood (PG) pin is forced low. EN1 92% V BUCK VBUCK EN1 tSS 92% VBUCK 85% V BUCK 95% VBUCK 85% VBUCK VBUCK EN2 92% V LDO 85% V LDO EN2 VLDO 92% V LDO 85% VLDO VLDO tRESET PG tRESET Figure 16. Individual Activation Mode 08968-019 TIME PG 08968-016 tSS tRESET Figure 19. Individual Activation Mode, Both Regulators Sensed V EN2 = UNCONNECTED EN1 92% V BUCK EN1 85% V BUCK VBUCK 92% V BUCK VBUCK EN2 tSTART tSS 92% VLDO 85% V LDO 92% VLDO VLDO 85% VLDO VLDO tSS PG TIME 08968-017 PG tRESET 08968-020 tREG12 tRESET Figure 20. Individual Activation Mode, Only One Regulator (Buck) Sensed Figure 17. Auto Sequencing Mode, Buck First Then LDO V EN1 EN2 = UNCONNECTED EN2 92% V BUCK EN1 92% V LDO 92% V LDO tSS PG tRESET tSS TIME 08968-018 tREG12 85% VBUCK tRESET Figure 18. Auto Sequencing Mode, LDO First Then Buck The PG pin responds to the last activated regulator. As described in the Power Sequencing section, the regulator order in the autosequence mode is defined by the voltage option combination. Therefore, if the sequence is buck regulator first, the LDO regulator and the PG signal are active low for tRESET after VLDO reaches 92% of the rated output voltage, at which time PG goes high and remains high for as long as VLDO is above 85% of the rated output voltage. When the sequencing is LDO regulator first followed by the buck regulator, the PG pin is controlled by VBUCK. This control scheme also applies when the individual activation mode is selected. 08968-021 92% VBUCK tSTART PG 85% V LDO VLDO VLDO VBUCK 85% V BUCK VBUCK Figure 21. Individual Activation Mode, No Activation/Deactivation Delay Between Regulators, EN1 and EN2 Pins Tied Together POWER GOOD PIN The ADP2140 power-good (PG) pin indicates the state of the monitored output voltages. PG is an active low, open-drain output, requiring an external pull-up resistor typically supplied from the I/O supply rail, as shown in Figure 2. When the sensed output voltage is below 92% of its nominal voltage, the PG pin is held low. When the sensed output voltage rises above 92% of its nominal level, the PG line is pulled high after tRESET. The PG pin remains high as long as the sensed output voltage is above 85% of the nominal output voltage level. A 4 μs deglitch filter ensures that noise or external perturbations do not trigger the PG line. Rev. 0 | Page 12 of 16 Evaluation Board User Guide UG-122 LDO AS A POST REGULATOR TO REDUCE BUCK OUTPUT NOISE T T 1 LDO OUTPUT VOLTAGE M40.0µs T 48.00% A CH1 –27.0mV 08968-022 2 CH2 10.0mV LDO OUTPUT VOLTAGE 2 CH1 10.0mV CH2 10.0mV M2.00µs T 48.00% A CH1 800µV Figure 23. LDO as a Post Regulator, VOUT = 1.8 V, Load Current = 500 mA, VOUT2 = 1.2 V, Load Current = 50 mA BUCK OUTPUT VOLTAGE CH1 50.0mV BUCK OUTPUT VOLTAGE 1 Figure 22. LDO as a Post Regulator, VOUT = 1.8 V, Load Current = 50 mA, VOUT2 = 1.2 V, Load Current = 50 mA Rev. 0 | Page 13 of 16 08968-023 The output of the buck regulator may not be suitable for many noise sensitive applications because of its inherent switching noise. This is particularly true when the buck regulator is operating in PSM mode because the switching noise is in the audio range. The ADP2140 LDO regulator can greatly reduce the noise at the output of the buck regulator at high efficiency because of the load dropout voltage of the LDO regulator and the high PSRR of the LDO regulator. Figure 22 and Figure 23 show the noise reduction that is possible when the LDO is used as a post regulator. UG-122 Evaluation Board User Guide PCB LAYOUT CONSIDERATIONS Improve heat dissipation from the package by increasing the amount of copper attached to the pins of the ADP2140. However, as shown in Table 4, a point of diminishing returns is eventually reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. Following are a few general tips when designing PCBs: • • To guarantee reliable operation, the junction temperature of the ADP2140 must not exceed 125°C. To ensure that the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistance between the junction and ambient air (θJA). The θJA value is dependent on the package assembly compounds that are used and the amount of copper on the PCB to which the PGND pins of the package are soldered. Table 4 shows typical θJA values of the 10-lead LFCSP for various PCB copper sizes. The typical ΨJB value of the 10-lead LFCSP is 16.9 °C/W. Table 4. Typical θJA Values Copper Size (mm2) 01 50 100 300 500 1 LFCSP θJA (°C/W) 42.5 40 38.8 37.2 36.2 Device soldered to minimum size pin traces. The junction temperature of the ADP2140 can be calculated from the following equation: TJ = TA + (PD × θJA) 08968-024 • Place the input capacitor as close as possible to the VINx and PGND pins. Place the input and output capacitors as close as possible to the VINx, VOUT2, and PGND pins. Connect the load as close as possible to VOUT. Use 0805-size inductor, and 0603- or 0402-size capacitors and resistors to achieve the smallest possible footprint solution on boards where area is limited. Figure 24. Typical Board Layout, Top Side (1) where: TA is the ambient temperature. PD is the power dissipation in the die, given by PD = PLDO + PBUCK where: PLDO = (VLDO IN − VLDO OUT) × ILDO LOAD (2) PBUCK = VIN × IIN − VOUT × IOUT (3) where: VLDO IN, VLDO OUT, VIN, and VOUT are the input and output voltages, respectively. IOUT and ILOAD are the load currents. Therefore, the junction temperature equation can be simplified as follows: TJ = TA + (PLDO + PBUCK) × θJA 08968-025 • THERMAL CONSIDERATIONS (4) As shown in Equation 4, for a given ambient temperature and continuous power dissipation, a minimum copper size requirement exists for the PCB to ensure that the junction temperature does not rise above 125°C. Figure 26 through Figure 29 show junction temperature calculations for different ambient temperatures, load currents, VIN to VOUT differentials, and areas of PCB copper. Figure 25. Typical Board Layout, Bottom Side Rev. 0 | Page 14 of 16 Evaluation Board User Guide UG-122 145 In cases where the board temperature is known, the thermal characterization parameter, ΨJB, can be used to estimate the junction temperature rise. Calculate the maximum junction temperature (TJ) from the board temperature (TB) and power dissipation (PD) using the following formula: 125 115 95 105 95 85 500mm 2 50mm 2 0mm2 TJ MAX 65 0 85 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 TOTAL POWER DISSIPATION (W) 75 Figure 28. TA = 65°C, LFCSP 65 135 25 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 TOTAL POWER DISSIPATION (W) Figure 26. TA = 25°C, LFCSP 140 130 120 125 115 105 95 500mm 2 50mm 2 0mm2 TJ MAX 110 85 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 TOTAL POWER DISSIPATION (W) 90 08968-029 500mm 2 50mm 2 0mm 2 TJ MAX 35 JUNCTION TEMPERATURE (°C) 55 45 Figure 29. TA = 85°C, LFCSP 80 140 70 500mm 2 50mm 2 0mm2 TJ MAX 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 TOTAL POWER DISSIPATION (W) 2.00 2.25 2.50 Figure 27. TA = 50°C, LFCSP 100 80 60 TB = 25°C TB = 50°C TB = 65°C TB = 85°C TJ MAX 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 TOTAL POWER DISSIPATION (W) Figure 30. TB = Various Temperatures, LFCSP Rev. 0 | Page 15 of 16 5.0 08968-030 50 120 JUNCTION TEMPERATURE (°C) 60 08968-027 JUNCTION TEMPERATURE (°C) 115 75 105 08968-026 JUNCTION TEMPERATURE (°C) 135 125 08968-028 (5) 145 JUNCTION TEMPERATURE (°C) TJ = TB + (PD × ΨJB) 135 UG-122 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 5. Components Listing Qty. 2 1 3 1 1 1 Reference Designator C1, C2 C3 JP1, JP2, JP3 L1 R1 U1 Description Capacitor, MLCC, 10 μF, 6.3 V, 0603, X5R Capacitor, MLCC, 1 μF, 6.3 V, 0402, X5R Header, single, STR, three pins Inductor, 1 μH, 0805 Resistor, 100 kΩ, 0.10 W, 0402 IC, buck LDO regulator Manufacturer/Vendor Murata or equivalent Murata or equivalent Digi-Key Corp. Murata or equivalent Vishay or equivalent Analog Devices, Inc. Vendor Part No. GRM188R60J106ME47D GRM155R60J105KE19D S1012E-03-ND LQM2HPN1R0MJ0L CRCW0402100KFKEA ADP2140ACPZ1812R7 RELATED LINKS Resource ADP2140 UG-089 Description Product Page ADP2140 RedyKit™ User Guide ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG08968-0-7/10(0) Rev. 0 | Page 16 of 16