ezLINX™ Schematics PDF

5
4
3
2
1
D
D
C
C
ADSP-BF548 Isolated Transceivers
EvalBoard
B
B
A
A
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
Title
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.9
1
12
Date Friday, October 19, 2012
Sheet
of
5
4
3
2
1
5
D
Rev. N°
4
Date
0.1
1.1
1.2
October 03, 2011
December 02, 2011
December 02, 2011
1.3
December 30, 2011
C
1.4
January 06, 2012
1.5
January 09, 2012
1.6
March 08, 2012
1.7
May 11, 2012
1.8
July 12, 2012
B
1.9
October 19, 2012
3
Changes done
Basic design
Major revision
Change R68 & R69 value to 60R4.
Add JP17-35, U42, U43, U44,
R101-105, J25, C234, C235, C236,
C237.
Remove R70, R80, J11, U24, U14,
U15, C145, C144, C143, C148,
C147, C146.
Add JP36, JP37, JP38, JP39,
R106, R107, R108, R109, R110.
Add J26.
Add JP40, R111
2
1
Achived by Verified by Approved by
M. ABID
M. ABID
M. ABID
C. REBAI
C. REBAI
C. REBAI
C. REBAI
C. REBAI
C. REBAI
M. ABID
C. REBAI
C. REBAI
C
M. ABID
C. REBAI
C. REBAI
M. ABID
C. REBAI
C. REBAI
M. ABID
C. REBAI
C. REBAI
Update block diagram, add note
to ETHERNET circuit
M. ABID
C. REBAI
C. REBAI
Add R112, R113, R114, J27, Add
UART3 CTS and RTS connection,
Remouve J6
M. ABID
C. REBAI
C. REBAI
Remove DNP to Ethernet circuitry
M. ABID
Update C3 PN
Add C238-C245
Delete D1, Add D9
Apply DNP to ETHERNET
D
B
C. REBAI
C. REBAI
A
A
This document contains information proprietary to Embedded Systems Technology (EBSYS) company
and shall not be used for engineering design, procurement or manufacture in whole or in part
without the express written permission of EBSYS company.
5
4
3
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
Notes & Revision table
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.9
2
12
Date Friday, October 19, 2012
Sheet
of
2
1
5
4
3
2
1
D
D
Table of Contents
Page
Block Diagram
Power Section
DSP, RESET, LED, JTAG
DDR, FLASH
ETHERNET
USB, RS232, RS485
CAN, I2C, SPI
LVDS
HIROSE
C
04
05
06
07
08
09
10
11
12
C
B
B
A
A
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
Table of Contents
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.9
3
12
Date Friday, October 19, 2012
Sheet
of
5
4
3
2
1
5
4
3
2
1
D
D
C
C
B
B
A
A
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
Block Diagram
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
4
12
Date Thursday, July 12, 2012
Sheet
of
5
4
3
2
1
5
4
3
2
1
UNREG_IN
F1
5A
J1
L1
190R
1
3
2
1
D2
MBRS540T3G
3.3V
3.3V
2
4
U4A
1.2V
E9
E10
E11
E12
F8
F13
G5
G6
G7
G14
H5
H6
K6
M15
N5
N15
P15
R6
R7
R8
R15
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
E5
F7
2.5V
F9
G8
G12
G13
J6
J13
L6
L15
P6
P7
P14
R10
R11
R12
U9
3.3V
F10
F11
F12
G15
H13
H14
H15
J14
J15
K14
K15
3
D9
SMBJ24CA
PWR CONN
D
C1
1nF
C2
1nF
FER1
600R
PWR_SH_GND
GND
FER2
600R
PWR_SH_GND
GND
UNREG_IN
C3
10uF
P_GND
R2
24.9K
C5
68pF
3
COMP
FB
ADP1864
R3
80.6K
5
IN
AGND
C4
470pF
U2
3.3V
4
CS
1
2
3
4
6
PGATE
5
6
7
8
D3
MBRS540T3G
SI4411DY
R4
255K
TP1
3.3V
L2
2.5uH
2
1
C
R1
0.05R
U1
A_GND
C6
220uF
P_GND
P_GND
C7
4.7uF
P_GND
TP2
GND
C245
0.01uF
P_GND
GND
A_GND
3.3V
W2
W1
COPPER
COPPER
4A
1.2V
E13
A_GND
P_GND
E8
VROUT
GND
F15
A18
A19
VDDEXT1
VDDEXT2
VDDEXT3
VDDEXT4
VDDEXT5
VDDEXT6
VDDEXT7
VDDEXT8
VDDEXT9
VDDEXT10
VDDEXT11
VDDEXT12
VDDEXT13
VDDEXT14
VDDEXT15
VDDEXT16
VDDEXT17
VDDEXT18
VDDEXT19
VDDEXT20
VDDEXT21
VDDEXT22
VDDEXT23
VDDEXT24
VDDEXT25
VDDEXT26
VDDEXT27
VDDEXT28
VDDEXT29
VDDEXT30
VDDEXT31
VDDEXT32
VDDEXT33
VDDINT1
VDDINT2
VDDINT3
VDDINT4
VDDINT5
VDDINT6
VDDINT7
VDDINT8
VDDINT9
VDDINT10
VDDINT11
VDDINT12
VDDINT13
VDDINT14
VDDINT15
VDDDDR1
VDDDDR2
VDDDDR3
VDDDDR4
VDDDDR5
VDDDDR6
VDDDDR7
VDDDDR8
VDDDDR9
VDDDDR10
VDDDDR11
VDDRTC
VDDMP
VDDVR
VROUT0
VROUT1
3.3V
3.3V
1.2V
U3
G4
F5
TP3
1.2V
VDDUSBA
VDDUSBB
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GNDMP
A1
A13
A20
B11
D1
E3
F3
F14
G9
G10
G11
H7
H8
H9
H10
H11
H12
J7
J8
J9
J10
J11
J12
K7
K8
K9
K10
K11
K12
K13
L7
L8
L9
L10
L11
L12
L13
L14
M6
M7
M8
M9
M10
M11
M12
M13
M14
N6
N7
N8
N9
N10
N11
N12
N13
N14
P8
P9
P10
P11
P12
P13
R9
R13
R14
U8
Y1
Y20
R16
V6
D4
F6
C62
10uF
VROUT
5
6
7
8
C9
100uF
C10
10uF
C15
0.01uF
C16
0.1uF
C17
0.1uF
C18
0.1uF
C19
0.1uF
C20
0.1uF
C21
0.1uF
C22
0.1uF
D
3.3V
C63
10uF
C23
0.01uF
C24
0.01uF
C25
0.01uF
C26
0.01uF
C27
0.01uF
C28
0.01uF
C29
0.1uF
C30
0.1uF
C31
0.1uF
C32
0.1uF
C33
0.1uF
C64
10uF
C34
0.01uF
C35
0.01uF
C36
0.01uF
C37
0.01uF
C38
0.01uF
C39
0.01uF
C40
0.01uF
C41
0.1uF
C42
0.1uF
C43
0.1uF
C44
0.1uF
C65
10uF
C45
0.01uF
C46
0.01uF
C47
0.01uF
C48
0.01uF
C49
0.1uF
C50
0.1uF
C51
0.1uF
C52
0.1uF
GND
3.3V
GND
1.2V
GND
1.2V
C
C66
10uF
C53
0.01uF
C54
0.01uF
C55
0.01uF
C56
0.01uF
C57
0.1uF
C58
0.1uF
C59
0.1uF
GND
2.5V
C131
10uF
C116
0.01uF
C117
0.01uF
C118
0.01uF
C119
0.01uF
C120
0.1uF
C121
0.1uF
C122
0.1uF
GND
2.5V
E7
C132
10uF
GND
D4
ZHCS1000
C11
0.1uF
C124
0.01uF
C127
0.01uF
C128
0.1uF
C129
0.1uF
GND
3.3V
1.2V
GND
3.3V
C8
100uF
B
C68
0.01uF
GND
C14
0.01uF
L3
10uH
FDS9431A
B
C13
0.01uF
GND
ADSP_BF548
1
2
3
4
C12
0.01uF
C60
0.01uF
C67
10uF
C61
0.1uF
GND
GND
GND
GND
3.3V
6
4
C229
1uF
A
GND
IN
IN
SD
GND
OUT
OUT
OUT
NR
2.5V
U39
3
4
1
2
5
ADP3335
GND
TP5
5V
1
2
3
C230
1uF
C232
4.7uF
IN
IN
EN
GND
ADP1706
OUT
OUT
EP
5V
U38
7
8
SENS
SS
TP6
2.5V
5
6
7
8
EP
UNREG_IN
C231
10nF
C233
4.7uF
A
GND
GND
GND
GND
GND
GND
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
Power Section
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
5
12
Date Wednesday, October 10, 2012
Sheet
of
5
4
3
2
1
5
4
3
2
1
3.3V
UART1TX
UART1RX
TMR8
TMR9
TMR10
R9
10K
Y1
1
OE
GND
OUT
3
PD0/PPI1_D0/HOST_D8/TFS1/PPI0_D18
PD1/PPI1_D1/HOST_D9/DT1SEC/PPI0_D19
PD2/PPI1_D2/HOST_D10/DT1PRI/PPI0_D20
PD3/PPI1_D3/HOST_D11/TSCLK1/PPI0_D21
PD4/PPI1_D4/HOST_D12/RFS1/PPI0_D22
PD5/PPI1_D5/HOST_D13/DR1SEC/PPI0_D23
PD6/PPI1_D6/HOST_D14/DR1PRI
PD7/PPI1_D7/HOST_D15/RSCLK1
PD8/PPI1_D8/HOST_D0/PPI2_D0/KEY_ROW0
PD9/PPI1_D9/HOST_D1/PPI2_D1/KEY_ROW1
PD10/PPI1_D10/HOST_D2/PPI2_D2/KEY_ROW2
PD11/PPI1_D11/HOST_D3/PPI2_D3/KEY_ROW3
PD12/PPI1_D12/HOST_D4/PPI2_D4/KEY_COL0
PD13/PPI1_D13/HOST_D5/PPI2_D5/KEY_COL1
PD14/PPI1_D14/HOST_D6/PPI2_D6/KEY_COL2
PD15/PPI1_D15/HOST_D7/PPI2_D7/KEY_COL3
C
A11
A12
GND
A14
B14
R11
10M
CLKOUT
L16
D11
Y2
1
M18
2
3
#RESET
C12
#NMI
C11
32.768KHz
C71
18pF
GND
#TRST
TMS
#EMU
TCK
TDO
TDI
GND
5
1
3.3V
2
BMODE1
CLKIN
XTAL
RTXI
RTXO
CLKOUT
CLKBUF
4
C70
18pF
PC0/TFS0
PC1/DT0SEC
PC2/DT0PRI
PC3/TSCLK0
PC4/RFS0
PC5/DR0SEC
PC6/DR0PRI
PC7/RSCLK0
PC8/SD_DO
PC9/SD_D1
PC10/SD_D2
PC11/SD_D3
PC12/SD_CLK
PC13/SD_CMD
PH0/UART1TX/PPI1_FS3_DEN
PH1/UART1RX/PPI0_FS3_DEN/TACI1
PH2/ATAPI_RESET/TMR8/PPI2_FS3_DEN
PH3/HOST_ADDR/TMR9/CDG
PH4/HOST_ACK/TMR10/CUD
PH5/DMAR0/TACI8/TACLK8
PH6/DMAR1/TACI9/TACLK9
PH7/GPW/TACI10/TACLK10
T5
U5
R5
V3
V4
V5
W1
W2
W3
W4
U40
4
EXT_WAKE
RESET
PE0/SPI0SCK/KEY_COL7
PE1/SPI0MISO/KEY_ROW6
PE2/SPI0MOSI/KEY_COL6
PE3/SPI0SS/KEY_ROW5
PE4/SPI0SEL1/KEY_COL5
PE5/SPI0SEL2/KEY_ROW4
PE6/SPI0SEL3/KEY_COL4
PE7/UART0TX/KEY_ROW7
PE8/UART0RX/TACI0
PE9/UART1RTS
PE10/UART1CTS
PE11/PPI1_CLK
PE12/PPI1_FS1
PE13/PPI1_FS2
PE14/SCL0
PE15/SDA0
NMI
TRST
TMS
EMU
TCK
TDO
TDI
BMODE0
BMODE1
BMODE2
BMODE3
W5
Y2
T6
U6
Y4
Y3
W6
V7
W8
V8
U7
W7
Y6
V9
Y5
H2
J3
J2
H1
G2
G1
J5
H3
Y14
V13
U13
W14
Y15
W15
P3
P4
R1
R2
T1
R3
T2
R4
U1
U2
T3
V1
T4
V2
U4
U3
V19
T17
U18
V14
Y16
W20
W19
R17
V20
U19
T18
P2
M5
P5
U16
W17
SCL1
SDA1
#UART3RTS
#UART3CTS
UART2TX
UART2RX
UART3TX
UART3RX
#SPI2SS
#SPI2SEL1
#SPI2SEL2
#SPI2SEL3
SPI2SCK
SPI2MOSI
SPI2MISO
NR_CLK
B9
A1
A2
A3
PH8/A4
PH9/A5
PH10/A6
PH11/A7
PH12/A8
PH13/A9
PI0/A10
PI1/A11
PI2/A12
PI3/A13
PI4/A14
PI5/A15
PI6/A16
PI7/A17
PI8/A18
PI9/A19
PI10/A20
PI11/A21
PI12/A22
PI13/A23
PI14/A24
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
ABE0/ND_CLE
ABE1/ND_ALE
AMS0
AMS1
AMS2
AMS3
PI15/A25/NR_CLK
AOE/NR_ADV
ARE
AWE
PJ0/ARDY/WAIT
PJ1/ND_CE
PJ2/ND_RB
PJ3/ATAPI_DIOR
PJ4/ATAPI_DIOW
PJ5/ATAPI_CS0
PJ6/ATAPI_CS1
PJ7/ATAPI_DMACK
PJ8/ATAPI_DMARQ
PJ9/ATAPI_INTRQ
PJ10/ATAPI_IORDY
PJ11/BR
PJ12/BG
PJ13/BGH
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
ATAPI_PDIAG
D13
C13
B13
B15
A15
B16
A16
B17
C14
C15
A17
D14
D15
E15
E14
D17
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D[0..15]
R110
10K
R60
10K
3.3V
LED8
LED
R13
10K
U41
1
#HIROSE_RESET
U5
4
1
4
PFI
SN74LVC1G08
6
PUSHBUTTON
NC
ADM708S
C17
C16
R15
330R
RESET
RESET
PFO
#AMS0
#AMS1
R16
10K
8
D
7
#RESET
5
GND
A10
D9
B10
D10
3.3V
GND
GND
GND
C72
0.01uF
C10
B12
D12
#AOE
#ARE
#AWE
R20
N18
M16
T20
N17
U20
P18
N16
R19
P17
T19
M17
P20
N19
GND
#WAIT
3.3V
R112
10K
3.3V
3.3V
P19
ADSP_BF548
PPI0_D18
PPI0_D19
PPI0_D20
PPI0_D21
PPI0_D22
PPI0_D23
LED1
LED2
LED3
LED4
LED5
LED6
PD12
PD13
FACT_RESET
MR
2
SW1
2
B2
A2
B3
D5
C4
C7
C5
D7
C6
A3
B4
A4
B5
A5
B6
A6
B7
A7
C8
B8
A8
A9
C9
D8
VCC
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A[1..24]
GND
TFS2
DT2SEC
DT2PRI
TSCLK2
RFS2
DR2SEC
DR2PRI
RSCLK2
TFS3
DT3SEC
DT3PRI
TSCLK3
RFS3
DR3SEC
DR3PRI
RSCLK3
3
PB0/SCL1
PB1/SDA1
PB2/UART3RTS
PB3/UART3CTS
PB4/UART2TX
PB5/UART2RX/TACI2
PB6/UART3TX
PB7/UART3RX/TACI3
PB8/SPI2SS/TMR0
PB9/SPI2SEL1/TMR1
PB10/SPI2SEL2/TMR2
PB11/SPI2SEL3/TMR3/HWAIT
PB12/SPI2SCK
PB13/SPI2MOSI
PB14/SPI2MISO
2
25MHz
W18
U14
V17
V18
U17
C3
D6
H4
R10
33R
VDD
C69
0.01uF
4
3.3V
GND
3.3V
PG0/PPI0_CLK/TMRCLK
PG1/PPI0_FS1
PG2/PPI0_FS2
PG3/PPI0_D16
PG4/PPI0_D17
PG5/SPI1SEL1/HOST_CE/PPI2_FS2/CZM
PG6/SPI1SEL2/HOST_RD/PPI2_FS1
PG7/SPI1SEL3/HOST_WR/PPI2_CLK
PG8/SPI1SCK
PG9/SPI1MISO
PG10/SPI1MOSI
PG11/SPI1SS/MTXON
PG12/CAN0TX
PG13/CAN0RX/TACI4
PG14/CAN1TX
PG15/CAN1RX/TACI5
U12
V12
W12
Y12
W11
V11
Y11
U11
U10
Y10
Y9
V10
Y8
W10
Y7
W9
R87
10K
SW2
5
1
J4
K5
L5
N3
P1
V15
Y17
W16
V16
Y19
Y18
U15
P16
R18
Y13
W13
PPI0_CLK
PPI0_FS1
PPI0_FS2
PPI0_D16
PPI0_D17
#SPI1SEL1
#SPI1SEL2
#SPI1SEL3
SPI1SCK
SPI1MISO
SPI1MOSI
#SPI1SS
CAN0TX
CAN0RX
CAN1TX
CAN1RX
PA0/TFS2
PA1/DT2SEC/TMR4
PA2/DT2PRI
PA3/TSCLK2
PA4/RFS2
PA5/DR2SEC/TMR5
PA6/DR2PRI
PA7/RSCLK2/TACLK0
PA8/TFS3/TACLK1
PA9/DT3SEC/TMR6
PA10/DT3PRI/TACLK2
PA11/TSCLK3/TACLK3
PA12/RFS3/TACLK4
PA13/DR3SEC/TMR7/TACLK5
PA14/DR3PRI/TACLK6
PA15/RSCLK3/TACI7/TACLK7
R86
100R
2
PUSHBUTTON
U35
R88
10R
4
3
D
PF0/PPI0_D0
PF1/PPI0_D1
PF2/PPI0_D2
PF3/PPI0_D3
PF4/PPI0_D4
PF5/PPI0_D5
PF6/PPI0_D6
PF7/PPI0_D7
PF8/PPI0_D8
PF9/PPI0_D9
PF10/PPI0_D10
PF11/PPI0_D11
PF12/PPI0_D12
PF13/PPI0_D13
PF14/PPI0_D14
PF15/PPI0_D15
5
K3
J1
K2
K1
L2
L1
L4
K4
L3
M1
M2
M3
M4
N4
N1
N2
PPI0_D0
PPI0_D1
PPI0_D2
PPI0_D3
PPI0_D4
PPI0_D5
PPI0_D6
PPI0_D7
PPI0_D8
PPI0_D9
PPI0_D10
PPI0_D11
PPI0_D12
PPI0_D13
PPI0_D14
PPI0_D15
U4E
3
U4D
C
FACT_RESET
SN74AUP1G14DBVRE4
C222
1uF
U4F
MFS
MXO
MXI
MLF_M
MLF_P
E6
C1
C2
F4
E4
3.3V
GND
GND
GND
C73
0.01uF
ADSP_BF548
SPI0SCK
SPI0MISO
SPI0MOSI
#SPI0SS
#SPI0SEL1
#SPI0SEL2
#SPI0SEL3
UART0TX
LAN_IRQ/UART0RX
#UART1RTS
#UART1CTS
DE
#RE
R17
0R
GND
GND
SCL0
SDA0
3
ADSP_BF548
SN74AUP1G14DBVRE4
3.3V
R97
10K
B
R99
10K
R5
4.7K
GND
BTMS
R98
10K
GND
+
+
+
+
+
+
+
B
R6
0R
J2
1
3
5
7
9
11
13
+
+
+
+
+
+
+
2
4
6
8
10
12
14
#EMU
TMS
TCK
#TRST
TDI
R7
0R
JTAG
TDO
GND
3.3V
1OE
2OE
2Y1
2Y2
2Y3
2Y4
10
1
19
2A1
2A2
2A3
2A4
1Y1
1Y2
1Y3
1Y4
18
16
14
12
GND
9
7
5
3
3.3V
LED6
LED
LED4
LED
LED3
LED
LED2
LED
LED1
LED
LED7
LED
IDT74FCT3244APY
3.3V
R95
330R
A
GND
LED5
LED
3.3V
GND
11
13
15
17
LED5
LED6
1A1
1A2
1A3
1A4
VCC
U36
2
4
6
8
LED1
LED2
LED3
LED4
20
R8
4.7K
R94
330R
R93
330R
R92
330R
R91
330R
R90
330R
R89
330R
R19
1K
3.3V
R20
1K
3.3V
R21
1K
3.3V
R22
1K
TP4
CLKOUT
R12
10K
SCL0
SDA0
SCL1
SDA1
#NMI
CLKOUT
A
GND
C244
0.01uF
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
DSP, RESET, LED, JTAG
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
6
12
Date Thursday, July 12, 2012
Sheet
of
GND
GND
5
3.3V
GND
4
3
2
1
5
4
3
2
1
H17
H16
D16
C18
DDRCK0
E16
D18
#DDRCK0
DBA0
DBA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DCLK0
DCLK1
DQM0
DQM1
DCLK0
DCLK1
DWE
DCAS
DRAS
DQS0
DQS1
N20
M20
DDR_VREF
DDR_VSSR
DCS0
DCS1
DDR_VREF
DCLKE
L18
M19
L19
L20
L17
K16
K20
K17
K19
J20
K18
H20
J19
J18
J17
J16
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D[0..15]
DDR_A[0..12]
1
2
3
4
DDR_A9
#DDRCS0
DDR_A10
DDR_A2
1
2
3
4
DDR_A7
DDR_A6
DDR_A12
DDR_A5
1
2
3
4
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
8
7
6
5
#DDRCAS_R
DDR_R_A1
DDRBA0_R
DDRBA1_R
8
7
6
5
DDR_R_A9
#DDRCS0_R
DDR_R_A10
DDR_R_A2
8
7
6
5
DDR_R_A7
DDR_R_A6
DDR_R_A12
DDR_R_A5
8
7
6
5
DDR_R_A4
DDR_R_A11
DDR_R_A8
DDRCKE_R
DDR_R_A[0..12]
DDR_R_A[0..12]
RN2
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
RN3
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
33R
#DDRCAS
E17
#DDRRAS
29
30
31
32
35
36
37
38
39
40
28
41
42
33R
#DDRWE
F16
DDR_R_A0
DDR_R_A1
DDR_R_A2
DDR_R_A3
DDR_R_A4
DDR_R_A5
DDR_R_A6
DDR_R_A7
DDR_R_A8
DDR_R_A9
DDR_R_A10
DDR_R_A11
DDR_R_A12
33R
G20 DDRQM0
H19 DDRQM1
E18
#DDRCAS
DDR_A1
DDRBA0
DDRBA1
RN4
DDR_A4
DDR_A11
DDR_A8
DDRCKE
F20 DDRQS0
H18 DDRQS1
1
2
3
4
C19 #DDRCS0
B19
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
DDRCK0
DDRBA0_R
DDRBA1_R
26
27
#DDRCS0_R
#DDRRAS_R
#DDRCAS_R
#DDRWE_R
DDRCKE_R
DDRQM0_R
DDRQM1_R
24
23
22
21
44
20
47
45
46
R51
100R
33R
3
9
15
55
61
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
BA0
BA1
UDQS
LDQS
CS
RAS
CAS
WE
CKE
LDM
UDM
DNU1
DNU2
NC1
NC2
NC3
NC4
NC5
CLK
CLK
RN9
B18
DDRCKE
ADSP_BF548
R54
1R
DDR_A0
#DDRWE
DDR_A3
#DDRRAS
1
2
3
4
DDRQM0
DDRQS0
DDRQM1
DDRQS1
1
2
3
4
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
8
7
6
5
DDR_R_A0
#DDRWE_R
DDR_R_A3
#DDRRAS_R
8
7
6
5
DDRQM0_R
DDRQS0_R
DDRQM1_R
DDRQS1_R
49
#DDRCK0
33R
2
4
5
7
8
10
11
13
54
56
57
59
60
62
63
65
DDR_R_D0
DDR_R_D1
DDR_R_D2
DDR_R_D3
DDR_R_D4
DDR_R_D5
DDR_R_D6
DDR_R_D7
DDR_R_D8
DDR_R_D9
DDR_R_D10
DDR_R_D11
DDR_R_D12
DDR_R_D13
DDR_R_D14
DDR_R_D15
51
16
DDRQS1_R
DDRQS0_R
DDR_R_D[0..15]
D
19
50
14
17
25
43
53
VREF
2.5V
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
DDRBA0
DDRBA1
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
DA10
DA11
DA12
6
12
52
58
64
G19
G17
E20
G18
G16
F19
D20
C20
F18
E19
B20
F17
D19
VSS
VSS
VSS
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
RN1
34
48
66
DDR_A[0..12]
D
VCC
VCC
VCC
U11
U4C
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
1
18
33
2.5V
MT46V32M16
RN10
C
C102
0.01uF
GND
GND
R1A
R2A
R3A
R4A
C
R1B
R2B
R3B
R4B
R52
1K
C100
0.1uF
GND
33R
DDR_VREF
RN5
DDR_D[0..15]
DDR_D7
DDR_D6
DDR_D3
DDR_D2
1
2
3
4
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
8
7
6
5
DDR_R_D7
DDR_R_D6
DDR_R_D3
DDR_R_D2
8
7
6
5
DDR_R_D1
DDR_R_D4
DDR_R_D0
DDR_R_D5
8
7
6
5
DDR_R_D8
DDR_R_D10
DDR_R_D14
DDR_R_D13
DDR_R_D[0..15]
R53
1K
C101
0.1uF
33R
RN6
DDR_D1
DDR_D4
DDR_D0
DDR_D5
1
2
3
4
DDR_D8
DDR_D10
DDR_D14
DDR_D13
1
2
3
4
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
GND
33R
RN7
R85
10K
#AMS0
#ARE
#AWE
#RESET
B4
F8
G8
D4
C6
#AOE
F6
A4
NR_CLK
G4
D6
D5
VCC1
VCC2
CE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
WAIT
NC1
NC2
NC3
NC4
NC5
NC6/A25
WE
RST
WP
R1B
R2B
R3B
R4B
2.5V
RN8
OE
F2
E2
G3
E4
E5
G5
G6
H7
E1
E3
F3
F4
F5
H5
G7
E7
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
F7
DDR_D15
DDR_D11
DDR_D9
DDR_D12
D[0..15]
1
2
3
4
R1A
R2A
R3A
R4A
R1B
R2B
R3B
R4B
8
7
6
5
DDR_R_D15
DDR_R_D11
DDR_R_D9
DDR_R_D12
C103
0.01uF
C104
0.01uF
C105
0.01uF
C106
0.01uF
C107
0.01uF
C108
0.01uF
C109
0.01uF
C110
0.01uF
B
33R
GND
#WAIT
E8
B8
F1
G2
H1
B6
VPEN
CLK
3.3V
A
PC28F128P33T85
C238
10uF
C239
0.01uF
C240
0.01uF
C241
0.01uF
C242
0.01uF
C243
0.01uF
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
DDR, FLASH
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
7
12
Date Thursday, July 12, 2012
Sheet
of
GND
GND
5
C99
10uF
ADV
B2
H4
A
E6
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
R1A
R2A
R3A
R4A
33R
GNDQ1
GNDQ2
3.3V
A1
B1
C1
D1
D2
A2
C2
A3
B3
C3
D3
C4
A5
B5
C5
D7
D8
A7
B7
C7
C8
A8
G1
H8
H2
H6
B
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
GND1
GND2
A[1..24]
VCCQ3
VCCQ2
VCCQ1
U33
A6
H3
3.3V
4
3
2
1
72
70
LAN_IRQ/UART0RX
81
85
89
R39
10R
D
73
HX1188
EECLK/GPO4
EEDIO/GPO3
EECS
GPIO0/LED1
GPIO1/LED2
GPIO2/LED3
SPD_SEL
FIFO_SEL
PD
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
XTAL1
XTAL2
69
67
68
EEP_CLK
EEP_DIO
EEP_CS
R33
12.4K
C96
0.022uF
R32
330R
NC4
5
RD+
RDCT
RD-
16
15
14
1
2
3
4
5
6
7
8
11
10
9
R40
75R
GND
R45
49.9R
R44
49.9R
R43
49.9R
R42
49.9R
RJ45
GND
R47
49.9R
LED9
LED
SPD_SEL
FIFO_SEL
PD
R41
75R
3.3V
98
99
100
74
76
75
NC5
TPOTPOCT
TPO+
TD+
TDCT
TD-
NC13
6
7
8
87
TPI+
TPICT
TPI-
NC12
EXRES1
1
2
3
4
J3
79
78
83
82
13
VDD_A
VDD_A
VDD_A
8
20
28
35
42
48
55
61
97
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
2
VREG
VDD_REF
R38
49.9R
12
VDD_CORE
65
3
R37
49.9R
6
5
C98
1000pF
R28
1M
R46
49.9R
C97
1000pF
3.3V
ATEST
RBIAS
9
LAN_SH_GND
10
LAN_SH_GND
Y3
R27
12K
C
1
2
4
3
25MHz
C74
30pF
RESET
RD
WR
CS
IRQ
PME
GND
LAN9218
3.3V
FER3
600R
NC1
NC2
NC3
NC4
C95
30pF
GND
84
71
90
91
VSSA
VSSA
VSSA
VSSA
#RESET
#ARE
#AWE
#AMS1
R36
49.9R
77
80
86
88
95
92
93
94
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
R25
1K
AMDIX_EN
R35
49.9R
U9
GND_CORE
GND_CORE
R26
1K
A3V
R34
1K
TPO+
TPOTPI+
TPI-
19
27
34
41
47
54
60
96
3.3V
C
1
A3V
66
1
40
39
38
37
36
33
32
31
30
29
26
25
24
23
22
21
VDD_CORE
VDD_CORE
64
63
62
59
58
57
56
53
52
51
50
49
46
45
44
43
2
3.3V
VSS_PLL
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A1
A2
A3
A4
A5
A6
A7
3
3.3V
4
18
17
16
15
14
13
12
VSS_REF
D[0..15]
A1
A2
A3
A4
A5
A6
A7
11
A[1..24]
VDD_PLL
U10
D
VDD_PLL
4
7
5
GND
JP1
JUMPER
SPD_SEL
FIFO_SEL
PD
B
+
R29
10K
R48
0R
+
R30
10K
B
A3V
R31
10K
GND
LAN_SH_GND
U7
GND
GND
1
2
3
4
EEP_CS
EEP_CLK
EEP_DIO
GND
6
7
R50
10K
R49
1K
3.3V
CS
CLK
DI
DO
NC1
NC2
3.3V
VCC
GND
8
5
C75
0.01uF
93LC46A
GND
VDD_PLL
VDD_CORE
GND
C76
10uF
C77
0.01uF
GND
A3V
C78
10uF
GND
C79
0.01uF
C80
0.01uF
GND
3.3V
C81
10uF
C82
0.1uF
C83
0.1uF
GND
C85
0.1uF
C84
0.1uF
C86
0.1uF
C87
0.1uF
C88
0.1uF
C89
0.1uF
C90
0.1uF
C91
0.1uF
C92
0.1uF
C93
0.1uF
C94
0.1uF
GND
A
A
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
ETHERNET
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.9
8
12
Date Friday, October 19, 2012
Sheet
of
NOTE : Ethernet circuit is optional and is not fitted on the standard board.
DNP : Do Not Populate
5
4
3
2
1
5
4
3
3.3V
R18
33R
24MHz
U4B
3
F1
F2
D3
B1
3.3V
R59
10K
DNP
GND
USB_XI
USB_XO
USB_VBUS
USB_ID
USB_RSET
USB_DM
USB_DP
USB_VREF
R61
24R
D2
J5
R62
24R
E2
E1
U13
11
10
DDDD+
UDUD+
1
2
3
4
5
R64
24R
6
7
ADSP_BF548
C133
1uF
16
14
C134
0.01uF
C123
0.01uF
GND
R63
24R
G3
C138
0.1uF
GND
VBUS2
VDD2
12
13
C137
0.1uF
PIN
SPD
9
15
GND
VBUS1
VDD1
PDEN
SPU
GND2
GND2
GND1
GND1
1
3
LED10
LED
4
5
C136
0.1uF
D8
PGB1010603
C135
0.1uF
D7
PGB1010603
GND
USB MINI B F
RV1
VARISTOR
R100
1K
2
8
FER4
600R
ADuM3160
GND
D
VBUS
DD+
NC
GND
S9
S8
S7
S6
D
OUT
GND
OE
3.3V
9
8
7
6
VDD
Y4
1
2
R14
10K
1
4
3.3V
2
USB_ISO_GND
USB_ISO_GND
USB_ISO_GND
USB_ISO_GND
R65
1M
C139
0.01uF
USB_ISO_GND
USB_ISO_GND
3.3V
JP2
+
R114
10K
3.3V
+
JUMPER
C
R111
10K
U44
ROUT1
ROUT2
TOUT1
TOUT2
RIN1
RIN2
C1+
C1-
R113
10K
C2+
C2-
3.3V
D11
F11
1
U16
2
H11
K11
3
C125
0.1uF
4
C11
E11
G11
G10
2
8
JP40
7
4
5
6
#RE
DE
SCREW_6
VCC
VCC
VCC
VISO
VISO
VISO
V+
V-
VISOOUT
TxD
RxD
Y
Z
RE
DE
A
B
1
3
9
10
A10
B10
C10
RS232_ISO_GND
C141
0.1uF
GND1
GND1
GND1
GND1
GND2
GND2
GND2
GND2
+
JUMPER
JP4
12
+
19
+
JUMPER
13
15
J7
1
18
17
2
RS232_ISO_3.3V
GND
B1
A2
B2
VCC
VCC
VISOIN
UART2TX
UART2RX
5
C126
0.1uF
+
+
TIN1
TIN2
RS485_ISO_3.3V
11
14
16
20
3
JP19
4
+
H1
K1
UART3RX
#UART3CTS
JP3
3.3V
+
D1
F1
UART3TX
#UART3RTS
J27
+
C
5
ADM2587E
6
R66
120R
B11
J11
SCREW_6
RS485_ISO_GND
C142
0.1uF
GNDISO
GNDISO
GNDISO
GNDISO
GNDISO
GNDISO
GNDISO
3.3V
3.3V
R58
10K
3.3V
11
10
UART1TX
#UART1RTS
RS485_ISO_3.3V
12
9
UART1RX
#UART1CTS
C151
10uF
C150
0.1uF
C155
0.1uF
C149
0.01uF
C154
10uF
C153
0.1uF
C156
0.1uF
C152
0.01uF
R57
10K
3.3V
GND
RS485_ISO_GND
GND
C111
0.01uF
C130
0.1uF
C236
10uF
C140
0.1uF
1
6
2
7
3
8
4
9
5
R1OUT
R2OUT
T1OUT
T2OUT
R1IN
R2IN
14
7
13
8
B
11
10
3.3V
DB9
1
3
C113
0.1uF
RS232_ISO_3.3V
T1IN
T2IN
C112
0.1uF
RS232_ISO_GND
3.3V
J4
U12
16
R56
10K
R55
33R
D10
E10
F10
H10
J10
K10
L10
ADM3252E
GND
3.3V
RS232_ISO_GND
A11
L11
VCC
DNC1
DNC2
RS485_ISO_GND
4
5
C1+
C1C2+
C2ADM3202
GND
C115
0.1uF
GND
B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A1
L1
V+
V-
2
6
15
C2
D2
E1
E2
F2
G1
G2
H2
J1
J2
K2
L2
C1
NC1
NC2
C114
0.1uF
C237
10uF
GND
GND
GND
GND
RS232_ISO_GND
A
A
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
USB, RS232, RS485
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
9
12
Date Wednesday, October 10, 2012
Sheet
of
5
4
3
2
1
5
4
3
2
1
3.3V
3.3V
SPI_M_ISO_3.3V
U22
3.3V 5V
CAN_ISO_5V
1
7
R106
10K
U17
1
3
7
9
10
TxD
RxD
CANH
CANL
NC
Rs
VREF
GND1
GND1
GND1
GND1
GND1
GND2
GND2
GND2
GND2
6
J8
19
+
1
2
17
15
18
14
JP18
4
JP17
SCREW_4
3.3V
SPI0MOSI
R69
60R4
6
JP7
+
7
+
2
8
CAN_ISO_GND
CAN_ISO_GND
VIA
VIB
VIC
VOA
VOB
VOC
VOD
VID
VE1
VE2
14
13
12
+
GND1
GND1
GND2
GND2
+
11
CAN_ISO_GND
+
+
GND
SPI_M_ISO_GND
+
C164
0.1uF
C160
0.01uF
+
C161
0.1uF
GND
GND
CAN_ISO_GND
7
C176
10uF
C175
0.1uF
C174
0.1uF
C179
10uF
C178
0.1uF
C177
0.1uF
SPI_M_ISO_GND
GND
+
SPI_M_ISO_GND
+
U21
3
4
JP37
5
6
R23
33R
VDD1
VIA
VIB
VDD2
VOA
VOB
VOC
VOD
VIC
VID
16
14
13
12
11
3.3V
7
#SPI0SEL2
R24
33R
VE1
VE2
10
C
+
C
SPI_M_ISO_3.3V
SPI_M_ISO_3.3V
R107
10K
C162
10uF
SPI_M_ISO_GND
3.3V
+
+
+
C158
0.01uF
D
9
15
JP16
1
C157
0.1uF
GND
SCREW_7
JP15
+
GNDISO
GNDISO
3
11
12
14
6
+
+
C163
0.1uF
5
GND1
GND1
13
+
+
3.3V
CAN_ISO_5V
4
JP13
3.3V
C159
10uF
10
16
ADuM5000
3
+
JP14
+
2
8
2
JP12
9
15
JP10
+
1
+
JP11
10
ADuM3401
+
NC1
NC2
NC3
NC4
J10
+
JP6
JP9
SPI0MISO
3.3V
VSEL
16
+
#SPI0SEL1
CAN_ISO_GND
VDD2
+
JP8
R77
33R
VDD1
JP5
3
4
5
SPI0SCK
C165
47nF
5V
RCSEL
RCIN
RCOUT
U20
R76
33R
R68
60R4
4
5
SPI_M_ISO_3.3V
R75
33R
R67
0R
11
13
16
20
JP36
1
3
ADM3053
GND
VISO
VISO
12
+
VISOIN
+
2
D
VISOOUT
VIO
+
5
4
CAN0TX
CAN0RX
VCC
+
6
+
8
VDD1
VDD1
JP20
+
#SPI0SEL3
2
8
GND1
GND1
GND2
GND2
ADuM3402
#SPI0SS
GND
SPI_M_ISO_GND
3.3V
3.3V
SPI_M_ISO_3.3V
SPI_M_ISO_3.3V
JP21
+
+
9
15
C180
0.1uF
GND
C182
0.1uF
GND
C183
0.1uF
GND
SPI_M_ISO_GND
C181
0.1uF
SPI_M_ISO_GND
3.3V
3.3V
I2C_ISO_3.3V
R108
10K
3.3V
U18
VDD1
VDD2
SDA1
SCL1
SDA2
SCL2
R73
120R
8
R74
120R
1
2
4
B
GND1
GND2
5
I2C_ISO_GND
I2C_ISO_3.3V
R104
33R
SPI2MOSI
I2C_ISO_GND
6
JP24
+
R105
33R
C173
0.01uF
VDD2
+
VIA
VIB
VIC
VOA
VOB
VOC
VOD
VID
7
6
VE1
VE2
14
13
12
+
+
#SPI2SEL1
I2C_ISO_GND
GND1
GND1
GND2
GND2
SPI2MISO
+
+
I2C_ISO_3.3V
+
SPI_S_ISO_GND
10
16
NC1
NC2
NC3
NC4
7
+
GND1
GND1
GNDISO
GNDISO
13
3
11
12
14
B
9
15
ADuM5000
6
+
GND
SPI_S_ISO_GND
SCREW_7
+
JP32
+
2
8
5
JP30
+
U19
1
7
4
+
JP31
+
VSEL
RCIN
RCOUT
3
+
+
JP27
3.3V
RCSEL
2
JP29
9
15
JP26
GND
VISO
VISO
+
+
10
4
5
1
JP28
ADuM3401
GND
J25
+
JP23
11
+
2
8
VDD1
VDD1
16
+
JP25
C172
0.01uF
VDD1
JP22
3
4
5
SPI2SCK
SCREW_3
GND
1
R103
33R
3
ADuM1250
3.3V
U42
+
7
6
1
7
SPI_S_ISO_3.3V
JP38
J22
2
3
SDA1
SCL1
SPI_S_ISO_3.3V
U25
3.3V
+
1
SPI_S_ISO_GND
3.3V
SPI_S_ISO_3.3V
+
JP33
VDD1
VDD1
VISO
VISO
10
16
+
3.3V
+
C192
10uF
SPI_S_ISO_3.3V
C191
0.1uF
C190
0.1uF
C195
10uF
C194
0.1uF
C193
0.1uF
3.3V
RCIN
RCOUT
2
8
GND1
GND1
VSEL
NC1
NC2
NC3
NC4
GNDISO
GNDISO
U43
1
3
11
12
14
R109
10K
7
R102
33R
I2C_ISO_GND
#SPI2SEL2
I2C_ISO_3.3V
R101
33R
JP34
+
+
3.3V
2
8
#SPI2SEL3
C167
0.1uF
C166
0.1uF
VOC
VOD
VDD2
VOA
VOB
VIC
VID
C171
10uF
C170
0.1uF
VE1
GND1
GND1
VE2
GND2
GND2
GND
16
GND
12
11
10
9
15
A
SPI_S_ISO_GND
3.3V
3.3V
SPI_S_ISO_3.3V
SPI_S_ISO_3.3V
JP35
GND
I2C_ISO_GND
C196
0.1uF
GND
5
SPI_S_ISO_GND
14
13
#SPI2SS
C169
0.1uF
+
C168
10uF
VIA
VIB
ADuM3402
+
A
JP39
VDD1
3.3V
ADuM5000
GND
3
4
5
6
9
15
+
RCSEL
4
5
13
+
6
4
GND
3
GND
C234
0.1uF
C235
0.1uF
SPI_S_ISO_GND
C197
0.1uF
SPI_S_ISO_GND
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
CAN, I2C, SPI
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
10 of
12
Date Thursday, July 12, 2012
Sheet
2
1
5
4
3
2
1
LVDS_ISO_3.3V_1
VCC
1
U28
2
D
DIN1
J24
DOUT1+
3.3V
LVDS_ISO_3.3V_1
DIN2
ADN4663
DOUT2+
DOUT2-
7
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
8
6
5
4
3
GND
DOUT1-
U26
1
VDD1
VDD2
16
LVDS_ISO_GND
DT2PRI
DT2SEC
3
4
DR2PRI
DR2SEC
5
6
VIA
VIB
VOC
VOD
VOA
VOB
VIC
VID
14
13
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
Header_32
12
11
LVDS_ISO_3.3V_1
2
8
GND1
GND1
VE2
GND2
GND2
9
15
U30
7
ADuM3442
ROUT1
3.3V
RIN1+
RIN1-
6
ROUT2
LVDS_ISO_3.3V_1
ADN4664
GND
LVDS_ISO_GND
3.3V
R84
100R
RIN2+
RIN2-
LVDS_ISO_3.3V_1
2
1
7
C207
0.1uF
3
6
4
4
5
VISO
VISO
RCSEL
VSEL
RCIN
RCOUT
R83
100R
NC1
NC2
NC3
NC4
2
8
LVDS_ISO_GND
GND1
GND1
GNDISO
GNDISO
10
16
1
7
13
6
4
5
3
11
12
14
9
15
VDD1
VDD1
VISO
VISO
RCSEL
VSEL
RCIN
RCOUT
2
8
ADuM5000
GND
LVDS_ISO_3.3V_2
U34
VDD1
VDD1
C
C199
0.1uF
3.3V
U32
1
5
GND
LVDS_ISO_GND
10
8
VE1
VCC
7
D
GND1
GND1
NC1
NC2
NC3
NC4
GNDISO
GNDISO
10
16
13
3
11
12
14
C
9
15
ADuM5000
LVDS_ISO_GND
GND
LVDS_ISO_GND
GND
LVDS_ISO_GND
LVDS_ISO_3.3V_2
VCC
U29
2
DIN1
DOUT1+
LVDS_ISO_3.3V_2
3.3V
LVDS_ISO_3.3V_2
DIN2
ADN4663
DOUT2+
DOUT2-
7
C212
10uF
C211
0.1uF
C210
0.1uF
C215
10uF
C214
0.1uF
C213
0.1uF
C218
10uF
C217
0.1uF
C216
0.1uF
C221
10uF
C220
0.1uF
C219
0.1uF
8
6
GND
LVDS_ISO_GND
GND
LVDS_ISO_GND
5
4
3.3V
GND
DOUT1-
3
LVDS_ISO_3.3V_1
1
3.3V
U27
1
VDD1
VDD2
16
LVDS_ISO_GND
TSCLK2
TFS2
3
4
RSCLK2
RFS2
5
6
VIA
VIB
VOA
VOB
VOC
VOD
VIC
VID
VE1
VE2
14
13
12
11
LVDS_ISO_3.3V_2
7
10
B
GND2
GND2
9
15
U31
7
ADuM3442
ROUT1
6
LVDS_ISO_3.3V_2
ROUT2
ADN4664
C208
0.1uF
GND
3.3V
RIN1+
RIN1-
LVDS_ISO_GND
RIN2+
RIN2-
2
1
3
4
R81
100R
5
GND
B
R82
100R
8
GND1
GND1
VCC
2
8
C209
0.1uF
LVDS_ISO_GND
GND
LVDS_ISO_GND
A
A
LVDS_ISO_3.3V_1
C198
0.1uF
LVDS_ISO_GND
5
LVDS_ISO_3.3V_1
C200
0.01uF
C201
0.1uF
LVDS_ISO_GND
4
LVDS_ISO_3.3V_2
C202
0.01uF
C203
0.1uF
LVDS_ISO_GND
LVDS_ISO_3.3V_2
C204
0.01uF
C205
0.1uF
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
LVDS
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
11 of
12
Date Thursday, July 12, 2012
Sheet
C206
0.01uF
LVDS_ISO_GND
3
2
1
5
4
3
2
1
D
D
J23
#HIROSE_RESET
LAN_IRQ/UART0RX
J26
3
2
1
CON3
CAN1RX
CAN1TX
GND
R71
100K
TMR8
TMR10
PD12
GND
PC12
PC10
PC8
PC5
PC6
C
#SPI1SS
#SPI1SEL3
#SPI1SEL2
PC7
DT3SEC
DR3SEC
PPI0_FS1
PPI0_D1
PPI0_D3
PPI0_D5
PPI0_D7
PPI0_D9
PPI0_D11
PPI0_D13
PPI0_D14
PPI0_D17
PPI0_D19
PPI0_D21
PPI0_D23
B
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
RESET_IN
UART_RX
GND
NC7
EEPROM_A0
NC6
NC5
NC4
GND
NC3
NC2
TMR_C
TMR_A
GPIO6
GND
GPIO4
GPIO2
GPIO0
SCL_1
SDA_1
GND
SPI_SEL1/SPI_SS
SPI_SEL_C
SPI_SEL_B
GND
SPORT_INT
SPORT_DT3
SPORT_DT2
SPORT_DT1
SPORT_DR1
SPORT_DR2
SPORT_DR3
GND
PAR_FS1
PAR_FS3
PAR_A1
PAR_A3
GND
PAR_CS
PAR_RD
PAR_D1
PAR_D3
PAR_D5
GND
PAR_D7
PAR_D9
PAR_D11
PAR_D13
PAR_D14
GND
PAR_D17
PAR_D19
PAR_D21
PAR_D23
GND
USB_VBUS
GND
GND
NC1
VIN
BMODE1
UART_TX
GND
NC8
NC9
NC10
NC11
NC12
GND
NC13
NC14
TMR_D
TMR_B
GPIO7
GND
GPIO5
GPIO3
GPIO1
SCL_0
SDA_0
GND
SPI_CLK
SPI_MISO
SPI_MOSI
SPI_SEL_A
GND
SPORT_TSCLK
SPORT_DT0
SPORT_TFS
SPORT_RFS
SPORT_DR0
SPORT_RSCLK
GND
PAR_CLK
PAR_FS2
PAR_A0
PAR_A2
GND
PAR_INT
PAR_WR
PAR_D0
PAR_D2
PAR_D4
GND
PAR_D6
PAR_D8
PAR_D10
PAR_D12
GND
PAR_D15
PAR_D16
PAR_D18
PAR_D20
PAR_D22
GND
VIO(+3.3V)
GND
GND
NC15
NC16
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
BMODE1
UART0TX
TMR9
PD13
PC13
PC11
PC9
SCL0
SDA0
C
SPI1SCK
SPI1MISO
SPI1MOSI
#SPI1SEL1
TSCLK3
DT3PRI
TFS3
RFS3
DR3PRI
RSCLK3
PPI0_CLK
PPI0_FS2
PPI0_D0
PPI0_D2
PPI0_D4
PPI0_D6
PPI0_D8
PPI0_D10
PPI0_D12
PPI0_D15
PPI0_D16
PPI0_D18
PPI0_D20
PPI0_D22
3.3V
B
HIROSE
GND
GND
A
A
Designed by Project Title
M. ABID
BF548 Isolated Transceivers EvalBoard
Drawn by
Page Title
M. ABID
HIROSE
Approved by Size
Board No.
Rev
C. REBAI
C
EB-201201
1.8
12 of
12
Date Wednesday, October 10, 2012
Sheet
5
4
3
2
1