DEMO MANUAL DC1846A LTC6947 Ultralow Noise and Spurious Fractional-N Synthesizer DESCRIPTION Demonstration circuit 1846A features the LTC®6947, an Ultralow Noise and Spurious Fractional-N Synthesizer. DC1846A provides 50Ω SMA connectors for the reference frequency (REF+) and the two single-ended RF outputs (RF+ and RF–). A DC590 USB serial controller board is used for SPI communication with the LTC6947, controlled by the supplied FracNWizard™ software. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and FracNWizard is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Frequency reference input, SMA Active loop filter op‐ amp DC supply, turret U3 (VCO) DC supply, turret Enable (pin 2) of U4 (VCO or VCXO), turret Ribbon cable connection to DC590 U4 (VCO or VCXO) DC supply, turret External VCO input, SMA 3.3 V DC supply, banana jacks Differential output of VCO buffer, SMA 5 V DC supply, banana jacks Figure 1. DC1846A Connections dc1846af 1 DEMO MANUAL DC1846A QUICK START PROCEDURE The DC1846A is easy to set up to evaluate the performance of the LTC6947. Follow the procedure below. Connect the DC590 to one of your computer’s USB ports with the included USB cable. The DC590 and FracNWizard application are required to control the DC1846A through a personal computer (PC). FracNWizard Installation DC590 Configuration Place the DC590 jumpers in the following positions (refer to Figure 2): JP4: EE – Must be in the EN position. JP5: ISO – ON must be selected. The FracNWizard software is used to communicate with the LTC6947 synthesizer. It uses the DC590 to translate between USB and SPI-compatible serial communications formats. It also includes advanced PLL design and simulation capabilities. The following are the FracNWizard system requirements: • Windows Operating System: Windows XP, Windows 2003 Server, Windows Vista, Windows 7 JP5: SW – ON must be selected. JP6: VCCIO – 3.3V must be selected. This sets the SPI port to 3.3V operation. • Microsoft .NET 3.5 SP1 or later • Windows Installer 3.1 or later • Linear Technology’s DC590 hardware J4, ribbon cable connection to the DC1846 J3, USB connection to PC JP4 jumper JP6 jumpers JP5 jumpers Figure 2. DC590 Jumper and Connector Locations dc1846af 2 DEMO MANUAL DC1846A QUICK START PROCEDURE Download the FracNWizard setup file at: 2.Choose the MUTE jumper setting: www.linear.com/FracNWizard JP1: GND/3.3V - MUTE position. Select GND to mute the RF output, 3.3V to unmute. Run the FracNWizard setup file and follow the instructions given on the screen. The setup file will verify and/or install Microsoft .NET and install the FracNWizard. Refer to the Help menu for software operation. DC1846A Configuration 1.Connect a 100MHz reference frequency source (at J2) and signal analyzers to RF+ and/or RF– (at J6 and/or J7) using the SMA connectors (see Figure 1 and the Typical DC1846A Requirements and Characteristics table). Be sure to terminate any unused RF output with 50Ω, or poor spurious performance may result. 3.Connect the GND, 3.3V, 5V banana jacks and the V+VCO turret to a power supply and apply power (see Figure 1 and the Typical DC1846A Requirements and Characteristics table). 4.Connect the DC590 to the DC1846A with the provided ribbon cable. 5.Run the FracNWizard application. 6.In FracNWizard, click File -> Load Settings and point to the “LTC6947_100MHz.fracnset” file. The red LED on the DC1846A should turn on indicating that the loop is locked at 2415MHz. Figure 3. FracNWizard Screenshot dc1846af 3 DEMO MANUAL DC1846A QUICK START PROCEDURE Troubleshooting If the red LED does not illuminate, follow the instructions below: 2.Verify that the 3.3V, 5V and V+VCO have the correct voltages on them and that the reference frequency is applied to the REF+ SMA input. 1.Verify that you are able to communicate with the DC1846A. The bottom status line in FracNWizard should read “LTC6947” and “Comm Enabled”. Refer to FracNWizard’s Troubleshoot and Help if not. If the red LED is on but you cannot detect an RF output, make sure the DC1846A jumper JP1 is at the 3.3V position. Run Help -> Troubleshoot in FracNWizard if the problem is not resolved. DC1846A RECONFIGURATION The DC1846A is flexible and allows the use of a variety of VCOs and the choice to employ either an active or passive loop filter. The following covers the hardware reconfiguration of the DC1846A. Refer to FracNWizard’s Help and the LTC6947 data sheet to better understand how to change programmed parameters on the DC1846A. Installing Different Tunable Devices The DC1846A permits the use of different tunable oscillators, such as VCOs and VCXOs. There are two different oscillator footprints on the board: U3, which accommodates the popular 0.5 × 0.5 in. package, and U4, which accommodates another common 14mm × 9 mm package with four or six pins. An external connectorized VCO can also drive the LTC6947 through J5. Table 1 gives options to customize the DC1846’s VCOs. When using an active loop filter, an additional pole is required in the loop filter to limit the op amp’s noise contribution to the VCO phase noise. Selecting Loop Filter Type The DC1846A can use either an active or a passive loop filter, depending upon the application. Some VCO tuning voltage ranges are greater than the LTC6947 charge pump voltage range (refer to the LTC6947 data sheet). In such cases, an active loop filter using an op amp can deliver the required tuning voltage. Table 2 summarizes these options. FracNWizard helps determine the component values listed in this table. Table 1. Oscillator Options TUNABLE DEVICE SELECTION COMPONENTS RESISTOR FOR ADDITIONAL POLE CAPACITOR FOR ADDITIONAL POLE POWER ENABLE PIN OR REMARKS Determined by U3 device power supply specification, up to 24V Pick C3_F2 such that 1/(2π × R2_F2 × C3_F2) ≅ applied to V+VCO turret 15 × the loop bandwidth in Hz for active loop filter U3* C26 ≅ 100pF, depopulate R2_F2 = 0Ω for passive loop filter* R2_F3, C25 and C28* R2_F2 = 75Ω for active loop filter C3_F2 = Open for passive loop filter* U4 C28 ≅ 100pF, depopulate R2_F3 = 0Ω for passive loop filter R2_F2, C25 and C26 R2_F3 ≅ 75Ω for active loop filter Determined by U4 Use EN turret to control device power supply pin 2 of U4 if needed specification, up to 24V Pick C3_F3 such that 1/(2π × R2_F3 × C3_F3) ≅ applied to V+VCXO turret 15 × the loop bandwidth in Hz for active loop filter External C25 ≅ 100pF, R15 = 0Ω Ohms, depopulate R13, C26 and C28 - C3_F3 = Open for passive loop filter - - Selection components are for an active loop filter. Connect the external VCO output to J5. Use CPGAIN to tune the external device. *These are the default installation options. For the DC1846A-A, U3 is populated with CVCO55CC-2328-2536 from Crystek dc1846af 4 DEMO MANUAL DC1846A DC1846A RECONFIGURATION Table 2. Loop Filter Options LOOP FILTER TYPE SELECTION RESISTORS RZ FROM FRACNWIZARD CI FROM FRACNWIZARD CP FROM FRACNWIZARD POWER CPINV BOX, SYSTEM TAB IN FRACNWIZARD Passive R14 and R16 = 0Ω, RZ_P depopulate R13 and R15 CI1_P in parallel with CI2_P CP_P None Unchecked Active R13 (except when RZ_A using an external VCO) and R15 = 0Ω, depopulate R14 and R16 CI1_A in parallel with CI2_A CP_A Determined by the maximum allowed tune voltage of the populated VCO (U3 or U4), up to 24V applied to V+OA turret Checked TYPICAL DC1846A REQUIREMENTS AND CHARACTERISTICS PARAMETER INPUT OR OUTPUT PHYSICAL LOCATION DETAILS 3.3V Power Supply Input J9 and J10 banana jacks Low noise and spur-free 3.3V, 103mA** 5V Charge Pump Power Supply Input J11 and J12 banana jacks Low noise and spur-free 5V, 22mA** 5V VCO Power Supply Input V+VCO turret Low noise and spur-free 5V, 30mA** REF+, Reference Frequency Input J2 SMA connector Low noise 100MHz**, 6 to 10dBm into 50Ω, see Note RF+ and RF– Two Outputs J6 and J7 SMA connectors*** 2328 to 2536MHz** in 190.7Hz** steps, 0dBm Loop Bandwidth – Set by loop filter component values 30.7kHz** **These values are for the “DC1846A_100MHz.fracnset” file and included VCO. ***Any unused RF output must be terminated with 50Ω, or poor spurious performance may result. Note: A low noise 100MHz reference frequency, such as the Wenzel 501-04516D OCXO, is recommended. If using a different frequency, make sure to update the Fref and R_DIV boxes under the System tab in FracNWizard so that Fpfd is still 50MHz. For example, if a 250MHz clock is used, Fref should be changed to 250MHz and R_DIV to 5. Ref BST and FILT under the System tab in FracNWizard might need to be changed if the reference frequency and/or power is different than what is recommended in the table above. More information can be found in the LTC6947 data sheet. dc1846af 5 DEMO MANUAL DC1846A PARTS LIST ITEM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 QTY 0 6 0 1 3 3 2 9 1 2 4 1 0 4 1 10 1 4 0 4 1 0 2 1 0 2 5 1 1 4 4 3 0 0 5 1 1 1 0 2 1 1 1 REFERENCE CI1_A, C3_F2, C3_F3, CP_A, C14 CI1_P, C5, C12, C13, C18, C31 CI2_P, CI2_A CP_P C1, C19, C33 C2, C21, C35 C3, C16 C4, C6, C11, C30, C36, C39, C41, C43, C44 C7 C8, C15 C17, C23, C34, C45 C2_F1 C25, C28 C26, C29, C37, C38 D1 E3, E6, E11-E18 JP1 J2, J5, J6, J7 J3, J4 J9, J10, J11, J12 J13 L1 L2, L3 L1_F1 L1_F2, L1_F3 R1_F1, RZ_P R1, R2, R11, R20, R26 R4 R5 R7, R8, R18, R19 R9, R14, R16, R2_F2 R12, R21, R22 R13, R15, R2_F3, RZ_A, R31 R23, R24 R25, R27, R28, R29, R30 U1 U2 U3 U4 U5, U10 U8 U11 SHUNT ON JP1 (2&3) PART DESCRIPTION CAP, 0603 CAP, 0603 1.0µF 10% 10V X7R CAP, 1206 CAP, 0603 47nF 10% 50V X7R CAP, 7361 47µF 10% 35V, 7361 CAP, 0805 0.1µF 10% 50V X7R CAP, 7343 330µF 10% 10V TANT CAP, 0402 0.1µF 10% 10V X7R CAP, 7343 47µF 10% 20V TANT CAP, 0402 1µF 10% 16V X5R CAP, 0402 0.01µF 10% 16V X7R CAP, 0603 33nF 10% 50V X7R CAP, 0402 CAP, 0402 100pF 10% 16V NPO LED, RED TURRET HEADER, 3-PIN 2mm CONN, SMA 50Ω EDGE-LAUNCH CONN, SMA 50Ω Straight JACK, BANANA HEADER, 7 DUAL PIN, 2mm IND, 0402 IND, 0402 68nH 5% RES, 0805, 0Ω JUMPER IND, 0805 RES, 0603 21Ω 1% 1/10W RES, 0402 4.99kΩ 1% 1/16W RES, 0402 330Ω 1% 1/16W RES, 0402 51.1Ω 1% 1/10W RES, 0402 200kΩ 1% 1/16W RES, 0603 0Ω JUMPER RES, 0402 100Ω 5% 1/16W RES, 0603 RES, 0402 RES, 0402 0Ω JUMPER IC, QFN28IUFD-4X5 IC, LOW NOISE AMP, SO8 IC, VCO IC, CRYSTAL OSCILLATOR IC, DUAL BUFFER, SC70 I.C., Serial EEPROM, TSSOP8 IC, DUAL TRANSCEIVER, SOT363 SHUNT, 2mm CTRS MANUFACTURER/PART NUMBER OPT TAIYO YUDEN, LMK107B7105KA-T OPT AVX 06035C473KAT2A AVX TAJV476K035RNJ AVX 08055C104KAT2A AVX TPME337K010R0035 TAIYO YUDEN, LMK105B7104KV-F AVX TAJD476K020RNJ TDK C1005X5R1C105K AVX 0402YC103KAT2A AVX 06035C333KAT2A OPT AVX 0402YA101KAT2A PANASONIC LN1251CTR MILL-MAX 2501-2-00-80-00-00-07-0 SAMTEC TMM-103-02-L-S E.F. JOHNSON, 142-0701-851 OPT KEYSTONE 575-4 MOLEX 87831-1420 OPT COILCRAFT 0402HPH-68NXJLW VISHAY CRCW08050000Z0EA OPT VISHAY CRCW060321R0FKED VISHAY CRCW04024K99FKED NIC NRC04F3300TRF VISHAY CRCW040251R1FKED VISHAY CRCW0402200KFKED VISHAY CRCW06030000Z0EA VISHAY CRCW0402101RJKED OPT OPT VISHAY CRCW04020000Z0EA LINEAR TECH. LTC6947IUFD LINEAR TECH. LT1678IS8#PBF CRYSTEK, CVCO55CC-2328-2536 OPT FAIRCHILD SEMI NC7WZ17P6X MICROCHIP, 24LC025-I /ST NXP 74LVC1T45GW SAMTEC 2SN-BK-G dc1846af 6 D C B A JP1 U3 MUTE C14 OPT 0603 1 RED 1 2 1. ALL RESISTORS ARE IN OHMS, 0402 2. ALL CAPACITORS ARE IN MICROFARADS, 0402. 8 7 6 5 4 3 2 1 3.3V 2328 - 2536 MHz VCO C30 0.1uF 3.3V R29 0 2 C8 1uF R5 51.1 D1 LN1251CTR C5 1uF 0603 C11 0.1uF 3.3V R4 330 C3 330uF 10V 7343 CVCO55CC-2328-2536 GND 3.3V + 3.3V NOTE: UNLESS OTHERWISE SPECIFIED -A * E6 J2 J10 J9 J3 E3 CS SCLK SDI SDO ASSY STATUS REF+ GND 3.3V CP OPT CP C15 1uF C4 0.1uF 29 R28 0 RF- R31 OPT 0603 C17 0.01uF 0805 L1_F1 0 QFN28UFD-4X5 C37 100pF J7 3 3.3V 0603 C2_F1 33nF L2 68nH 0402HPH-68NXJL V+D LDO SDO SDI SCLK CS STAT REF+ GND 2 MUTE 9 GNDA 10 RF3 11 28 REF- 27 V+REF 26 CP 25 V+CP 23 V+VCO 24 RF+ 12 22 15 16 17 18 19 20 21 J6 RF+ L3 3.3V 68nH 0402HPH-68NXJL C38 100pF 5V C23 0.01uF 0603 4 C45 0.01uF C28 OPT C26 100pF 9 10 11 U3 V+VCO GND RFOUT GND GND V+ GND GND VTUNE GND R14 5 6 7 8 5 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 35V 0805 C2 0.1uF C3_F2 OPT 0603 3 2 1 OPT GND EN VTUNE U4 2 REV 7 + C35 0.1uF + RFOUT 4 C16 330uF 10V 7343 + E14 E13 J5 E18 E17 E16 C33 E15 47uF 35V 7361 C19 47uF 35V 7361 J4 E12 J12 J11 E11 MICHEL A. DATE 01-28-14 EXT VCO IN EN GND GND V+VCXO GND V+VCO CPGAIN OPT CPGAIN GND 5V V+OA APPROVED 8 6 SCALE = NONE DATE: N/A SIZE LTC6947IUFD 7 8 SHEET 1 DEMO CIRCUIT 1846A 01/28/2014, 12:25 PM IC NO. 2 OF 2 REV. 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only R24 OPT 35V 0805 6 R23 VCC OPT 5 NC C13 1uF 0603 V+VCXO 5V V+VCO DESCRIPTION PRODUCTION REVISION HISTORY TECHNOLOGY KIM T. MICHEL A. TITLE: SCHEMATIC ULTRALOW NOISE AND SPURIOUS FRACTIONAL-N SYNTHESIZER C3_F3 OPT 0603 R2_F3 OPT 0603 R2_F2 0 0603 C1 47uF 35V 7361 L1_F3 OPT 0805 0603 + ECO __ L1_F2 OPT 0805 0 R13 OPT V+OA 6 APPROVALS 4 3 2 1 0603 +INB -INB OUTB * CI2_A OPT 1206 RZ_P 21 0603 35V 0805 B CI1_A OPT 0603 C21 0.1uF 12 A CUSTOMER NOTICE L1 OPT C25 OPT 0603 CI2_P OPT 1206 V- +INA -INA OUTA U2 LT1678IS8 CP_A OPT 0603 4 3 2 1 C12 1uF 0603 RZ_A OPT R1 4.99K 5 CI1_P 1uF 0603 5V LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. C34 0.01uF R30 0 C29 100pF 3.3V 47uF C7 20V 7343 0.1uF C6 R2 4.99K CP_P 47nF 0603 U1 LTC6947IUFD 1uF 0603 C31 VCO- VCO+ GNDB GNDC GNDD GNDE GNDF GNDG R15 OPT 0603 R16 0 3.3V R27 0 C18 1uF 0603 R25 0 0603 R1_F1 21 4 14 GNDH V+RF 13 BB 14 13 GND GND 8 GND 15 VCC GND 7 GND 16 GND GND 6 + 5 1 D C B A DEMO MANUAL DC1846A SCHEMATIC DIAGRAM dc1846af 7 1 2 3 A 1 V+ 2 5V 6 CS 4 SCK/SCL 7 MOSI/SDA 5 MISO 10 EEVCC 9 EESDA 11 EESCL 12 EEGND 14 AUX J13 HD2X7-079-MOLEX GND GND GND 13 8 3 4 WP R20 4.99K 6 5 7 3 2 1 R26 4.99K SCL SDA WP A2 A1 A0 U8 24LC025-I /ST R9 0 0603 C43 0.1uF 3.3V B C THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE 3 2 1 VCC GND DIR VCC(B) 4 5 6 3.3V E SDO SDI SCLK CS DATE: N/A SIZE LTC6947IUFD D SHEET 2 E DEMO CIRCUIT 1846A 01/28/2014, 12:25 PM IC NO. OF 2 2 REV. ULTRALOW NOISE AND SPURIOUS FRACTIONAL-N SYNTHESIZER 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only R18 200K C39 0.1uF C44 0.1uF R12 100 0.1uF R22 100 R21 100 C41 3.3V 3.3V TECHNOLOGY VCC(A) U11 74LVC1T45GW GND 5 4 3 2 6 1 U10 NC7WZ17P6X 5 2 VCC 4 3 GND 6 1 U5 NC7WZ17P6X D TITLE: SCHEMATIC R8 200K MICHEL A. KIM T. APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. CUSTOMER NOTICE C36 0.1uF R7 200K R19 200K DC590B SPI INTERFACE C NOTE: EEPROM FOR BOARD IDENTIFICATION EEGND R11 4.99K V+DIG CS SCLK SDI SDO ARRAY B EEPROM 8 VCC GND 8 4 A 1 2 3 4 DEMO MANUAL DC1846A SCHEMATIC DIAGRAM Note: The buffers shown on sheet 2 of 2 of the schematic are used to protect the LTC6947 when connected to the DC590 before the LTC6947 is powered up. There is no need for such circuitry if the SPI bus is not powered before powering up the LTC6947. The EEPROM is for identification and is not needed to program the LTC6947. dc1846af DEMO MANUAL DC1846A LAYOUT TOP LAYER dc1846af Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 9 DEMO MANUAL DC1846A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation dc1846af 10 Linear Technology Corporation LT 0514 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2014