Supertex inc. AN-D12 Application Note High Voltage Ramp Generator Introduction A low cost 500V high voltage ramp generator is shown in Figure 1. High voltage ramps are ideal for applications requiring a linear relationship between output voltage and time, e.g., high voltage sweeping, automatic test equipment and piezo electric drivers. 500V The ramp is designed to be 0.1V/µsec. Capacitor value C should be kept small to reduce charging and discharging a large amount of energy. The selection of C should be large enough so that output loads and stray capacitances will not introduce significant error. C is chosen to be 1.0 nF. The charging characteristic for a capacitor is I = C (dv/dt). LND150N3 R1 13k C 1nF Calculations for Component Values I = 1.0 nF x 0.1 V/µsec = 100µA. Calculating R1 for a 100 µA constant current source: R2 3.3k VN0550N3 500V VOUT D G LND1 S VIN ID R1 Figure 1 Circuit Description The high voltage ramp generator shown in Figure 1 utilizes two Supertex high voltage DMOS transistors, the LND150N3 and the VN0550N3, two resistors, R1 and R2, and a capacitor C. R1 is a trimpot resistor. The LND150N3 is a 500V ESD protected N-channel depletion-mode MOSFET and the VN0550N3 is a 500V N-channel enhancement-mode MOSFET. Both transistors are available in the TO-92 package. The LND1 is configured as a constant current source charging a capacitor C. R1 introduces negative feedback to regulate and set the desired constant current value. When the constant current source begins charging capacitor C, a voltage ramp is generated across the capacitor. The voltage ramp, VOUT, is the voltage across the capacitor. The VN0550 can be turned on with a TTL or CMOS control signal to reset the ramp voltage VOUT by discharging the capacitor to ground through R2. The VN0550 has a typical onresistance of 45Ω at a 10V gate drive and 50Ω at a 5.0V gate drive. Resistor R2 is calculated to limit the discharge current for the VN0550 to operate within its SOA rating. ID = IDSS 1 - = VGS 2 , VGS = -IDR1 VGS(OFF) 2 IDR1 IDSS 1 + VGS(OFF) Solving for R1: R1 = VGS(OFF) ID ID √ IDSS -1 VGS(OFF) = pinch-off voltage. Measured value = -1.6V. IDSS = saturation current at VGS = 0V. Measured value = 3.0 mA. Calculating for R1 using the typical values: R1 = -1.6V 100µA 100µA 3.0mA - 1 = 13.1kΩ R1 should therefore be adjusted to approximately 13.1kΩ. Doc.# DSAN-AN-D12 A040213 Supertex inc. www.supertex.com AN-D12 During power up and down, it is possible to have high transient voltages to the gate of the LND1. The LND1 internal ESD gate-to-source protection will protect the device against such transients. Calculating for a minimum R2: PDISS = ID • VDS, VDS = 500V - (ID • R2) ID(ON) min = 150mA, The VN0550 performs the reset function by discharging capacitor C through resistor R2. The VN0550’s low output capacitance, (COSS) of 10pF max, minimizes additional parallel capacitance across capacitor C. It is desirable to discharge VOUT rapidly and as close to ground as possible. This can be accomplished with a low value R2. However, care should be taken not exceed the SOA rating of the VN0550N3. PDISS = 3.0W R2 = (1/ID)(500V - PDISS/ID) = (1/150mA)(500V - 3.0W/150mA) = 3.2KΩ R2 is set to a standard resistor value of 3.3kΩ. Figures 2 and 3 show two different input signals with their corresponding output voltage ramps. The ramp can be adjusted by varying R1. Maximum peak power for VN0550 in a TO-92 package is 3.0W. Conclusion The LND1 is ideally suited for high voltage, low constant current source applications. High voltage ramp generators, high voltage triangular waveform generators, high voltage references, biasing circuitry and active loads for discrete high voltage amplifiers are some examples. Figure 2 Figure 3 Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSAN-AN-D12 A040213 2 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com