5 4 3 2 1 JP1 VREF 2 TRIM 6 VOUT C2 0.1UF 7 5V NC 8 NC 1 D 5 VOUT EXT E1 GND C3 4.7UF,6.3V 0805 VCC C1 0.1UF VIN 2 NC 1 JP2 REJECTION 3 1 50Hz E6 60Hz E7 FO FO VCC J1 C4 10UF,6.3V 0805 VREF C5 0.01UF E4 V+ U1 E3 VIN 1 VREF VCC 2 VIN VREF 3 VIN 4 E5 C D GND LT1236ACS8-5 VCC E2 GND 4 NC 3 2 3 U2 GND FO 8 SCK 7 SDO 6 GND R3 OPT VCC 1 1 2 2 SCK 3 3 4 4 MISO 5 5 6 6 CS CS 5 LTC2400CS8 U3 1 I1 2 GND 3 I0 C7 0.1UF R2 100 VCC S 6 VCC 5 1 Z 4 2 A1 3 A2 4 VSS 24LC025 NC7SZ157P6X VCC C6 0.1UF R4 10K CP 4 JP4 OPT SCL 6 SDA 5 R1 R5 4.99K 4.99K 1% 1% 10 11 11 12 12 13 13 14 14 2 TRIGGERED Q 5 Q 3 NORMAL 3 1 JP3 B TRIG MODE 2 TRIG IN D GND VCC 8 CLR PR 7 1 1 A0 9 9 10 6 CP B VCC 8 WP 7 R6 4.99K 1% C HD2X7-079-MOLEX U4 NL17SZ74US 2 U5 7 7 8 8 NOTES: UNLESS OTHERWISE SPECIFIED CONTRACT NO. APPROVALS 1. ALL RESISTORS ARE IN OHMS, 0603. ALL CAPACITORS ARE IN MICROFARADS, 0603. A DRAWN: 2. INSTALL SHUNT ON JP1-JP3 PIN 1 AND 2. TECHNOLOGY KIM T. CHECKED: TITLE: SCHEMATIC SIZE DWG NO. 24-BIT DELTA SIGMA ADC APPROVED: ENGINEER: MARK T. DESIGNER: A DATE: 5 4 3 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 Fax: (408)434-0507 LTC Confidential-For Customer Use Only 2 DC573A-1 * LTC2400CS8 Friday, March 21, 2003 SHEET 1 REV A 1 OF 1 A