INTEGRATED CIRCUITS PDI1284P11 3.3V Parallel interface transceiver/buffer Product specification Supersedes data of 1997 Sep 15 1999 Sep 17 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer FEATURES PDI1284P11 DESCRIPTION • Asynchronous operation • 8-Bit transceivers • 6 additional buffer/driver lines peripheral to cable • 5 additional control lines from cable • 5V tolerant • ESD protection exceeds 2000V per MIL STD 883 Method 3015 The PDI1284P11 parallel interface chip is designed to provide an asynchronous, 8-bit, bi-directional, parallel interface for personal computers. The part includes all 19 signal lines defined by the IEEE1284 interface specification for Byte, Nibble, EPP, and ECP modes. The part is designed for hosts or peripherals operating at 3.3V to interface 3.3V or 5.0V devices. The 8 transceiver pairs (A/B 1-8) allow data transmission from the A bus to the B bus, or from the B bus to the A bus, depending on the state of the direction pin DIR. and 200V per Machine Model The B bus and the Y9-Y13 lines have either totem pole or resistor pull up outputs, depending on the state of the high drive enable pin HD. The A bus has only totem pole style outputs. All inputs are TTL compatible with at least 400mV of input hysteresis at VCC = 3.3V. • Latch up protection exceeds 500 mA per JEDEC Std 19 • Input Hysteresis • Low Noise Operation • IEEE 1284 Compliant Level 1 & 2 • Overvoltage Protection on B/Y side for OFF-state • A side 3-State option • B side active or resistive pull up option • Cable side VCC for 5V or 3V operation QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT RD B/Y Side output resistance VCC = 3.3V; VO = 1.65V ±0.2V (See Figure 2) 45 Ω RPU B/Y side pull up resistance VCC = 3.3V; Outputs, resistive pull up 1.4K Ω SR B/Y Side slew rate RL = 62Ω; CL = 50pF (See Waveform 4) 0.2 V/ns ICC Total static current VI = VCC/GND; IO = 0 5 µA Input hysteresis VCC= 3.3V 0.47 V Propagation delay to the B/Y side outputs VCC = 3.3V 12.5/13.9 ns VHYS tPLH/tPHL A –B/Y ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 48-pin plastic SSOP Type II 0°C to +70°C PDI1284P11 DL SOT370-1 48-pin plastic TSSOP Type II 0°C to +70°C PDI1284P11 DGG SOT362-1 1999 Sep 17 2 853–2036 22356 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER SYMBOL 8, 9, 11, 12, 13, 14, 16, 17 A1 - A8 Data inputs/outputs 41, 40, 38, 37, 36, 35, 33, 32 B1 - B8 IEEE 1284 Std. outputs/inputs 2, 3, 4, 5, 6 A9 - A13 Data inputs 47, 46, 45, 44, 43 Y9 - Y3 IEEE 1284 Std. outputs 29, 28, 27, 26 C14 - C17 Control inputs (cable) 20, 21, 22, 23 A19 - A17 Control outputs (peripheral) 1 HD B/Y–side high drive enable/disable 48 DIR Direction selection A to B / B to A 19 PLHI Peripheral logic high input (peripheral) 30 PLHO Peripheral logic high output (cable) 25 HLHI Host logic high input (cable) 24 HLHO Host logic high output (cable) 10, 15, 39 GND Ground (0V) 7, 18 VCC Positive supply voltage C16 31, 42 VCCB Cable side power supply voltage 3V/5V 26 C17 34 OEA A side output enable 25 HLHI HD 1 48 DIR A9 2 47 Y9 A10 3 46 Y10 A11 4 45 Y11 A12 5 44 Y12 A13 6 43 Y13 VCC 7 42 VCCB A1 8 41 B1 A2 9 40 B2 GND 10 39 GND A3 11 38 B3 A4 12 37 B4 A5 13 36 B5 A6 14 35 B6 GND 15 34 OEA A7 16 33 B7 A8 17 32 B8 VCC 18 31 VCCB PLHI 19 30 PLHO A14 20 29 C14 A15 21 28 C15 A16 22 27 A17 23 HLHO 24 SV00496 1999 Sep 17 PDI1284P11 3 FUNCTION Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer LOGIC SYMBOL PDI1284P11 FUNCTION TABLE HD DIR OEA CNTL HD HD A9 HD A10 HD A11 X C14-17 A14-17 tP X HLHI HLHO tP Y10 X X L A9-13 Y9-13 rP X X H A9-13 Y9-13 tP X X L PLHI PLHO O.C. CNTL HD B2 CNTL A3 HD A4 B4 HD A5 B5 HD A6 B6 CNTL HD A7 B7 CNTL * HD A8 B8 CNTL HD PLHI PLHO A14 C14 A15 C15 A16 C16 A17 C17 HLHO HLHI PERIPHERAL SIDE CABLE SIDE SV00136 PINS WITH PULL UP RESISTORS TO LOAD CABLE PINS SYMBOL FUNCTION 47, 46, 45, 44, 43 Y9 – Y13 Output cable drivers 41, 40, 38, 37, 36, 35, 33, 32 B1 – B8 Output cable drivers 29, 28, 27, 26 C14 – C17 External cables control signal input 1999 Sep 17 X H PLHI PLHO tP X L A1-8 B1-8 rP H X H A1-8 B1-8 tP L L X B1-8 A1-8 tP L H X A1-8 Z* H X A = B = C = Y = X = Z = O.C.= tP = rP = B3 CNTL X H L HD CNTL OUTPUT TYPES X B1 CNTL OUTPUTS X HD A2 INPUTS X Y13 A1 HD X Y12 HD A13 OEA Y9 Y11 HD A12 DIR 4 B1-8 rP* Side driving internal IC Side driving external cable (bidirectional) Side receiving control signals from internal cable Side driving external cable (unidirectional) Don’t care – control signals in High Z or 3-State Open collector Totem pole output Resistive pull up: 1.4kΩ (nominal) on B/Y/C cable side and VCC. However, while a B/Y side output is Low as driven by a Low signal on the A side, that particular B/Y side resistor is switched out to stop current drain from VCC through it. When DIR = L and OEA = H, the output signal is isolated from the input signal. B1 – 8 signals maintain an rP = 1.4kΩ on the input for this mode. Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer PDI1284P11 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL CONDITIONS RATING UNIT "1 kV –0.5 to +4.6 V ESD Immunity, per Mil Std 883C method 3015 VCC DC supply voltage VCCB DC cable supply voltage –0.5 to +6.5 V IIK DC input diode current VI < 0 ±20 mA IOK DC output diode current VO < 0 ±50 mA –0.5 to +5.5 V –0.5 to +5.5 V VIN VOUT B/Y VOUT B/Y VOUT A IO Tstg ICC/IGND DC input voltage3 DC output voltage on B/Y side3 Transient output voltage on B/Y side4 40ns transient DC output voltage on A side DC output current –2 to +7 V –0.5 to VCC +0.5 V ±50 mA –60 to +150 °C ±200 mA Outputs in High or Low state Storage temperature range Continuous current through VCC or GND NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 4. VOUT B/Y (tr) guarantees only that this part will not be damaged by reflections in application so long as the voltage levels remain in the specified range. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER MIN MAX UNIT VCC DC supply voltage 3.0 3.6 V VCCB DC cable supply voltage 3.0 5.5 V VIH High level Input voltage 2.0 VIL Low level input voltage VOUT B/Y VOUT A B/Y output voltage A side output voltage V 0.8 V –0.5 5.5 V 0 VCC V IOH B/Y side output current High –14 mA IOL B/Y side output current Low 14 mA +70 °C Tamb 1999 Sep 17 Operating free-air temperature range 0 5 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer PDI1284P11 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VHYS, A, B UNIT Tamb = 0°C to 70°C TYP MAX Input hysteresis A, B, control inputs, VCC = 3.3V, VIL= 0.8, VIH = 2.0 0.4 V VIH, A, B, PLHI High-level input voltage VCC = 3.0 to 3.6V 2.0 V VIL, A, B, PLHI Low-level input voltage VCC = 3.0 to 3.6V Input hysteresis C Inputs, VCC = 3.3V 0.8 VIH, C High-level input voltage C Inputs, VCC = 3.0 to 3.6V 2.3 VIL C Low-level input voltage VCC = 3.0 to 3.6V VIH HLH High-level input voltage VCC = 3.6V VIL HLH Low-level input voltage VCC = 3.0 VHYS, C 0.8 V V V 0.8 2.6 V V 1.55 V RDP Output impedance VCC = 3.3V, VO = 1.65 "0.1V See Fig. 2 35 45 55 Ω RDN Output impedance VCC = 3.3V, VO = 1.65 "0.1V See Fig. 2 35 45 55 Ω RPU Pull up resistance VCC = 3.3V, outputs in high Z 1.15 1.4 1.65 kΩ VOH, B/Y High-level output voltage VCC = 3.0V, IOH = –14mA 2.23 VOL, B/Y Low-level output voltage VCC = 3.0V, IOL = 14mA VOH, A and HLH High level output voltage High-level VOL, A and HLH Low level output voltage Low-level VO PLH ICC 2 ICCBL CC Ioff C/B/Y side V 0.77 IOH = –500µA, VCC = 3.0V 2.8 IOH = –4mA, VCC = 3.0V 2.4 V V IOL = 50µA, VCC = 3.0V 0.2 IOL = 4mA, VCC = 3.0V 0.4 V High-level output voltage IOH = 500µA, VCC = 3.15V Low-level output voltage IOL = 500µA, VCC = 3.0V Quiescent supply current for VCC and VCCB under all conditions except when B or C inputs are LOW VCC = 3.6V, VCCB = 3.6V to 5.5V Vin = 0 or VCC; VBin = VCCB Vcin = VCCB or Floating 0.1 100 µA VCC = VCCB = Vdir = 3.6V Vin = 0 or VCC; Vcin = 0V 10 15 mA VCC = Vdir = 3.6V; VCCB = 5.5V Vin = 0 or VCC; Vcin = 0V 16 20 VCC = VCCB = 3.6V; Vdir = 0V Vin =0 or VCC; VBin = Vcin = 0V 30 40 VCC = 3.6V, VCCB = 5.5V; Vdir = 0V Vin = 0 or VCC; VBin = Vcin = 0 V 47 60 Quiescent supply current for VCCB when B or C in uts inputs are LOW Power off leakage current 3.1 0.8 VO = 5.5V, VCC = VCCB = 0 )100 VO = 5.5V, VCC = 0, VCCB = 4.5V ±100 V mA µA Iin1 Input leakage current Input leakage current1 Vin = 0 to VCC ±1 µA IOZ1 3-State output current VOUT = VCC or GND ±20 µA NOTES: 1. The pull up resistor on the B side outputs makes it impossible to test IOZ on the B side. This applies to the input current on the C side inputs as well. 2. Includes extra ICCB current from pull-up resistors, i.e. ICCBL = (#B + #C LOW inputs) * (VCCB/RPU). 1999 Sep 17 6 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer PDI1284P11 AC CHARACTERISTICS GND = 0V, tR = tF = 3.0ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER TEST CONDITIONS WAVEFORMS MIN tpLH tpHL tpLH tpHL tpLH tpHL tpLH tpHL tpLH tpHL tslew tpHZ tpZH tDIFF tpHZ tpZH Propagation delay Path A to B or Y 2 5 2, Propagation delay Path B to A 2 5 2, Propagation delay Path C to A 2 5 2, Propagation delay Path PLH 2 5 2, Propagation delay Path HLH 2 5 2, Slew rate B or Y side outputs tpLZ 4 Output enable/ disable time HD to Y or B RL = 500Ω Propagation delay difference HD prop tpZH–tpHZ Output enable time HD to PLHO RL = 500Ω Output enable/ disable time Dir to B RL = 250Ω on the B/Y side tP load 3 3 0 12 0 12 15 20 15 0.05 0.4 20 ns ns ns ns ns V/ns ns ns 20 20 ns 50 Fig 1. 30 50 ns 30 Output enable/ disable time Dir to A RL = 250Ω 1 15 Fig 1. 50 15 ns 50 Output enable/ disable time OEA to A RL = 250Ω 3 6 Fig 1. 12 6 tpZL 1999 Sep 17 20 10 tpHZ tpLZ 20 0 20 tpZL tpZH 0 15 tpZL tpLZ MAX 20 tpHZ tpZH TYP 15 tpHZ tpZH UNIT Tamb = 0°C to +70°C 12 7 ns Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer PDI1284P11 AC WAVEFORMS VM = 1.5V VX = VOL ±0.3V VY = VOH –0.3V VOL and VOH are the typical output voltage drops that occur with the output load. (VCC never goes below 3.0V). V = 2.7V INPUTS VM DIR to A VM GND tPHL tPLH OUTPUTS tPZL tPLZ VOH VM DIR to B VM HD to B VM VOL SY00001 Waveform 1. Input Bn to output An propagation delays VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL 2.4V INPUT 1.4V tPZH 1.4V tPHZ 0.4V tPLH VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND tPHL VOUT OUTPUT VM VX 1.4V VY VM outputs enabled VOUT –1.4V outputs disabled outputs enabled SY00002 SY00008 Waveform 3. 3-State enable and disable times Waveform 2. Voltage Waveforms Propagation Delay Times (A To B) Measured at Output Pin 2.4V INPUT 0.4V 2.4V 0.9V OUTPUT 1.9V 0.4V t1 t2 t1 t2 SY00007 Waveform 4. Slew Rate Voltage Waveforms on B/Y side (Input pulse rise and fall time are 3ns, 150ns t pulse width t10 µs, for both a Low to High and a High to Low transition.) Slew Rate measured between 0.4V and 0.9V - rising. Slew Rate measured between 2.4V and 1.9V - falling. Slew Rate measured at VOUT as specified in Waveform 5. 1999 Sep 17 8 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer PDI1284P11 TEST CIRCUITS AND WAVEFORMS VCC VIN VOUT D.U.T. PULSE GENERATOR SWITCH POSITION Bn or Yn Outputs V=2.8V 50pF S1 RT TEST SWITCH tPLH tPHL GND V=2.8V GND RL = 500Ω tPLH/PHL = 62Ω for SR test Test Circuit for Bn or Yn Outputs VCC VIN NEGATIVE PULSE VOUT PULSE GENERATOR tW 90% 90% AMP (V) VM VM 10% 10% 0V D.U.T tTHL (tf) tTHL (tf) RT RL CL tTLH (tr) tTLH (tr) 90% POSITIVE PULSE Test Circuit for An Outputs AMP (V) 90% VM VM 10% 10% tW 0V VM = 1.5V Input Pulse Definition DEFINITIONS CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. INPUT PULSE REQUIREMENTS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. PDI1284 Amplitude Rep. Rate tW tr tf 3.0V 1MHz 500ns 3ns 3ns SV001741 Waveform 5. S1 VCC PULSE GENERATOR VI 2 x VCC Open GND VCC 500Ω VO IO D.U.T. RT VCC VI 50pF CL D.U.T. Test S1 tPLH/tPHL Open t 2.7V VCC tPLZ/tPZL 2 x VCC 2.7V – 3.6V 2.7V tPHZ/tPZH GND IO is measured by forcing VCC/2 on the output. RD can then be calculated using the equation RD = VCC/2 ť IO ť. SY00005 SY00003 Figure 2. Output Impedance RD Figure 1. Load Circuitry for Bn to An Switching Times 1999 Sep 17 VCC/2 500Ω 9 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm 1999 Sep 17 10 PDI1284P11 SOT370-1 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm 1999 Sep 17 11 PDI1284P11 SOT362-1 Philips Semiconductors Product specification 3.3V Parallel interface transceiver/buffer PDI1284P11 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 09-99 Document order number: 1999 Sep 17 12 9397 750 06421