INTEGRATED CIRCUITS 74LVT240 ABT octal inverting buffer (3-State) Product specification Supersedes data of 1994 May 16 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 FEATURES DESCRIPTION • Octal bus interface • 3-State buffers • Output capability: +64mA/-32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The LVT240 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal inverting buffer that is ideal for driving bus lines. The device features two Output Enables (1OE, 2OE), each controlling four of the 3-State outputs. resistors to hold unused inputs • Power-up 3-State • Live insertion/extraction permitted • No bus current loading when output is tied to 5V bus • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER tPLH tPHL Propagation delay nAx to nYx CL = 50pF; VCC = 3.3V CIN Input capacitance VI = 0V or 3.0V COUT Output capacitance Outputs disabled; VO = 0V or 3.0V ICCZ Total supply current Outputs disabled; VCC = 3.6V TYPICAL UNIT 2.5 2.6 ns 4 pF 8 pF 0.12 mA ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic SOL PACKAGES –40°C to +85°C 74LVT240 D 74LVT240 D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74LVT240 DB 74LVT240 DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT240 PW 74LVT240PW DH SOT360-1 PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 2, 4, 6, 8 1A0 – 1A3 Data inputs 1OE 1 20 VCC 11, 13, 15, 17 2A0 – 2A3 Data inputs 1A0 2 19 2OE 18, 16, 14, 12 1Y0 – 1Y3 Data outputs 2Y3 3 18 1Y0 9, 7, 5, 3 2Y0 – 2Y3 Data outputs 1A1 4 17 2A3 2Y2 5 16 1Y1 1, 19 1OE, 2OE Output enables 1A2 6 15 2A2 10 GND Ground (0V) 20 VCC Positive supply voltage 2Y1 7 14 1Y2 1A3 8 13 2A1 2Y0 9 12 1Y3 11 2A0 GND 10 SV00006 1998 Feb 19 2 853-1744 18991 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 2 1A0 1Y0 4 1A1 1Y1 1A2 1Y2 1A3 1Y3 6 8 18 1 2 14 12 1 1OE 2A0 2Y0 2A1 2Y1 15 2A2 2Y2 17 2A3 2Y3 11 13 19 EN 16 9 18 4 16 6 14 8 12 19 EN 7 5 11 9 13 7 15 5 17 3 3 2OE SV00007 SV00008 FUNCTION TABLE INPUTS H L X Z = = = = OUTPUTS nOE nAx nYx L L H L H L H X High voltage level Low voltage level Don’t care High impedance “Off” state Z ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL PARAMETER CONDITIONS RATING UNIT VCC DC supply voltage –0.5 to +4.6 V VI DC input voltage3 –0.5 to +7.0 V Output in Off or High state –0.5 to +7.0 V Output in Low state 128 Output in High state –64 VOUT DC output voltage3 IOUT O DC output current mA IIK DC input diode current VI < 0 –50 mA IOK DC output diode current VO < 0 –50 mA Tstg Storage temperature range –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. 1998 Feb 19 3 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC LIMITS PARAMETER DC supply voltage UNIT MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA Low-level output current 32 Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64 IOL 2.0 ∆t/∆v Input transition rise or fall rate; outputs enabled Tamb Operating free-air temperature range V –40 mA 10 ns/V +85 °C DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = -40°C to +85°C MIN VIK Input clamp voltage VCC = 2.7V; II = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH High-level output voltage Low-level output voltage Input In ut leakage current IHOLD Output off current Bus Hold current A in utsNO TAG inputs V V VCC = 2.7V; IOH = –8mA 2.4 2.5 V VCC = 3V; IOH = –32mA 2 2.2 V 0.1 0.2 VCC = 2.7V; IOL = 24mA 0.3 0.5 VCC = 3V; IOL = 16mA 0.25 0.4 VCC = 3V; IOL = 32mA 0.3 0.5 VCC = 3V; IOL = 64mA 0.4 0.55 VCC = 3.6V; VI = VCC or GND VCC = 3.6V; VI = VCC Control pins Data pins ins4 VCC = 3.6V; VI = 0 IOFF –1.2 VCC-0.1 VCC = 0 or 3.6V; VI = 5.5V II MAX 0.9 UNIT VCC-0.2 VCC = 2.7V; IOL = 100µA VOL TYP1 VCC = 0V; VI or VO = 0 to 4.5V 1 10 ±0.1 ±1 0.1 1 –1 -5 1 ±100 VCC = 3V; VI = 0.8V 75 150 VCC = 3V; VI = 2.0V –75 –150 VCC = 0V to 3.6V; VCC = 3.6V ±500 V µA µA µA Current into an output in the High state when VO > VCC VO = 5.5V; VCC = 3.0V 60 125 µA Power up/down 3-State output current3 VCC = ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don’t care ±1 ±100 µA IOZH 3-State output High current VCC = 3.6V; VO = 3.0V 1 5 µA IOZL 3-State output Low current VCC = 3.6V; VO = 0.5V –1 –5 µA VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 0.12 0.19 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 IEX IPU/PD ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 3 12 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 0NO TAG 0.12 0.19 VCC = 3.0 to 3.6V; One input at VCC -0.6V; Other inputs at VCC or GND 0.1 0.2 mA mA NOTES: 1. All typical values are at Tamb = 25°C. 2. This is the increase in supply current for each input at VCC –0.6V. 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 10% a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C, only. 4. Unused pins at VCC or GND 5. ICCZ is measured with outputs pulled to VCC or GND. 6. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 4 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω;Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER Tamb = –40°C to +85°C VCC = +3.3V ±0.3V VCC = 2.7V MIN TYP1 MAX MAX WAVEFORM UNIT tPLH tPHL Propagation delay nAx to nYx 1 1 1 2.5 2.5 4.3 4.3 5.2 5.0 ns tPZH tPZL Output enable time to High and Low level 2 1 1 3.7 3.1 5.2 5.2 6.3 6.7 ns tPHZ tPLZ Output disable time from High and Low level 2 2 1.6 3.4 3.2 5.6 5.1 6.3 5.6 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V VIN VIN nOE INPUT VMI VMI nAx INPUT VM VM 0V tPLZ tPZL tPHL 3.0V tPLH VMO nYx OUTPUT VOL + 0.3V nYx OUTPUT VM VM tPHZ tPZH VOL VOH nYx OUTPUT VMO VOH – 0.3V SA00037 0V Waveform 1. Input (nAx) to Output (nYx) Propagation Delays SV00104 Waveform 2. 3-State Output Enable and Disable Times 1998 Feb 19 5 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 TEST CIRCUIT AND WAVEFORMS 6.0V VCC Open VIN VOUT PULSE GENERATOR RL GND tW 90% NEGATIVE PULSE 90% VM VM 10% 10% D.U.T. RT 0V CL tTHL (tF) RL tTLH (tR) tTLH (tR) tTHL (tF) 90% Test Circuit for 3-State Outputs POSITIVE PULSE AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLH/tPHL Open tPLZ/tPZL 6V tPHZ/tPZH GND AMP (V) 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. 74LVT Amplitude Rep. Rate 2.7V 10MHz tW tR tF 500ns 2.5ns 2.5ns RT = Termination resistance should be equal to ZOUT of pulse generators. SV00092 1998 Feb 19 6 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 SO20: plastic small outline package; 20 leads; body width 7.5 mm 1998 Feb 19 7 SOT163-1 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1998 Feb 19 8 SOT339-1 Philips Semiconductors Product specification 3.3V Octal inverting buffer (3-State) 74LVT240 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1998 Feb 19 9 SOT360-1 Philips Semiconductors Product specification 74LVT240 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 10 Date of release: 05-96 9397-750-03806