INTEGRATED CIRCUITS 74ABT543A Octal latched transceiver with dual enable (3-State) Product specification Supersedes data of 1995 Apr 19 IC23 Data Handbook 1998 Sep 24 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A The 74ABT543A Octal Registered Transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64mA. FEATURES • Combines 74ABT245 and 74ABT373 type functions in one device • 8-bit octal transceiver with D-type latch • Back-to-back registers for storage • Separate controls for data flow in each direction • Output capability: +64mA/–32mA • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 FUNCTIONAL DESCRIPTION The 74ABT543A contains two sets of eight D-type latches, with separate control pins for each set. Using data flow from A to B as an example, when the A-to-B Enable (EAB) input and the A-to-B Latch Enable (LEAB) input are Low the A-to-B path is transparent. A subsequent Low-to-High transition of the LEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With EAB and OEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches. and 200 V per Machine Model DESCRIPTION Control of data flow from B to A is similar, but using the EBA, LEBA, and OEBA inputs. The 74ABT543A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 2.9 3.6 ns tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF; VCC = 5V CIN Input capacitance VI = 0V or VCC 4 pF CI/O I/O capacitance Outputs disabled; VO = 0V or VCC 7 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 110 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 24-Pin Plastic DIP –40°C to +85°C 74ABT543A N 74ABT543A N SOT222-1 24-Pin plastic SO –40°C to +85°C 74ABT543A D 74ABT543A D SOT137-1 24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT543A DB 74ABT543A DB SOT340-1 24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT543A PW 7ABT543APW DH SOT355-1 PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER SYMBOL 14, 1 LEAB / LEBA A to B / B to A Latch Enable input (active-Low) 11, 23 EAB / EBA A to B / B to A Enable input (active-Low) 13, 2 OEAB / OEBA 3, 4, 5, 6, 7, 8, 9, 10 A0 – A7 Port A, 3-State outputs 22, 21, 20, 19, 18, 17, 16, 15 B0 – B7 Port B, 3-State outputs 15 B7 12 GND Ground (0V) EAB 11 14 LEAB 24 VCC Positive supply voltage GND 12 13 OEAB LEBA 1 24 VCC OEBA 2 23 EBA A0 3 22 B0 A1 4 21 B1 A2 5 20 B2 A3 6 19 B3 A4 7 18 B4 A5 8 17 B5 9 16 B6 A6 A7 10 FUNCTION A to B / B to A Output Enable input (active-Low) SA00168 1998 Sep 24 2 853-1794 20080 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) LOGIC SYMBOL 74ABT543A LOGIC SYMBOL (IEEE/IEC) 2 23 1 13 3 4 5 6 7 8 9 22 10 24 A0 A1 A2 A3 A4 A5 A6 A7 3 11 EAB 23 EBA OEAB 13 14 LEAB OEBA 2 1 1EN3 (BA) G1 1C5 2EN4 (AB) G2 2C6 22 ∇3 5D 4 6D 2∇ 21 5 20 LEBA 6 19 B0 B1 B2 B3 B4 B5 B6 B7 7 18 8 17 9 16 10 15 22 21 20 19 18 17 16 15 SA00169 SA00170 LOGIC DIAGRAM DETAIL A D 22 Q B0 LE A0 3 Q D LE A1 A2 A3 A4 A5 A6 A7 OEBA 4 21 5 20 6 19 7 DETAIL A X 7 18 8 17 9 16 10 15 LEBA B2 B3 B4 B5 B6 B7 2 13 EBA B1 OEAB 23 11 1 14 EAB LEAB SA00171 1998 Sep 24 3 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A FUNCTION TABLE INPUTS OUTPUTS STATUS OEXX EXX LEXX An or Bn Bn or An H X X X Z Disabled X H X X Z Disabled L L ↑ ↑ L L h l Z Z Disabled + Latch L L L L ↑ ↑ h l H L Latch + Display L L L L L L H L H L Transparent L H = h = L = l = X = ↑ = NC= Z = L H X NC Hold High voltage level High voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA) Low voltage level Low voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA) Don’t care Low-to-High transition of LEXX or EXX (XX = AB or BA) No change High impedance or “off” state ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC PARAMETER CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current VI < 0 voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT Min Max 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1998 Sep 24 2.0 4 V Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Min VIK VOH Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA Typ Max –0.9 –1.2 Min UNIT Max –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 3.2 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.7 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.3 2.0 V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.3 0.55 0.55 V VRST Power-up output low voltage3 VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 .55 .55 V Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA II Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current4 VCC = 2.1V; VO = 0.5V; VI = GND or VCC; V OE = Don’t care ±5.0 ±50 ±50 µA IIH + IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IIL + IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA ICEX Output high leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA Output current1 VCC = 5.5V; VO = 2.5V –65 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 110 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 20 30 30 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 110 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND; VCC = 5.5V 0.3 1.5 1.5 mA IOFF IPU/PD IO ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 –40 –40 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10%, a transition time of up to 100µsec is permitted. 1998 Sep 24 5 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM Min Typ Max Min Max UNIT tPLH tPHL Propagation delay An to Bn, Bn to An 2 1.0 1.9 2.9 3.6 4.5 5.2 1.0 1.9 5.2 5.7 ns tPLH tPHL Propagation delay LEBA to An, LEAB to Bn 1 2 1.0 2.1 3.4 4.3 5.1 6.0 1.0 2.1 6.2 6.7 ns tPZH tPZL Output enable time OEBA to An, OEAB to Bn 4 5 1.0 2.0 3.2 4.3 5.1 5.9 1.0 2.0 6.2 6.6 ns tPHZ tPLZ Output disable time OEBA to An, OEAB to Bn 4 5 2.0 1.0 4.0 3.0 5.7 4.6 2.0 1.0 6.2 5.0 ns tPZH tPZL Output enable time EBA to An, EAB to Bn 4 5 1.0 2.0 3.4 4.4 5.1 6.1 1.0 2.0 6.2 6.8 ns tPHZ tPLZ Output disable time EBA to An, EAB to Bn 4 5 2.0 1.0 3.6 3.0 5.4 4.6 2.0 1.0 5.9 5.0 ns AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER +25oC Tamb = VCC = +5.0V WAVEFORM Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT Min Typ Min 3 2.5 3.0 1.0 1.4 2.5 3.0 ns Hold time An to LEAB, Bn to LEBA 3 0.5 0.5 –0.8 –0.6 0.5 0.5 ns ts(H) ts(L) Setup time An to EAB, Bn to EBA 3 3.5 3.0 1.3 1.4 3.5 3.0 ns th(H) th(L) Hold time An to EAB, Bn to EBA 3 0.5 0.5 –0.8 –0.6 0.5 0.5 ns tw(L) Latch enable pulse width, Low 3 3.5 1.0 3.5 ns ts(H) ts(L) Setup time An to LEAB, Bn to LEBA th(H) th(L) AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V VIN VM tPHL VOUT VIN VM tPLH VM VM tPLH VOUT VM SA00172 tPHL VM VM SA00173 Waveform 1. Propagation Delay For Inverting Output 1998 Sep 24 VM Waveform 2. Propagation Delay For Non-Inverting Output 6 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ An, Bn VM VM VM ts(H) VM VM VM tPZL th(L) An, Bn VM tw(L) LEAB, LEBA OEAB, OEBA, EAB, EBA VM ts(L) th(H) 74ABT543A tPLZ VM VOL +0.3V 0V SA00176 NOTE: For all waveforms, VM = 1.5V, the shaded areas indicate when the input is permitted to change for predictable output performance. SA00174 Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level Waveform 3. Data Setup and Hold Times And Latch Enable Pulse Width OEAB, OEBA, EAB, EBA VM VM tPZH tPHZ VOH An, Bn VOH –0.3V VM 0V SA00175 Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level TEST CIRCUIT AND WAVEFORM 7V 500 Ω From Output Under Test S1 Open GND 500 Ω CL = 50 pF Load Circuit TEST S1 tpd open tPLZ/tPZL 7V tPHZ/tPZH open DEFINITIONS Load capacitance includes jig and probe capacitance; CL = see AC CHARACTERISTICS for value. SA00012 1998 Sep 24 7 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) DIP24: plastic dual in-line package; 24 leads (300 mil) 1998 Sep 24 8 74ABT543A SOT222-1 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) SO24: plastic small outline package; 24 leads; body width 7.5 mm 1998 Sep 24 9 74ABT543A SOT137-1 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm 1998 Sep 24 10 74ABT543A SOT340-1 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm 1998 Sep 24 11 74ABT543A SOT355-1 Philips Semiconductors Product specification Octal latched transceiver with dual enable (3-State) 74ABT543A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 05-96 9397-750-04611