INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4030B gates Quadruple exclusive-OR gate Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF4030B gates Quadruple exclusive-OR gate DESCRIPTION The HEF4030B provides the positive quadruple exclusive-OR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. Fig.2 Pinning diagram. HEF4030BP(N): 14-lead DIL; plastic (SOT27-1) HEF4030BD(F): 14-lead DIL; ceramic (cerdip) HEF4030BT(D): 14-lead SO; plastic (SOT73) (SOT108-1) ( ): Package Designator North America Fig.1 Functional diagram. Fig.2 Logic diagram (one gate). TRUTH TABLE FAMILY DATA, IDD LIMITS category GATES I1 I2 O1 L L L H L H L H H H H L See Family Specifications Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) January 1995 2 Philips Semiconductors Product specification HEF4030B gates Quadruple exclusive-OR gate AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL TYPICAL EXTRAPOLATION FORMULA TYP. MAX. 85 175 ns 57 ns + (0,55 ns/pF) CL Propagation delays In → On HIGH to LOW LOW to HIGH Output transition times HIGH to LOW LOW to HIGH 5 35 75 ns 24 ns + (0,23 ns/pF) CL 15 30 55 ns 22 ns + (0,16 ns/pF) CL 5 75 150 ns 47 ns + (0,55 ns/pF) CL 10 30 65 ns 19 ns + (0,23 ns/pF) CL 15 25 50 ns 17 ns + (0,16 ns/pF) CL 5 60 120 ns 10 ns + (1,0 ns/pF) CL 10 30 60 ns 9 ns + (0,42 ns/pF) CL 20 40 ns 6 ns + (0,28 ns/pF) CL 5 60 120 ns 30 60 ns 9 ns + (0,42 ns/pF) CL 20 40 ns 6 ns + (0,28 ns/pF) CL 10 10 VDD V dissipation per package (P) tPLH 15 15 Dynamic power tPHL tTHL tTLH 10 ns + (1,0 ns/pF) CL TYPICAL FORMULA FOR P (µW) 5 1 100 fi + ∑(fo CL) × VDD2 where 10 4 900 fi + ∑(fo CL) × VDD2 fi = input freq. (MHz) 15 14 400 fi + ∑(fo CL) × VDD 2 fo = output freq. (MHz) CL = load capacitance (pF) ∑(foCL) = sum of outputs VDD = supply voltage (V) January 1995 3 WWW.ALLDATASHEET.COM Copyright © Each Manufacturing Company. All Datasheets cannot be modified without permission. This datasheet has been download from : www.AllDataSheet.com 100% Free DataSheet Search Site. Free Download. No Register. Fast Search System. www.AllDataSheet.com