INTEGRATED CIRCUITS 74F756 Octal inverter buffer (open-collector) 74F757 Octal buffer (open-collector) 74F760 Octal buffer (open-collector) Product specification IC15 Data Handbook 1989 Nov 27 Philips Semiconductors Product specification Buffers 74F756/74F757/74F760 74F756 Octal Inverter Buffer (Open Collector) 74F757 Octal Buffer (Open Collector) 74F760 Octal Buffer (Open Collector) FEATURES • Octal bus interface • Open collector versions of 74F240, 74F241 and 74F244 TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F756 9.0ns 40mA DESCRIPTION 74F757 9.0ns 45mA The 74F756, 74F757 and 74F760 are octal buffers that are ideal for driving bus lines of buffer memory address registers. The 74F756 is the open collector version of 74F240, 74F757 is the open collector version of 74F241 and 74760 is the open collector version of 74F244. These devices feature two Output Enables. OEa and OEb (or OEb for the 74F757), each controlling four of the outputs. 74F760 9.0ns 45mA ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 20–pin plastic DIP N74F756N, N74F757AN, N74F760N SOT146-1 20–pin plastic SOL N74F756D, N74F757AD, N74F760D SOT163-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Data inputs 1.0/1.67 20µA/1.0mA Output enable input (active Low) 1.0/1.67 20µA/0.2mA Output enable input (active High 74F757) 1.0/1.67 20µA/1.0mA PINS Ian, Ibn OEa, OEb OEb DESCRIPTION Yan, Ybn Data outputs (74F757, 74F760) OC/106.7 OC/64mA Yan, Ybn Data outputs (74F756) OC/106.7 OC/64mA Notes: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the Low state. OC=Open Collector 1989 Nov 27 2 853–0270 98220 Philips Semiconductors Product specification Buffers 74F756/74F757/74F760 PIN CONFIGURATION for 74F756 IEC/IEEE SYMBOL for 74F756 OEa 1 20 VCC 1 Ia0 2 19 OEb 19 Yb0 3 18 Ya0 Ia1 4 17 Ib0 EN1 EN2 2 18 1 4 16 6 14 8 12 Yb1 5 16 Ya1 Ia2 6 15 Ib1 Yb2 7 14 Ya2 Ia3 8 13 Ib2 15 5 Yb3 9 12 Ya3 13 7 11 Ib3 11 9 GND 10 17 3 2 SF00320 SF01246 LOGIC DIAGRAM for 74F756 LOGIC SYMBOL for 74F756 1 2 4 6 8 17 15 13 11 Ia0 Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3 Ia1 OEa Ia2 19 18 4 16 6 14 8 12 Ya0 Ib0 Ya1 Ib1 Ya2 Ib2 Ya3 Ib3 17 3 15 5 13 7 11 9 Yb0 Yb1 Yb2 OEb Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 18 16 14 12 3 5 7 VCC = Pin 20 GND = Pin 10 Ia3 OEb 9 INPUTS 1 VCC = Pin 20 GND = Pin 10 SF00321 FUNCTION TABLE for 74F756 OUTPUTS OEa Ia OEb Ib Ya Yb L L L L H H L H L H L L H X H X H (off) H (off) H = High voltage level L = Low voltage level X = Don’t care 1989 Nov 27 2 3 OEb Yb3 19 SF01247 Philips Semiconductors Product specification Buffers 74F756/74F757/74F760 PIN CONFIGURATION for 74F757 LOGIC DIAGRAM for 74F757 OEa 1 20 VCC Ia0 2 19 OEb Yb0 3 18 Ya0 Ia1 4 17 Ib0 Yb1 5 16 Ya1 Ia0 Ia1 Ia2 Ia2 6 15 Ib1 Yb2 7 14 Ya2 Ia3 Ia3 8 13 Ib2 Yb3 9 12 Ya3 GND 10 11 Ib3 OEa LOGIC SYMBOL for 74F757 4 6 8 1 OEa OEb 18 16 14 12 3 VCC = Pin 20 GND = Pin 10 5 7 9 EN1 EN2 1 18 4 16 6 14 8 12 17 2 3 15 5 13 7 11 9 SF01249 1989 Nov 27 14 8 12 Ya1 Ib1 Ya2 Ib2 Ya3 Ib3 1 OEb 17 3 15 5 13 7 11 9 Yb0 Yb1 Yb2 Yb3 19 SF01251 4 OUTPUTS OEa Ia OEb Ib Ya Yb L L H L L L L H H H H H H X L X H (off) H (off) H = High voltage level L = Low voltage level X = Don’t care IEC/IEEE SYMBOL for 74F757 2 6 Ib0 INPUTS SF01250 1 16 17 15 13 11 Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 19 4 Ya0 FUNCTION TABLE for 74F757 Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3 19 18 VCC = Pin 20 GND = Pin 10 SF01248 2 2 Philips Semiconductors Product specification Buffers 74F756/74F757/74F760 PIN CONFIGURATION for 74F760 IEC/IEEE SYMBOL for 74F760 OEa 1 20 VCC 1 Ia0 2 19 OEb 19 Yb0 3 18 Ya0 Ia1 4 17 Ib0 Yb1 5 EN1 EN2 2 16 Ya1 18 1 4 16 6 14 8 12 Ia2 6 15 Ib1 Yb2 7 14 Ya2 Ia3 8 13 Ib2 15 5 Yb3 9 12 Ya3 13 7 GND 10 11 Ib3 11 9 17 3 2 SF01253 SF01252 LOGIC SYMBOL for 74F760 2 4 6 8 LOGIC DIAGRAM for 74F760 17 15 13 11 Ia0 Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3 1 OEa 19 OEb Ia1 Ia2 Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 18 16 14 12 3 VCC = Pin 20 GND = Pin 10 5 7 Ia3 OEa 9 FUNCTION TABLE for 74F760 OUTPUTS OEa Ia OEb Ib Ya Yb L L L L L L L H L H H H H X H X H (off) H (off) H = High voltage level L = Low voltage level X = Don’t care 1989 Nov 27 18 4 16 6 14 8 12 1 VCC = Pin 20 GND = Pin 10 SF01254 INPUTS 2 5 Ya0 Ib0 Ya1 Ib1 Ya2 Ib2 Ya3 Ib3 OEb 17 3 15 5 13 7 11 9 Yb0 Yb1 Yb2 Yb3 19 SF01255 Philips Semiconductors Product specification Buffers 74F756/74F757/74F760 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL RATING UNIT VCC Supply voltage PARAMETER –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 128 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNIT MIN NOM MAX VCC Supply voltage 4.5 5.0 5.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA VOH High-level output voltage 4.5 V IOL Low-level output current 64 mA Tamb Operating free-air temperature range 70 °C V V 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST LIMITS CONDITIONS1 IOH High-level output current VOL Low-level output voltage MIN TYP2 VCC = MIN, VIL = MAX, VIH = MIN, VOH = MAX VCC = MIN, VIL = MAX MAX, VIH = MIN, UNIT MAX 250 µA IOL = 48MAX ±10%VCC 0.38 0.55 V IOL= 64mA ±5%VCC 0.42 0.55 V –0.73 –1.2 V 100 µA VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage VCC = MAX, VI = 7.0V IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –1.0 mA 74F756 ICC Supply current (total) 74F757 ICCH 20 30 mA ICCL 50 70 mA 30 40 mA 55 80 mA 25 37 mA ICCH ICCL 74F760 VCC = MAX ICCH ICCL 55 80 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 1989 Nov 27 6 Philips Semiconductors Product specification Buffers 74F756/74F757/74F760 AC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER tPLH tPHL Propagation delay Ian, Ibn to Yn tPLH tPHL Propagation delay OEn to Yn tPLH tPHL Propagation delay Ian, Ibn to Yn tPLH tPHL Propagation delay OEa or OEb to Yn tPLH tPHL Propagation delay Ian, Ibn to Yn tPLH tPHL Propagation delay OEn to Yn TEST CONDITION Waveform 1, 2 74F756 LIMITS Tamb = +25°C Tamb = 0°C to +70°C VCC = +5.0V VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω MIN TYP MAX MIN MAX 8.5 11.0 14.0 8.5 15.0 1.0 3.0 6.0 1.0 6.5 UNIT ns Waveform 1, 2 9.0 5.0 11.5 7.0 14.5 10.0 9.0 4.5 15.0 10.5 ns Waveform 1, 2 7.5 3.0 10.5 5.5 13.5 8.5 7.5 3.0 14.0 9.0 ns Waveform 1, 2 9.0 4.5 10.5 7.0 15.0 10.0 8.5 4.0 16.0 10.5 ns Waveform 1, 2 7.5 3.5 10.0 5.5 13.5 8.5 7.5 3.0 14.0 9.0 ns Waveform 1, 2 9.5 5.0 11.5 7.0 14.5 10.5 9.0 4.5 15.0 10.5 ns 74F757 74F760 AC WAVEFORMS For all waveforms, VM = 1.5V. Ian, Ibn, OEn VM VM VM VM tPLH tPHL Yn Ian, Ibn, OEa, OEb VM tPHL tPLH VM Yn VM VM SF01257 SF01256 Waveform 2. Propagation Delay for Non-invertIng Outputs Waveform 1. Propagation Delay for Inverting Outputs TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS 18 16 14 tPLH 12 10 PROPAGATION DELAY (ns) tPHL 8 6 4 2 0 0 100 200 300 400 500 600 LOAD RESISTOR () SF01258 NOTE: When using open-collector parts, the value of the pull-up resistor greatly affects the value of the tPLH. For example, changing the pull-up resistor value from 500 to 100 will improve the tPLH up to 50% with only slight increase in the tPHL. However, if the pull-up resistor is changed, the user must make certain that the total IOL current through the resistor and the total IIL’s of the receivers do not exceed the IOL maximum specification. 1989 Nov 27 7 Philips Semiconductors Product specification Buffers 74F756/74F757/74F760 TEST CIRCUIT AND WAVEFORMS 7.0V VCC tw 90% VIN RL VOUT PULSE GENERATOR NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for Open Collector Outputs POSITIVE PULSE VM VM 10% DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00027 1989 Nov 27 8 Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers DIP20: plastic dual in-line package; 20 leads (300 mil) 1989 Nov 27 9 SOT146-1 Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers SO20: plastic small outline package; 20 leads; body width 7.5 mm 1989 Nov 27 10 SOT163-1 Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers NOTES 1989 Nov 27 11 Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 10-98 9397-750-05176