SPF MIT3 02 SPF MIT3 02 Plastic Fiber Optic Transmitter including Bigfoot™ IC for MOST® Preliminary Data Sheet Safety Hints: Applications of new chip technologies leads to increasing optical efficiency and growing and higher levels of optical performance. We therefore recommend that the current versions of the IEC 825-1 and EN 60825-1 standards are taken into account right from the outset, i.e. at the equipment development stage, and that suitable protection facilities are provided. The data sheet of the 4-pin MOST Optical Transmitter (MIT3 02) has to be taken as preliminary. Samples which are delivered before the qualification and the production release are engineering samples. Features Description The MOST BigfootTx Plastic Fiber Optic Transmitter Excellent solution for converting high speed data from TTL to Plastic Optical Fiber is a highly integrated CMOS IC combined with a High speed LED designed to transmit up to 25Mbit/sec (POF) optical data which is biphase coded at up to 50Mbaud. • High speed transmitter up to 50 Mbaud The internal peaking circuit minimizes PWD. • TTL Data Input (Logic to Light Function) The current through the LED will be setup by an • 650 nm for working in a low attenuation external resistor connected to VCC. This makes it range of PMMA Fiber • High coupled power in1000 micron plastic possible to control the optical output power of the LED. fiber • Low cost Applications • Optical Transmitter for MOST Systems 02 MOSTMIT3 BigfootTx ¥4: Control ¥ 3: Vcc ¥ 1: TX_DATA ¥ 2: GND Actual design status: Bigfoot IC Revision package type device marking Data sheet is valid since J CAI date code, 15-Jan-03 MIT3 02 Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 1 SPF MIT3 02 Maximum Ratings Parameter Storage Temperature Range Symbol TSTG Min -40 Max 100 Unit °C Junction Temperature TJ -40 100 °C Soldering Temperature (>2.5 mm from case bottom t≤5s) Power Dissipation TS - 235 °C PTOT - 300 mW VCCMax -0.5 6.0 V Symbol VCC TA Min 4.75 -40 Max 5.25 85 Unit V °C Power Supply Voltage Recommended Operating Conditions Parameter Supply Voltage Operating Temperature Range (Rext =13.5 kOhm) All the data in this specification refers to the operating conditions above unless otherwise stated. Optical Signal Characteristics (22.5 Mbit/s MOST Data, Vcc=4.75 .. 5.25 V) Parameter Peak wavelength at TA=25°C Symbol λ Peak25 Temperature coefficient λPeak Peak wavelength at TA=-40..85°C TCλ λ Peak Spectral bandwidth (FWHM) Average Output Power coupled into plastic fiber at TA=25°C, Rext=15 kOhm, see Note 1 Temperature coefficient Popt Average Output Power coupled into plastic fiber at TA=-40..85°C, Rext=15 kOhm, see Note 1 Average Output Power coupled into plastic fiber at TA=-40..85°C, Rext=15 kOhm, over lifetime, see Note 1 Gain in Popt when using 13.5 KOhm instead of 15 KOhm Optical Rise Time (20% - 80%) Optical Fall Time (20% - 80%) Extinction Ratio Pulse Width Variation, see Note 2 Average Pulse Width Distortion, see Note 2 Delta λ Popt25, O TCPopt Popt Popt, lifetime tr tf re tPWV tAPWD Min 640 Typ 650 Max 660 Unit nm - 0.16 - nm/K 630 650 670 nm - 20 30 nm -7.4 (185) -8.6 (140) -9.6 (110) -5.2 (300) - 0.4 -5.2 (300) -5.2 (300) -3.6 (435) -3.1 (490) -2.1 (615) dBm (µW) %/K dBm (µW) dBm (µW) 0.35 0.4 0.45 dB 10 20.9 -0.5 4 4 11 - 6 6 24.4 1.5 ns ns dB ns ns Note 1: The output power coupled into plastic fiber Popt is measured with a large area detector at the end of a short length of a fiber (about 30 cm), which is ideally coupled to the Sidelooker. This value must not be used for calculating the power budget for a fiber optic system with a long fiber because the numerical aperture of plastic fibers decreases on the first meters. Therefore the fiber seems to have a higher attenuation over the first few meters compared with the specified value. Due to the direct coupling of the fiber to the LED at the end of the short fiber UMD (uniform mode distribution) will be observed. Therefore the following section of the cable has higher losses compared with EMD (equilibrium mode distribution). Note 2: The electrical input signal fulfills tPWV(min) = 22.9 ns and tPWV(max) = 24.1 ns. For further details see page 3. Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 2 SPF MIT3 02 Pulse Width Variation (tPWV) and Average Pulse Width Distortion (tAPWD) The SPF MIT3 02 generates negative Puls Width Distortion. This means the optical output signal is shortened compared to the electrical input signal. Therefore the parameters tPWV and tAPWD do not meet the MOST Specification of Physical Layer Rev 1.0 (MOST SPL Rev. 1.0) either at the electrical input signal (SP1 in the MOST SPL Rev. 1.0) or at the optical output signal (SP2 in the MOST SPL Rev. 1.0). This characteristic is shown in the following table. Parameter a b Symbol Pulse Width Variation Average Pulse Width Distortion tPWV Min Max Electrical Input Signal 22.9 24.1 Min Max Optical Output Signal 20.9 24.4 Unit tAPWD 1.0 1.5 -0.5 1.5 ns Pulse Width Variation Average Pulse Width Distortion tPWV 21.1 23.1 19.1 23.4 ns tAPWD -0.5 0.5 -2.0 0.5 ns ns Remarks Optical Output Signal according to MOST Specification of Physical Layer Rev. 1.0 Electrical Input Signal according to MOST Specification of Physical Layer Rev. 1.0 Based on this table, the MOST System may be considered by two aspects: a) In order to meet the MOST SPL Rev 1.0 at SP2 the tPWV and tapwd at SP1 have to be longer than described in the MOST SPL Rev. 1.0. This can be achived e.g. by using OS8104 as MOST transceiver chip. b) If the MOST SPL Rev. 1.0 is met regarding tPWV and tapwd at SP1, then the output signal SP2 is systematically shortened. Within a MOST System, this characteristic can be compensated by the optical receiver which detects the signal at SP3. For this compensation, the optical receiver has to be specified in a range which is smaller than the range described in the MOST SPL Rev. 1.0. For a detailed evaluation of system behavior, see paper “OS8300 Revision J behavior on SP2 (optical output signal)” from Oasis SiliconSystems. Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 3 SPF MIT3 02 DC Characteristics Parameter Low Level Input Voltage High Level Input Voltage Input Leakage Current (VCC=5.0V, VI=0.0V or VI=5.0V) Input Capacitance Input Resistance Supply Current (Rext = 15 kOhm) ON state, biphase coded data, see Note 3 Supply Current (Rext = 15 kOhm) OFF state, see Note 4 Symbol VIL VIH IL Min -0.3 2.0 - Typ - Max 0.8 VCC + 0.3 +/- 20 Unit V V µA CI RI ICC 100 - 25 7 35 pF kOhm mA ILP2 - - 1 mA Note 3: The current through the LED and therefore the optical output power and overall power consumption depends on the settings of Rext. The nominal value for Rext is 15K. With Rext=30K the optical output power is about –3dB of the nominal value. Typical behaviour see Fiure below. Important: The external resistor of Rext must be within the range of 13.5K to 33K. For values of Rext out of this range functionality may not be given over the whole temperature range and the device lifetime. Using values below 13K for Rext can damage the transmitter. Note 4: The transmitter jumps to low power mode after TX DATA is low for max. 18µs If the transmitter is in low power mode it is switched ON 5µs (max.) after TX DATA starts toggling. AC Electrical Characteristics Parameter Power Supply Rejection Ratio Power Up Time Power Down Time Input Rise Time Input Fall Time Preliminary Product Information 15-Jan-03 Test Conditions 25 MHz Power Supply Noise Zero à MOST Data MOST Data à Zero Symbol PSRR Min - Typ 30 Max - Unit dB TPU TPD tTLH tTHL 1.0 - 2.5 - 5.0 18.0 5 5 µs µs ns ns Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 4 SPF MIT3 02 Typical Output Signal Measured with fast optical receiver (Graviton SPD-1) with 15 kOhm external resistor and 22.579 Mbit/s MOST Data at TA=25°C. Typical Dependency of Average Output Power Popt on external Resistor Rext (22.5 MBit MOST Data/ VCC=5 V / TA=25°C) 160 range for Rext: 13.5 K..33 K 140 optical power Average Optical Power [%] 120 100 80 60 40 20 0 5 10 15 20 25 30 35 40 45 50 External Resistor Rext [KOhm] Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 5 SPF MIT3 02 Mechanical Design MIT3 02: CAI package (cavity as interface) Lot number, production week, component type are given on CAI backside by laser marking (for details see marking specification). Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 6 SPF MIT3 02 Application Circuit: *1) Place these components as close as possible to their corresponding pins of the FOT. *2) Values can change due to different light output power of the LED. *3) This is just a proposal for the Rext application. There can be used also other circuits to switch Rext from 15K to 30K. Design & Layout rules: • The 100nF bypass capacitors of the FOTs must be located as close as possible between the pins Vcc and GND of the FOTs. Use ceramic caps and tantalum caps with low ESR. • Also the inductor/ferrite bead (receiver) and the -3dB - control circuit (transmitter) must be placed as close as possible to the FOTs. We prefer ferrite beads (e.g. type 74279214 Würth Elektronik) since the d.c. resistance is very low. If other inductors are used the d.c. resistor should be less than 3Ohm. • For EMC a ferrite bead should be connected to the power supply close to the transmitter and the Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 7 SPF MIT3 02 • • • • • receiver. Do not use only one ferrite bead together for receiver and transmitter! For the ground connection a ground plane is recommended (Y-structure). That means the ground planes of the transmitter, the receiver and the shielding must be separated. The three ground planes should be connected together behind the bypass capacitors (refer to the PCB design below). This ground signal should be connected directly to the ground plane of the MOST controller (e.g. OS8104) and the power supply on the top layer and/or bottom layer and ground layer as it is indicated in the example below. If a multi layer design is used the ground layer must have the same ground separation like shown for the top layer! A serial resistor in the Rx/Tx data line will also reduce EMC - problems. For Rx the resistor must be placed near the receiver - for Tx the resistor must be placed near the MOST controller chip. The value depends from the distance between the FOTs and the MOST chip (< 5cm) and can be in the range of up to 150R. Higher values for the resistors will increase jitter and can therefore cause locking problems of the MOST PLL! The Rx/Tx signals should not be routed parallel over a long distance but may be embedded with ground copper, if possible. The GND pin and the pin of Rext (15K - resistor) of the transmitter are used for heat dissipation. Therefore there should be a good connection to the PCB à no isolation gaps! Both pins should dip into a copper area (see layout example below). Layout example: The reference board from OASIS Silicon Systems follows the requirements above. The schematic is very similar to the example above, but does not include the connection to the power supply, the OS8104 or the microcontroller. The examples below for top- and bottom layer is the layout of the reference design board and shows how the layout around the optical receiver and transmitter should look like. It is strongly recommended to follow this examples in your design to get best performance! Note: The buffer circuit (IC1), the connectors and jumpers in the middle to the right section of the schematic are only for use of the reference board and will not be necessary for your HW - design. Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 8 SPF MIT3 02 GND - BUS to OS8104 and Power Supply Top Layer with 180° version of the pigtail: Bottom Layer: Bottom side / positions GND - BUS to OS8104 and Power Supply Bottom Layer (seen from the top side of the PCB): Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 9 SPF MIT3 02 Other items: • The shown circuit for the –3dB attenuation is just a proposal. Also any other circuit which can double the value of Rext is permitted. • Due to the fact that the optical average level jumps if the power control signal (/-3dB) is toggled there can occur LOCK/coding – errors at the following device for a short time. This is not very critical, since it does occur only in diagnosis mode. After a time of 10ms the device should lock again if the optical attenuation between the devices is not too high. • The Rx and Tx signals can be measured by using standard probes (>1M/<10pF). However, if the signal quality is very bad and the LOCK signal of the MOST chip is flaky connecting a passive probe to the Rx signal can cause the MOST chip to lock better or worse to the signal. This is due to the capacitance of the analog probe which is usually in the range of 8..12pF and shifts the phase and PWD of the signal. In this case an active probe with a capacitance of less than 1pF is recommended. • The reference test board which corresponds to the layout examples above is available at the Oasis Silicon System AG. Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 10 SPF MIT3 02 History of Design and Specification Status of MOST Transmitter: Data Sheet Status Bigfoot IC Revision device marking comments, cause of change, important differences to last Status 02-Dec-02 J New release 15-Jan-03 J Date code MIT3 02 date code, MIT3 02 Preliminary Product Information 15-Jan-03 p. 2: Update of Note 2 p. 3: Section Pulse Width Variation (tPWV) and Average Pulse Width Distortion (tAPWD) added Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 11 SPF MIT3 02 Notes: Preliminary Product Information 15-Jan-03 Infineon AG OASIS SiliconSystems AG CONFIDENTIAL Page 12