INTEGRATED CIRCUITS CBTD3306 Dual bus switch with level shifting Product data File under Integrated Circuits — ICL03 2001 Nov 08 Philips Semiconductors Product data Dual bus switch with level shifting CBTD3306 FEATURES PIN CONFIGURATION • Designed to be used in 5 V to 3.3 V level shifting applications with internal diode. • 5 Ω switch connection between two ports • TTL-compatible input levels • Package options include plastic small outline (SO) and 1OE 1 8 VCC 1A 2 7 2OE 1B 3 6 2B GND 4 5 2A thin shrink small outline (TSSOP) • Latch-up protection exceeds 100 mA per JESD78 • ESD protection exceeds 2000 V HBM per JESD22-A114 and SA00535 PIN DESCRIPTION 1000 V CDM per JESD22-C101 PIN NUMBER SYMBOL 1, 7 1OE, 2OE 2, 5 1A, 2A A port inputs 3, 6 1B, 2B B port outputs 4 GND Ground (0V) 8 VCC Positive supply voltage DESCRIPTION The CBTD3306 Dual FET Bus Switch features independent line switches. Each switch is disabled with the associated Output Enable (OE) input is high. The CBTD3306 is characterized for operation from –40 to +85 °C. NAME AND FUNCTION Output enable QUICK REFERENCE DATA SYMBOL tPLH tPHL CIO(OFF) ICC CONDITIONS Tamb = 25 °C; GND = 0 V PARAMETER Propagation delay A to B or B to A CL = 50 pF; VCC = +5.0 V ±0.5 V Pin capacitance (OFF state) VO = 3 V or 0; OE = VCC Quiescent supply current VCC = 5.5 V; IO = 0, VI = VCC or GND TYPICAL UNIT 0.25 (MAX) ns 6.50 pF 3 µA ORDERING INFORMATION TEMPERATURE RANGE ORDER CODE DWG NUMBER 8-pin plastic SO PACKAGES –40 to 85 °C CBTD3306D SOT96-1 8-pin plastic TSSOP –40 to 85 °C CBTD3306PW SOT530-1 Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging. LOGIC DIAGRAM (positive logic) FUNCTION TABLE INPUT 1A 1OE 2A 2OE 2 3 1B OE 1 5 6 FUNCTION L A port = B port H Disconnect 2B 7 SA00534 2001 Nov 08 2 853-2305 27313 Philips Semiconductors Product data Dual bus switch with level shifting CBTD3306 ABSOLUTE MAXIMUM RATINGS1 Tamb = –40 to +85 °C, unless otherwise specified. RATING UNIT VCC DC supply voltage PARAMETER –0.5 to +7.0 V VI DC input voltage2 –0.5 to +7.0 V IOUT DC output current 128 mA IIK Input diode current –50 mA Tstg Storage temperature range –65 to +150 °C SYMBOL CONDITIONS VI/O < 0 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. The package thermal impedance is calculated in accordance with JESD 51. RECOMMENDED OPERATING CONDITIONS1 SYMBOL LIMITS PARAMETER UNIT MIN MAX 5.5 V V VCC DC supply voltage 4.5 VIH High-level input voltage 2.0 — VIL Low-level Input voltage — 0.8 V –40 +85 °C Tamb Operating free-air temperature range NOTE: 1. All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. DC ELECTRICAL CHARACTERISTICS Tamb = –40 to +85 °C, unless otherwise specified. LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = –40 to +85 °C UNIT MIN TYP1 Input clamp voltage VCC = 4.5 V; II = –18 mA — — –1.2 V Input leakage current VCC = 5.5 V; VI = GND or 5.5 V — — ±1 µA ICC Quiescent supply current VCC = 5.5 V; IO = 0, VI = VCC or GND — — 1.5 mA VP Output high pass voltage See Figure 1 — — — V Additional supply current per input pin2 VCC = 5.5 V, one input at 3.4 V, other inputs at VCC or GND — — 2.5 mA Control pins capacitance VI= 3 V or 0 — 3.20 — pF Port off capacitance VO = 3 V or 0; OE = VCC — 6.50 — pF VCC = 4.5 V; VI = 0V; II = 64 mA — 3.6 5 Ω VCC = 4.5 V; VI = 0 V; II = 30 mA — 3.6 5 Ω VCC = 4.5 V; VI = 2.4 V; II = 15 mA — 17 35 Ω VIK II ∆ICC CI CIO(OFF) ron 3 On-resistance NOTES: 1. All typical values are at VCC = 5 V, Tamb = 25 °C. 2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND 3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals. 2001 Nov 08 3 MAX Philips Semiconductors Product data Dual bus switch with level shifting CBTD3306 AC CHARACTERISTICS Tamb = –40 to +85 °C; CL = 50 pF LIMITS SYMBOL PARAMETER FROM (INPUT) TO (OUTPUT) VCC = +5.0 V ±0.5 V MIN MAX UNIT tpd Propagation delay1 A or B B or A — 0.25 ns ten Output enable time to High and Low level OE A or B 1 5 ns tdis Output disable time from High and Low level OE A or B 1 4.9 ns NOTE: 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). AC WAVEFORMS TEST CIRCUIT AND WAVEFORMS VM = 1.5 V, VIN = GND to 3.0 V 7V 3V 1.5 V 1.5 V 500 Ω From Output Under Test S1 Open GND INPUT 500 Ω CL = 50 pF 0V tPHL tPLH Load Circuit VOH 1.5 V 1.5 V OUTPUT VOL SA00028 Waveform 1. Input to Output Propagation Delays TEST S1 tpd open tPLZ/tPZL 7V tPHZ/tPZH open DEFINITIONS Load capacitance includes jig and probe capacitance; CL = see AC CHARACTERISTICS for value. 3V Output Control (Low-level enabling ) 1.5 V SA00012 1.5 V 0V tPLZ tPZL NOTES: 1. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. 2. The outputs are measured one at a time with one transition per measurement. 3.5 V Output Waveform 1 S1 at 7 V (see Note) 1.5 V tPZH Output Waveform 2 S1 at Open (see Note) VOL + 0.3 V VOL tPHZ VOH VOH – 0.3 V 1.5 V 0V Note: Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. SA00029 Waveform 2. 3-State Output Enable and Disable Times NOTES: 1. tPLZ and tPHZ are the same as tdis. 2. tPZL and tPZH are the same as ten. 3. tPLH and tPHL are the same as tpd. 2001 Nov 08 4 Philips Semiconductors Product data Dual bus switch with level shifting CBTD3306 Temp = 85 °C Temp = 70 °C 3.8 3.8 3.6 100 µA 3.6 100 µA 3.4 3.4 6 mA VP VP 12 mA 3.2 6 mA 3.2 12 mA 24 mA 3.0 3.0 2.8 2.8 2.6 2.6 2.4 2.4 2.2 4.4 4.6 4.8 5.0 5.2 5.4 2.2 4.4 5.6 24 mA 4.6 4.8 VCC – Supply Voltage 5.0 5.2 5.4 5.6 VCC – Supply Voltage Temp = 25 °C 3.6 100 µA 3.4 3.2 6 mA VP 12 mA 3.0 24 mA 2.8 2.6 2.4 2.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 VCC – Supply Voltage Temp = 0 °C Temp = –40 °C 3.6 3.4 100 µA 3.4 100 µA 3.2 6 mA 3.2 6 mA 12 mA 3.0 VP 3.0 12 mA 24 mA 24 mA 2.8 VP 2.8 2.6 2.6 2.4 2.4 2.2 2.2 2.0 4.4 4.6 4.8 5.0 5.2 5.4 5.6 2.0 4.4 4.6 4.8 5.0 5.2 5.4 VCC – Supply Voltage 5.6 VCC – Supply Voltage SW00895 Figure 1. Pass voltage values (Vin = VCC) 2001 Nov 08 5 Philips Semiconductors Product data Dual bus switch with level shifting CBTD3306 TSSOP8: plastic thin shrink small outline; 8 leads; body width 4.4 mm 2001 Nov 08 6 SOT530-1 Philips Semiconductors Product data Dual bus switch with level shifting CBTD3306 SO8: plastic small outline package; 8 leads; body width 3.9 mm 2001 Nov 08 7 SOT96-1 Philips Semiconductors Product data Dual bus switch with level shifting CBTD3306 Data sheet status Data sheet status [1] Product status [2] Definitions Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2001 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 11-01 For sales offices addresses send e-mail to: [email protected]. Document order number: 2001 Nov 08 8 9397 750 09116