74HC1G126; 74HCT1G126 Bus buffer/line driver; 3-state Rev. 04 — 20 July 2007 Product data sheet 1. General description The 74HC1G126 and 74HCT1G126 are high-speed, Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input pin (OE). A LOW at pin OE causes the output as assume a high-impedance OFF-state. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V. The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. The bus driver output currents are equal to those of the 74HC126 and 74HCT126. 2. Features n n n n n Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays SOT353-1 and SOT753 package options 3. Ordering information Table 1. Ordering information Type number 74HC1G126GW Package Temperature range Name Description Version −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753 74HCT1G126GW 74HC1G126GV 74HCT1G126GV 4. Marking Table 2. Marking codes Type number Marking 74HC1G126GW HN 74HCT1G126GW TN 74HC1G126GV H26 74HCT1G126GV T26 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state 5. Functional diagram 2 A Y 4 Y A 2 4 1 OE 1 OE OE mna125 Fig 1. Logic symbol mna127 mna126 Fig 2. IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning 74HC1G126 74HCT1G126 OE 1 A 2 GND 3 5 VCC 4 Y 001aaf103 Fig 4. Pin configuration 6.2 Pin description Table 3. Pin description Symbol Pin Description OE 1 output enable input A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state Inputs Output OE A Y H L L H H H L X Z 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 2 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1] Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7.0 V IIK input clamping current IOK output clamping current VI < −0.5 V or VI > VCC + 0.5 V - ±20 mA VO < −0.5 V or VO > VCC + 0.5 V - ±20 mA IO output current −0.5 V < VO < VCC + 0.5 V - ±35.0 mA ICC supply current - 70 mA IGND ground current −70 - mA Tstg storage temperature −65 +150 °C - 200 mW Tamb = −40 °C to +125 °C total power dissipation Ptot [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Above 55 °C the value of Ptot derates linearly with 2.5 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions 74HC1G126 74HCT1G126 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature −40 +25 +125 −40 +25 +125 °C ∆t/∆V input transition rise and fall rate VCC = 2.0 V - - 625 - - - VCC = 4.5 V - - 139 - - 139 ns/V VCC = 6.0 V - - 83 - - - ns/V ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 °C. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - V For type 74HC1G126 VIH VIL HIGH-level input voltage LOW-level input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 V 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 3 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 °C. Symbol VOH VOL Parameter HIGH-level output voltage LOW-level output voltage −40 °C to +85 °C Conditions −40 °C to +125 °C Min Typ Max Min Max Unit VI = VIH or VIL IO = −20 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - 5.9 - V IO = −6.0 mA; VCC = 4.5 V 3.84 4.32 - 3.7 - V IO = −7.8 mA; VCC = 6.0 V 5.34 5.81 - 5.2 - V IO = 20 µA; VCC = 2.0 V - 0 0.1 - 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 - 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 - 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.33 - 0.4 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.33 - 0.4 V VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 1.0 - 1.0 µA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 5 - 10 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 10 - 20 µA CI input capacitance - 1.5 - - - pF For type 74HCT1G126 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = −20 µA 4.4 4.5 - 4.4 - V IO = −6.0 mA 3.84 4.32 - 3.7 - V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 µA - 0 0.1 - 0.1 V IO = 6.0 mA - 0.16 0.33 - 0.4 V µA VOL II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 - 1.0 IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 5 - 10 ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 10 - 20 µA ∆ICC additional supply current per input; VCC = 4.5 V to 5.5 V; VI = VCC − 2.1 V; IO = 0 A - - 500 - 850 µA CI input capacitance - 1.5 - - - pF 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 4 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF unless otherwise specified. All typical values are measured at Tamb = 25 °C. For test circuit see Figure 7 Symbol Parameter −40 °C to +85 °C Conditions −40 °C to +125 °C Unit Min Typ Max Min Max - 24 125 - 150 VCC = 4.5 V - 10 25 - 30 ns VCC = 5.0 V; CL = 15 pF - 9 - - - ns - 9 21 - 26 ns VCC = 2.0 V - 24 155 - 190 ns VCC = 4.5 V - 10 31 - 38 ns - 8 26 - 32 ns VCC = 2.0 V - 16 155 - 190 ns VCC = 4.5 V - 12 31 - 38 ns - 11 26 - 32 ns - 30 - - - pF - 11 30 - 36 ns For type 74HC1G126 tpd [1] propagation delay A to Y; see Figure 5 VCC = 2.0 V VCC = 6.0 V ten enable time OE to Y; see Figure 6 [1] VCC = 6.0 V tdis disable time OE to Y; see Figure 6 [1] VCC = 6.0 V CPD power dissipation capacitance [2] VI = GND to VCC ns For type 74HCT1G126 tpd [1] propagation delay A to Y; see Figure 5 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF ten tdis CPD - 10 - - - ns OE to Y; see Figure 6; VCC = 4.5 V [1] - 10 35 - 42 ns disable time OE to Y; see Figure 6; VCC = 4.5 V [1] - 12 31 - 38 ns power dissipation capacitance VI = GND to VCC − 1.5 V [2] - 27 - - - pF enable time [1] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] CPD is used to determine the dynamic power dissipation PD (µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts ∑ (CL × VCC2 × fo) = sum of outputs 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 5 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state 12. Waveforms VI VM A input GND tPLH tPHL VM Y output mna121 Measurement points are given in Table 9. Fig 5. The input (A) to output (Y) propagation delays VI VM OE input GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VOL + 0.3 V tPHZ tPZH VOH − 0.3 V output HIGH-to-OFF OFF-to-HIGH VM GND output enabled output disabled output enabled mna129 Measurement points are given in Table 9. Fig 6. The 3-state enable and disable times Table 9. Measurement points Type Input Output VM VI VM 74HC1G126 0.5 × VCC GND to VCC 0.5 × VCC 74HCT1G126 1.3 V GND to 3.0 V 1.3 V 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 6 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state S1 VCC PULSE GENERATOR VI RL = 1000 Ω VO VCC open GND D.U.T. RT CL mna232 Test data is given in Table 8. Definitions for test circuit: RT = Termination resistance should be equal to the output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistance For tPLH, tPHL, S1 = open For tPLZ, tPZL, S1 = VCC For tPHZ, tPZH, S1 = GND Fig 7. Load circuitry for switching times 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 7 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 8. Package outline SOT353-1 (TSSOP5) 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 8 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT753 JEITA SC-74A EUROPEAN PROJECTION ISSUE DATE 02-04-16 06-03-16 Fig 9. Package outline SOT753 (SC-74A) 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 9 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state 14. Abbreviations Table 10. Abbreviations Acronym Description DUT Device Under Test TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT1G126_4 20070720 Product data sheet - 74HC_HCT1G126_3 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • Legal texts have been adapted to the new company name where appropriate. Package SOT353 changed to SOT353-1 in Table 1 and Figure 8. Quick Reference Data and Soldering sections removed. Section 2 “Features” updated. 74HC_HCT1G126_3 20020515 Product specification 74HC_HCT1G126_2 20010406 Product specification - 74HC_HCT1G126 74HC_HCT1G126 19970924 Preliminary specification - - 74HC_HCT1G126_4 Product data sheet - 74HC_HCT1G126_2 © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 10 of 12 74HC1G126; 74HCT1G126 NXP Semiconductors Bus buffer/line driver; 3-state 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] 74HC_HCT1G126_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 20 July 2007 11 of 12 NXP Semiconductors 74HC1G126; 74HCT1G126 Bus buffer/line driver; 3-state 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 3 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 July 2007 Document identifier: 74HC_HCT1G126_4