PHILIPS BUK98180-100A

BUK98180-100A
TrenchMOS™ logic level FET
Rev. 02 — 18 May 2001
Product data
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™1 technology, featuring very low on-state resistance.
Product availability:
BUK98180-100A in SOT223 (SC-73).
2. Features
■
■
■
■
TrenchMOS™ technology
Q101 compliant
150 °C rated
Logic level compatible.
3. Applications
c
c
■ Automotive and general purpose power switching
◆ 12 V, 24 V and 42 V loads
◆ Motors, lamps and solenoids.
4. Pinning information
Table 1:
Pinning - SOT223 (SC-73), simplified outline and symbol
Pin
Description
1
gate (g)
2
drain (d)
3
source (s)
4
drain (d)
Simplified outline
Symbol
4
d
g
1
Top view
2
3
MSB002 - 1
SOT223 (SC-73)
1.
TrenchMOS is a trademark of Royal Philips Electronics.
MBB076
s
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
5. Quick reference data
Table 2:
Quick reference data
Symbol Parameter
Conditions
Typ
Max
Unit
−
100
V
VDS
drain-source voltage (DC)
ID
drain current (DC)
Tsp = 25 °C; VGS = 5 V
−
4.6
A
Ptot
total power dissipation
Tsp = 25 °C
−
8
W
Tj
junction temperature
−
150
°C
RDSon
drain-source on-state resistance
Tj = 25 °C; VGS = 5 V; ID = 5 A
153
180
Tj = 25 °C; VGS = 4.5 V; ID = 5 A
−
201
Tj = 25 °C; VGS = 10 V; ID = 5 A
147
173
mΩ
mΩ
mΩ
Min
Max
Unit
−
100
V
−
100
V
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
VDS
drain-source voltage (DC)
VDGR
drain-gate voltage (DC)
Conditions
RGS = 20 kΩ
VGS
gate-source voltage (DC)
−
±10
V
VGSM
non-repetitive gate-source voltage
tp ≤ 50 µs
−
±15
V
ID
drain current (DC)
Tsp = 25 °C; VGS = 5 V; Figure 2 and 3
−
4.6
A
Tsp = 100 °C; VGS = 5 V; Figure 2
−
3
A
IDM
peak drain current
Tsp = 25 °C; pulsed; tp ≤ 10 µs;
Figure 3
−
18
A
Ptot
total power dissipation
Tsp = 25 °C; Figure 1
−
8
W
Tstg
storage temperature
−55
+150
°C
Tj
operating junction temperature
−55
+150
°C
Source-drain diode
IDR
reverse drain current (DC)
Tsp = 25 °C
−
4.6
A
IDRM
pulsed reverse drain current
Tsp = 25 °C; pulsed; tp ≤ 10 µs
−
18
A
unclamped inductive load; ID = 4 A;
VDS ≤ 100 V; VGS = 5 V; RGS = 50 Ω;
starting Tsp = 25 °C
−
16
mJ
Avalanche ruggedness
WDSS
non-repetitive avalanche energy
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
2 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
03aa25
03aa17
120
120
Pder
(%)
100
Ider
(%)
100
80
80
60
60
40
40
20
20
0
0
0
25
50
75
100
125
Tsp
150
(oC)
0
175
25
50
75
100
125
150 175
Tsp (oC)
VGS ≥ 4.5 V
P tot
P der = ---------------------- × 100%
P
°
ID
I der = ------------------- × 100%
I
°
tot ( 25 C )
D ( 25 C )
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
03nc34
102
ID
(A)
RDSon = VDS / ID
10
tp = 10 us
100 us
1 ms
1
D.C.
10-1
δ=
P
10 ms
tp
100 ms
T
t
tp
T
10-2
10-1
1
10
102
VDS (V)
103
Tamb = 25 °C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
3 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
7. Thermal characteristics
Table 4:
Thermal characteristics
Symbol
Parameter
Conditions
Rth(j-a)
thermal resistance from junction to ambient
Rth(j-sp)
thermal resistance from junction to solder
point
Figure 4
Value
Unit
70
K/W
15
K/W
7.1 Transient thermal impedance
03nc35
102
Zth(j-sp)
(K/W)
10
δ = 0.5
0.2
0.1
1
0.05
0.02
δ=
P
10-1
Single Shot
T
t
tp
T
10-2
10-6
tp
10-5
10-4
10-3
10-2
10-1
1
10
tp (s)
102
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
4 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
8. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tj = 25 °C
100
−
−
V
Tj = −55 °C
89
−
−
V
Tj = 25 °C
1
1.5
2
V
Tj = 150 °C
0.6
−
−
V
Tj = −55 °C
−
−
2.3
V
Tj = 25 °C
−
0.05
10
µA
Tj = 150 °C
−
−
500
µA
−
2
100
nA
Tj = 25 °C
−
153
180
mΩ
Tj = 150 °C
−
−
389
mΩ
VGS = 4.5 V; ID = 5 A;
−
−
201
mΩ
VGS = 10 V; ID = 5 A;
−
147
173
mΩ
VGS = 0 V; VDS = 25 V;
f = 1 MHz; Figure 12
−
464
619
pF
−
60
72
pF
Static characteristics
V(BR)DSS
VGS(th)
IDSS
drain-source breakdown
voltage
ID = 0.25 mA; VGS = 0 V
gate-source threshold voltage ID = 1 mA; VDS = VGS;
Figure 9
drain-source leakage current
VDS = 100 V; VGS = 0 V
IGSS
gate-source leakage current
VGS = ±10 V; VDS = 0 V
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 5 A;
Figure 7 and 8
Dynamic characteristics
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
tf
−
36
50
pF
−
7
−
ns
−
89
−
ns
turn-off delay time
−
18
−
ns
fall time
−
25
−
ns
VDD = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG = 10 Ω
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
5 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
Table 5: Characteristics…continued
Tj = 25 °C unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Source-drain diode
VSD
source-drain (diode forward)
voltage
IS = 5 A; VGS = 0 V;
Figure 15
−
0.85
1.2
V
trr
reverse recovery time
−
49
−
ns
Qr
recovered charge
IS = 20 A; dIS/dt = −100 A/µs
VGS = −10 V; VDS = 30 V
−
130
−
nC
03nc31
25
VGS (V) = 10
ID
(A)
4
20
03nc30
180
RDSon
(mΩ)
175
5
170
15
165
10
160
3
155
5
150
2.2
0
0
2
4
6
8
145
10
VDS (V)
4
Tj = 25 °C
6
8
VGS (V)
10
Tj = 25 °C; ID = 5 A
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
03nc32
250
a
RDSon
2.2
VGS (V) = 3
(mΩ)
03ne90
2.4
3.2
2
1.8
200
1.6
3.4
3.6
3.8
4
1.4
1.2
5
1
150
0.8
0.6
0.4
0.2
100
0
0
2
4
6
8
10
ID (A)
12
-60
20
60
100
140
180
Tj (oC)
Tj = 25 °C
R DSon
a = --------------------------R DSon ( 25 °C )
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
-20
Rev. 02 — 18 May 2001
6 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
03aa33
2.5
2
10-1
ID
(A)
10-2
1.5
10-3
VGS(th)
(V)
03aa36
min
1
10-4
0.5
10-5
0
10-6
-60
0
60
120
180
o
0
0.5
1
typ
1.5
Tj ( C)
max
2
2.5
3
VGS (V)
Tj = 25 °C; VDS = VGS
ID = 1 mA; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
03nc33
1200
03nc28
gfs 18
(S)
16
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
C (pF)
1000
14
800
12
10
600
8
Ciss
400
6
4
200
2
0
5
10
ID (A)
10-2
15
Tj = 25 °C; VDS = 25 V
10-1
1
10
102
VDS (V)
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Coss
Crss
0
0
Rev. 02 — 18 May 2001
7 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
03nc29
ID 18
(A)
16
03nc27
5
VGS
(V)
14
VDD = 14 V
4
12
VDD = 80 V
3
10
8
2
6
4
Tj = 150 oC
2
1
Tj = 25 oC
0
0
1
2
3
0
4
0
VGS (V)
2
4
6
8
10
QG (nC)
Tj = 25 °C; ID = 5 A
VDS = 25 V
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
Fig 14. Gate-source voltage as a function of turn-on
gate charge; typical values.
03nc26
15
IS
(A)
10
Tj = 150 oC
5
Tj = 25 oC
0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (V)
VGS = 0 V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
8 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
9. Package outline
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
D
SOT223
E
B
A
X
c
y
HE
v M A
b1
4
Q
A
A1
1
2
3
Lp
bp
e1
w M B
detail X
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.8
1.5
0.10
0.01
0.80
0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
4.6
2.3
7.3
6.7
1.1
0.7
0.95
0.85
0.2
0.1
0.1
OUTLINE
VERSION
SOT223
REFERENCES
IEC
JEDEC
EIAJ
SC-73
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
99-09-13
Fig 16. SOT223 (SC-73).
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
9 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
10. Soldering
7.00
3.85
3.60
3.50
0.30
solder lands
1.20
(4x)
solder resist
4
occupied area
solder paste
7.40
3.90 4.80 7.65
1
2
3
MSA443
1.20 (3x)
1.30 (3x)
5.90
6.15
Dimensions in mm.
Fig 17. Reflow soldering footprint for SOT223 (SC-73).
11. Revision history
Table 6:
Revision history
Rev Date
CPCN
Description
01
20001003
-
Product data; initial version.
02
20010518
-
Product data; second version. Updated Figure 13, Figure 8, Figure 3, and Figure 4.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
10 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
12. Data sheet status
Data sheet status [1]
Product status [2]
Definition
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips Semiconductors
reserves the right to change the specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published at a
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
make changes at any time in order to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change Notification (CPCN) procedure
SNW-SQ-650A.
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
13. Definitions
14. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products
are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
© Philips Electronics N.V. 2001 All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
11 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
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Marketing Communications,
Building BE, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. +31 40 272 4825
Internet: http://www.semiconductors.philips.com
(SCA72)
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 08277
Product data
Rev. 02 — 18 May 2001
12 of 13
BUK98180-100A
Philips Semiconductors
TrenchMOS™ logic level FET
Contents
1
2
3
4
5
6
7
7.1
8
9
10
11
12
13
14
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
© Philips Electronics N.V. 2001.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 18 May 2001
Document order number: 9397 750 08277