BUK7230-55A N-channel TrenchMOS standard level FET Rev. 02 — 16 March 2010 Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Low conduction losses due to low on-state resistance Suitable for standard level gate drive sources Q101 compliant Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications Motors, lamps and solenoids 12 V and 24 V loads Automotive and general purpose power switching 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 55 V ID drain current VGS = 5 V; Tmb = 25 °C; see Figure 1 and 3 - - 38 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 88 W ID = 34 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped - - 58 mJ VGS = 10 V; ID = 25 A; VDS = 44 V; see Figure 14 - 9 - nC VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 11 and 12 - 26 30 mΩ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Dynamic characteristics QGD gate-drain charge Static characteristics RDSon drain-source on-state resistance BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain Simplified outline Graphic symbol D mb 3 S source mb D mounting base; connected to drain G S mbb076 2 1 3 SOT428 (DPAK) 3. Ordering information Table 3. Ordering information Type number BUK7230-55A Package Name Description Version DPAK plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS VDGR drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V drain-gate voltage RGS = 20 kΩ - 55 V VGS gate-source voltage -20 20 V ID drain current Tmb = 25 °C; VGS = 5 V; see Figure 1 and 3 - 38 A IDM peak drain current Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 - 27 A - 150 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 88 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tmb = 100 °C; VGS = 5 V; see Figure 1 [1] Source-drain diode IS source current Tmb = 25 °C - 38 A ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C - 150 A - 58 mJ Avalanche ruggedness EDS(AL)S [1] non-repetitive ID = 34 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; drain-source avalanche Tj(init) = 25 °C; unclamped energy Peak drain current is limited by chip, not package. BUK7230-55A_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 2 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 03aa24 120 03aa16 120 Ider (%) Pder (%) 80 80 40 40 0 0 0 50 100 150 200 0 50 100 150 Tmb (°C) Fig 1. 200 Tmb (°C) Fig 2. Normalized continuous drain current as a function of mounting base temperature Normalized total power dissipation as a function of mounting base temperature 03na49 103 ID (A) RDSon = VDS / ID 102 tp = 10 μs δ= P 10 100 μs tp T D.C. 1 ms 10 ms t tp 100 ms T 1 1 102 10 VDS (V) Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK7230-55A_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 3 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Rth(j-mb) thermal resistance from junction to mounting base Rth(j-a) thermal resistance from junction to ambient see Figure 4 Min Typ Max Unit - - 1.7 K/W - 71.4 - K/W 03na50 10 Zth(j-mb) (K/W) 1 0.5 0.2 0.1 0.05 10−1 δ= P tp T 0.02 Single Shot 10−2 10−6 t tp T 10−5 10−4 10−3 10−2 10−1 1 102 10 tp (s) Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK7230-55A_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 4 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 6. Characteristics Table 6. Symbol Characteristics Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V; Tj = 25 °C 55 - - V ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 50 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10 2 3 4 V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10 - - 4.4 V ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 10 1 - - V VDS = 55 V; VGS = 0 V; Tj = 175 °C - - 500 µA VDS = 55 V; VGS = 0 V; Tj = 25 °C - 0.05 10 µA VDS = 0 V; VGS = 10 V; Tj = 25 °C - 2 100 nA VDS = 0 V; VGS = -10 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 11 and 12 - - 60 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 11 and 12 - 26 30 mΩ ID = 25 A; VDS = 44 V; VGS = 10 V; see Figure 14 - 24 - nC IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge - 5 - nC QGD gate-drain charge - 9 - nC Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 15 VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; RG(ext) = 10 Ω; Tj = 25 °C - 864 1152 pF - 218 262 pF - 139 191 pF - 14 - ns - 68 - ns td(on) turn-on delay time tr rise time td(off) turn-off delay time - 83 - ns tf fall time - 43 - ns LD internal drain inductance measured from drain lead from package to centre of die; Tj = 25 °C - 2.5 - nH LS internal source inductance measured from drain lead from package to source bond pad - 7.5 - nH Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 13 - 0.85 1.2 V trr reverse recovery time - 40 - ns Qr recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = -10 V; VDS = 30 V; Tj = 25 °C - 100 - nC BUK7230-55A_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 5 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 03na46 160 VGS (V) = 20 ID (A) RDSon (mΩ) 16 12 120 03na44 50 40 10 9 80 30 8 7 40 20 6 5 10 0 0 Fig 5. 2 4 6 8 10 VDS (V) Output characteristics: drain current as a function of drain-source voltage; typical values 5 ID (A) 20 Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values 03na45 20 gfs (S) min 10−2 typ max 16 10−3 12 10−4 8 10−5 4 10−6 0 0 2 4 0 6 Sub-threshold drain current as a function of gate-source voltage BUK7230-55A_2 Product data sheet 20 40 60 80 ID (A) VGS (V) Fig 7. 15 VGS (V) 03aa35 10−1 10 Fig 8. Forward transconductance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 6 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 03na41 80 03aa32 5 VGS(th) (V) ID (A) 4 max 60 3 Tj = 25 °C typ 40 Tj = 175 °C 2 min 20 1 0 0 4 8 0 −60 12 VGS (V) Fig 9. Transfer characteristics: drain current as a function of gate-source voltage; typical values VGS (V) = 6 RDSon (mΩ) 60 60 120 180 Tj (°C) Fig 10. Gate-source threshold voltage as a function of junction temperature 03na47 70 0 03aa28 2.4 a 6.5 1.8 7 50 8 1.2 40 9 30 0.6 10 20 0 20 40 60 80 100 ID (A) Fig 11. Drain-source on-state resistance as a function of drain current; typical values BUK7230-55A_2 Product data sheet 0 −60 0 60 120 180 Tj (°C) Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 7 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 03na42 100 03na43 10 VGS (V) IS (A) 8 80 VDD = 14 V VDD = 44 V 60 6 Tj = 175 °C Tj = 25 °C 40 4 20 2 0 0 0 0.4 0.8 1.2 1.4 0 10 VSD (V) 20 30 QG (nC) Fig 14. Turn-on gate charge characteristics; typical values Fig 13. Reverse diode current; typical values 03na48 1600 C (pF) 1200 Ciss 800 Coss 400 Crss 0 10−2 10−1 1 102 10 VDS (V) Fig 15. Input and reverse transfer capacitances as a function of gate-source voltage; typical values BUK7230-55A_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 8 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E A A A1 b2 E1 mounting base D2 D1 HD 2 L L2 1 L1 3 b1 b w M c A e e1 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 b2 c D1 D2 min E E1 min e e1 HD L L1 min L2 w y max mm 2.38 2.22 0.93 0.46 0.89 0.71 1.1 0.9 5.46 5.00 0.56 0.20 6.22 5.98 4.0 6.73 6.47 4.45 2.285 4.57 10.4 9.6 2.95 2.55 0.5 0.9 0.5 0.2 0.2 OUTLINE VERSION SOT428 REFERENCES IEC JEDEC JEITA TO-252 SC-63 EUROPEAN PROJECTION ISSUE DATE 06-02-14 06-03-16 Fig 16. Package outline SOT428 (DPAK) BUK7230-55A_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 9 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK7230-55A_2 20100316 Product data sheet - BUK7230_55A-01 Modifications: BUK7230_55A-01 BUK7230-55A_2 Product data sheet • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 20000929 Product specification - All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 - © NXP B.V. 2010. All rights reserved. 10 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Disclaimers BUK7230-55A_2 Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 11 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BUK7230-55A_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 16 March 2010 © NXP B.V. 2010. All rights reserved. 12 of 13 BUK7230-55A NXP Semiconductors N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Contact information. . . . . . . . . . . . . . . . . . . . . .12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 16 March 2010 Document identifier: BUK7230-55A_2