® PSoC Creator™ Component Datasheet Programmable Gain Amplifier (PGA) 2.0 Features Gain steps from 1 to 50 High input impedance Selectable input reference Adjustable power settings General Description The PGA implements an opamp-based, non-inverting amplifier with user-programmable gain. This amplifier has high input impedance, wide bandwidth and selectable input voltage reference. It is derived from the switched capacitor/continuous time (SC/CT) block. The gain can be between 1 (0 dB) and 50 (+34 dB). The gain can be selected using the configuration window or changed at run time using the provided API. The maximum bandwidth is limited by the gain-bandwidth product of the opamp and is reduced as the gain is increased. The input of the PGA operates from rail to rail, but the maximum input swing (difference between Vin and Vref) is limited to VDDA/Gain. The output of the PGA is class A, and is rail to rail for sufficiently high load resistance. The PGA is used when an input signal has insufficient amplitude. A PGA can be put in front of a comparator, ADC, or mixer to increase the amplitude of the signal to these components. The PGA can be used as a unity gain amplifier to buffer the inputs of lower impedance blocks, including Mixers or inverting PGAs. A unity gain PGA can also be used to buffer the output of a VDAC or reference. Input/Output Connections This section describes the various input and output connections for the PGA. An asterisk (*) in the list of I/Os indicates that the I/O may be hidden on the symbol under the conditions listed in the description of that I/O. Vin – Analog Vin is the input signal terminal. Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Document Number: 001-84660 Rev. ** Revised December 8, 2012 Programmable Gain Amplifier (PGA) ® PSoC Creator™ Component Datasheet Vref – Analog * Vref is the input terminal for a reference signal. The reference input can be connected to an external (to the component) reference or internal (to the component) VSS (ground). When the reference is connected externally, the routing resistance is added to the internal resistors, slightly decreasing the gain and increasing the gain tolerance. Vout – Analog Vout is the output voltage signal terminal. Vout is a function of (Vin – Vref) times the specified Gain: Vout = Vref + (Vin – Vref) × Gain Component Parameters Drag a PGA component onto your design and double-click it to open the Configure dialog. Page 2 of 16 Document Number: 001-84660 Rev. ** ® PSoC Creator™ Component Datasheet Programmable Gain Amplifier (PGA) Gain This parameter sets the initial gain of the PGA. You can select the gain from the following set of allowed values: 1 (default), 2, 4, 8, 16, 24, 32, 48, and 50. The following table shows the gain selection using Internal Resisters R a and Rb Gain Rb Ra 1 0 40k 2 40k 40k 4 120k 40k 8 280k 40k 16 600k 40k 24 460k 20k 32 620k 20k 48 470k 10k 50 490k 10k Power This parameter sets the initial drive power of the PGA. The power determines how fast the PGA reacts to changes in the input signal. There are four power settings: Minimum Power, Low Power (default), Medium Power, and High Power. A Minimum Power setting results in the slowest response time and a High Power setting results in the fastest response time. Vref_Input This parameter is used to select the input voltage reference. The options include: Internal Vss – A ground signal internal to the component provides the amplifier reference. External (default) – A signal on the Vref terminal provides the amplifier reference. The symbol displayed in PSoC Creator changes depending on the reference input selected. Document Number: 001-84660 Rev. ** Page 3 of 16 ® Programmable Gain Amplifier (PGA) PSoC Creator™ Component Datasheet Figure 1. PGA Configurations Application Programming Interface Application Programming Interface (API) routines allow you to configure the component using software. The following table lists and describes the interface to each function. The subsequent sections cover each function in more detail. By default, PSoC Creator assigns the instance name “PGA_1” to the first instance of a component in a given design. You can rename it to any unique value that follows the syntactic rules for identifiers. The instance name becomes the prefix of every global function name, variable, and constant symbol. For readability, the instance name used in the following table is “PGA.” Function Description PGA_Start() Starts the PGA PGA_Stop() Powers down the PGA PGA_SetGain() Sets gain to predefined constants PGA_SetPower() Sets drive power to one of four settings PGA_Sleep() Stops and saves the user configurations PGA_Wakeup() Restores and enables the user configurations PGA_Init() Initializes or restores default PGA configuration PGA_Enable() Enables the PGA PGA_SaveConfig() Empty function. Provided for future use. PGA_RestoreConfig() Empty function. Provided for future use. Page 4 of 16 Document Number: 001-84660 Rev. ** ® PSoC Creator™ Component Datasheet Programmable Gain Amplifier (PGA) Global Variables Variable PGA_initVar Description Indicates whether the PGA has been initialized. The variable is initialized to 0 and set to 1 the first time PGA_Start() is called. This allows the component to restart without reinitialization after the first call to the PGA_Start() routine. If reinitialization of the component is required, then the PGA_Init() function can be called before the PGA_Start() or PGA_Enable() function. void PGA_Start(void) Description: This is the preferred method to begin component operation. This function turns on the amplifier with the power and gain based on the settings provided during the configuration or the current values after PGA_Stop() has been called. Parameters: None Return Value: None Side Effects: None void PGA_Stop(void) Description: This function turns off PGA and enables its lowest power state. Note This API is not recommended for use on PSoC 5 silicon. This device has a defect that causes connections to several analog resources to be unreliable when not powered. The unreliability manifests itself in silent failures (for example, unpredictably bad results from analog components) when the component using that resource is stopped. When using this silicon, all analog components in a design should be powered up (by calling their respective _Start() APIs, for instance PGA_Start()) at all times. Do not call the PGA_Stop() APIs. Parameters: None Return Value: None Side Effects: None. Does not affect power or gain settings. Document Number: 001-84660 Rev. ** Page 5 of 16 ® Programmable Gain Amplifier (PGA) PSoC Creator™ Component Datasheet void PGA_SetPower(uint8 power) Description: This function sets the drive power to one of four settings; minimum, low, medium, or high. Parameters: uint8 power: See the following table for valid power settings. Power Setting Notes PGA_MINPOWER Minimum active power and slowest slew rate PGA_LOWPOWER Low power and slew rate PGA_MEDPOWER Medium power and slew rate PGA_HIGHPOWER Highest active power and fastest slew rate Return Value: None Side Effects: None void PGA_SetGain(uint8 gain) Description: This function sets the amplifier gain to a value between 1 and 50. Parameters: uint8 gain: See the following table for valid gain settings. Gain Setting PGA_GAIN_01 Gain = 1 PGA_GAIN_02 Gain = 2 PGA_GAIN_04 Gain = 4 PGA_GAIN_08 Gain = 8 PGA_GAIN_16 Gain = 16 PGA_GAIN_24 Gain = 24 PGA_GAIN_32 Gain = 32 PGA_GAIN_48 Gain = 48 PGA_GAIN_50 Gain = 50 Return Value: None Side Effects: None Page 6 of 16 Notes Document Number: 001-84660 Rev. ** ® PSoC Creator™ Component Datasheet Programmable Gain Amplifier (PGA) void PGA_Sleep(void) Description: This is the preferred API to prepare the component for sleep. The PGA_Sleep() API saves the current component state. Then it calls the PGA_Stop() function and calls PGA_SaveConfig() to save the hardware configuration. Call the PGA_Sleep() function before calling the CyPmSleep() or the CyPmHibernate() function. Refer to the PSoC Creator System Reference Guide for more information about power management functions. Parameters: None Return Value: None Side Effects: None void PGA_Wakeup(void) Description: This is the preferred API to restore the component to the state when PGA_Sleep() was called. The PGA_Wakeup() function calls the PGA_RestoreConfig() function to restore the configuration. If the component was enabled before the PGA_Sleep() function was called, the PGA_Wakeup() function will also re-enable the component. Parameters: None Return Value: None Side Effects: Calling the PGA_Wakeup() function without first calling the PGA_Sleep() or PGA_SaveConfig() function may produce unexpected behavior. void PGA_Init(void) Description: This function initializes or restores the component according to the customizer Configure dialog settings. It is not necessary to call PGA_Init() because the PGA_Start() API calls this function and is the preferred method to begin component operation. Parameters: None Return Value: None Side Effects: All registers will be set to values according to the customizer Configure dialog. void PGA_Enable(void) Description: This function activates the hardware and begins component operation. It is not necessary to call PGA_Enable() because the PGA_Start() API calls this function, which is the preferred method to begin component operation. Parameters: None Return Value: None Side Effects: None Document Number: 001-84660 Rev. ** Page 7 of 16 Programmable Gain Amplifier (PGA) ® PSoC Creator™ Component Datasheet void PGA_SaveConfig(void) Description: Empty function. Provided for future use. Parameters: None Return Value: None Side Effects: None void PGA_RestoreConfig(void) Description: Empty function. Provided for future use. Parameters: None Return Value: None Side Effects: None MISRA Compliance This section describes the MISRA-C:2004 compliance and deviations for the component. There are two types of deviations defined: project deviations – deviations that are applicable for all PSoC Creator components specific deviations – deviations that are applicable only for this component This section provides information on component-specific deviations. Project deviations are described in the MISRA Compliance section of the System Reference Guide along with information on the MISRA compliance verification environment. The PGA component does not have any specific deviations. Sample Firmware Source Code PSoC Creator provides many example projects that include schematics and example code in the Find Example Project dialog. For component-specific examples, open the dialog from the Component Catalog or an instance of the component in a schematic. For general examples, open the dialog from the Start Page or File menu. As needed, use the Filter Options in the dialog to narrow the list of projects available to select. Refer to the “Find Example Project” topic in the PSoC Creator Help for more information. Functional Description The PGA is constructed from a generic SC/CT block. You can find details about this block in the applicable device datasheet and TRM, available on the Cypress website. The gain is selected by Page 8 of 16 Document Number: 001-84660 Rev. ** ® PSoC Creator™ Component Datasheet Programmable Gain Amplifier (PGA) adjusting two resistors, Ra and Rb (see Figure 2. PGA Schematic). Ra may be set to either 10 k , 20 k , or 40 k . Rb is set between 0 k and 1000 k to generate the gain values selectable in either the parameter dialog or the PGA_SetGain() function. The block has a programmable capacitor in parallel with the feedback resistor, Rb. The value of the capacitor is configured for each gain selection to achieve guaranteed stability. Reassigning Rb values without also selecting the appropriate feedback capacitor value can result in PGA instability. Cypress strongly recommends that you use the provided APIs for gain changes. Figure 2. PGA Schematic Vin Vout Vref Ra Rb The bandwidth of the PGA is determined by gain and power setting. Because of compensation capacitor and stability requirements, the bandwidth is somewhat reduced from the absolute maximum expected from the opamp's open loop gain-bandwidth. Resources The PGA component uses one SC/CT analog block. API Memory Usage The component memory usage varies significantly, depending on the compiler, device, number of APIs used and component configuration. The following table provides the memory usage for all APIs available in the given component configuration. The measurements have been done with the associated compiler configured in Release mode with optimization set for Size. For a specific design the map file generated by the compiler can be analyzed to determine the memory usage. PSoC 3 (Keil_PK51) Configuration Default PSoC 5 (GCC) PSoC 5LP (GCC) Flash SRAM Flash SRAM Flash SRAM Bytes Bytes Bytes Bytes Bytes Bytes 228 22 388 12 332 5 Document Number: 001-84660 Rev. ** Page 9 of 16 ® Programmable Gain Amplifier (PGA) PSoC Creator™ Component Datasheet DC and AC Electrical Characteristics for PSoC 3 Specifications are valid for –40 °C £ TA £ 85 °C and TJ £ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V, except where noted. Typical values are for T A = 25 °C. DC Characteristics Parameter Description Conditions Min Typ Max Units Vssa - Vdda V Vin Input voltage range Power Mode = minimum VOS Input offset voltage Power mode = high, gain = 1 - - 10 mV TCVOS Temp. coeff. input offset voltage, absolute value Power mode = high, gain = 1 - - ±30 µV/°C Vonl DC output nonlinearity - - ±0.01 % of FSR CIN Input capacitance - - 7 pF Voh Output voltage swing VDDA0.15 - - V - - VSSA+ 0.15 V - - 300 mV G = 1, Vref internally connected to VSS – 0.01 0.15 +/-% G = 2, Vref internally connected to VSS – 0.1 1.0 Ge4 G = 4, Vref internally connected to VSS – 0.5 1.35 Ge8 G = 8, Vref internally connected to VSS – 0.6 1.6 Ge16 G = 16, Vref internally connected to VSS – 0.7 2.5 Ge32 G = 32, Vref internally connected to VSS – 0.85 5.0 Ge50 G = 50, Vref internally connected to VSS – 2.1 5.0 G = 1, Vref internally connected to VSS N/A 1.2 2.5 G = 2, Vref internally connected to VSS – 8.6 20 Gd4 G = 4, Vref internally connected to VSS – 13 29 Gd8 G = 8, Vref internally connected to VSS – 15 35 Gd16 G = 16, Vref internally connected to VSS – 18 40 Gd32 G = 32, Vref internally connected to VSS – 38 75 Gain = 1 Power mode = high, gain = 1, Rload = 100 k Vol Output voltage swing Power mode = high, gain = 1, Rload = 100 k Vsrc Ge1 Ge2 Gd1 Gd2 Page 10 of 16 Output voltage under load Gain accuracy, deviation from nominal Gain change versus temperature to VDDA / 2 to VDDA / 2 Iload = 250 A, Vdda ³ 2.7V, power mode = high ppm/°C Document Number: 001-84660 Rev. ** ® PSoC Creator™ Component Datasheet Parameter Programmable Gain Amplifier (PGA) Description Gd50 PSSR Power supply rejection ratio IDD Operating current Conditions Min Typ Max G = 50, Vref internally connected to VSS – 167 400 48 - - – 1.5 1.65 Power mode = high Units dB mA Figures Histogram Input Offset Voltage 18 16 Occurance 14 12 10 8 6 4 2 6.0 4.0 2.0 0.0 -2.0 -4.0 -6.0 0 Vos mV AC Characteristics Conditions Min Typ Ma x Units Power mode = high, gain = 1, input = 100 mV 6.7 8 - MHz 20 - 80%, Gain = 1, P = High 3.0 4.8 N/A V/µs SR_G16 20 - 80%, Gain = 16, P = High 0.5 0.8 7 N/A V/µs SR_G50 20 - 80%, Gain = 50, P = High 0.2 5 0.8 4 N/A V/µs - 43 - nV/sqrtH z Parameter BW1 Description -3dB Bandwidth peak-to-peak SR_G1 en Slew rate Input noise density Document Number: 001-84660 Rev. ** f = 100 kHz, P = High , Vdda = 5V Page 11 of 16 ® Programmable Gain Amplifier (PGA) PSoC Creator™ Component Datasheet Figures Bandwidth versus Temperature, at Different Gain Settings, Power = High 1000 10 nV/rtHz Gain = 1 BW, MHz Voltage noise, VDDA = 5.0V, Power = High Gain = 24 1 100 Gain = 48 0.1 -40 -20 0 20 40 60 80 Temperature, °C 10 0.01 0.1 1 kHz 10 100 1000 DC and AC Electrical Characteristics for PSoC 5 Specifications are valid for –40 °C £ TA £ 85 °C and TJ £ 100 °C, except where noted. Specifications are valid for 2.7 V to 5.5 V, except where noted. Typical values are for T A = 25 °C. DC Characteristics Parameter Description Conditions Min Typ Max Unit s VSSA – VDDA V Vin Input voltage range Power mode = minimum VOS Input offset voltage Power mode = high, gain = 1 – – 20 mV TCVOS Input offset voltage drift with temperature Power mode = high, gain = 1 – – ±30 µV/° C Ge1 Gain error, gain = 1 – – ±2 % Ge16 Gain error, gain = 16 – – ±8 % Ge50 Gain error, gain = 50 – – ±10 % VONL DC output – – ±0.1 %of Page 12 of 16 Gain =1 Document Number: 001-84660 Rev. ** ® PSoC Creator™ Component Datasheet Parameter Description Programmable Gain Amplifier (PGA) Conditions Min Typ Max nonlinearity CIN Input capacitance VOH Output swing VOL Output swing VSRC Output voltage under load IDDA Operating current PSRR Power supply rejection ratio Unit s FSR – – 7 pF Power mode = high, gain = 1, RLOAD = 100 k to VDDA/2 VDDA – 0.15 – – V Power mode = high, gain = 1, RLOAD = 100 k to VDDA/2 – – VSSA + 0.15 V – – 300 mV – 1.5 1.65 mA 48 – – dB ILOAD = 250 A, power mode = high Power mode = high Figures PGA Voffset Histogram, 4096 samples/1024 parts Document Number: 001-84660 Rev. ** Page 13 of 16 ® Programmable Gain Amplifier (PGA) PSoC Creator™ Component Datasheet AC Characteristics Parameter Description Conditions Min Typ Max Units BW1 –3 dB bandwidth Power mode = high, gain = 1, noninverting mode, 300 mV £ VIN £ VDDA – 1.2 V, CL £ 25 pF 6 8 – MHz SR1 Slew rate Power mode = high, gain = 1, 20% to 80% 3.0 – – V/µs en Input noise density Power mode = high, VDDA = 5 V at 100 kHz – 43 nV/sqrtHz Figures Bandwidth versus Temperature, Gain = 1, Power Mode = High Noise versus Frequency, VDDA = 5 V, Power Mode = High 1000 nV/rtHz 100 10 0.01 Page 14 of 16 0.1 1 kHz 10 100 1000 Document Number: 001-84660 Rev. ** ® PSoC Creator™ Component Datasheet Programmable Gain Amplifier (PGA) Component Changes This section lists the major changes in the component from the previous version. Version 2.0 1.90 Description of Changes Reason for Changes / Impact Added variable Vdda support. Added MISRA Compliance section. The component does not have any specific deviations. Schematic and source file updates to use a single shared boost clock for all SC/CT block components. A single shared clock will be used as boost clock by all SC/CT block components Reduces the number of analog clocks required in the system for For low voltage VDDA operation uses a boost clock shared by all the boost clocks. With this change a single boost clock is shared instead of using a separate clock for each SC/CT based SC/CT based components. component. 1.80 Added PSoC 5LP support Changed resistor combination for Gain = 24 Resistor values were incorrect Added all component APIs with the CYREENTRANT keyword Minor GUI updates 1.70.a Added DC and AC Electrical characteristics data for PSoC 5 1.70 Changed PGA_Stop() API for PSoC 5 Change required to prevent the component from impacting unrelated analog signals when stopped, when using PSoC 5. Updated PGA response graph Change required to dynamically resize graph to fit window and to add horizontal and vertical grids. Removed VDDA parameter from component customizer VDDA setting in the component is redundant and unnecessary for multiple components. The parameter was removed and the component queries the global setting for minimum VDDA in the DWR and automatically enables the pump when necessary. Created configuration window to include frequency response graphs for an easier to use GUI. Previous configuration window did not provide enough information for ease of use. Corrected SetGain constants in the header file The constants provided for the SetGain API had incorrect values. These have been corrected. 1.60 Added characterization data to Document Number: 001-84660 Rev. ** Page 15 of 16 ® Programmable Gain Amplifier (PGA) Version PSoC Creator™ Component Datasheet Description of Changes Reason for Changes / Impact datasheet 1.50 Minor datasheet edits and updates Added Sleep/Wakeup and Init/Enable APIs. To support low power modes, as well as to provide common interfaces to separate control of initialization and enabling of most components. Removed Gain setting of 25. The gain of 25 was too close to other values and therefore offered no value. Updated the symbol image and Configure dialog. These were updated to comply with corporate standards. Changed the names of the registers Updated to comply with coding guidelines. by adding "_REG." Added specification table and graphic placeholders Data to be provided when characterization is complete. © Cypress Semiconductor Corporation, 2012. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in lifesupport systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. PSoC® is a registered trademark, and PSoC Creator™ and Programmable System-on-Chip™ are trademarks of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in lifesupport systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Page 16 of 16 Document Number: 001-84660 Rev. **