5 4 3 2 1 Table of Contents 2 3 4 5 Revisions Notes Power, Clock, and Reset User Functions USB to BDM Refence Block Rev Description Date A Original Release 08/31/07 Approved DK D D C C B B A Transportation & Standard Products Group 6501 William Cannon Drive West Austin, TX 78735-8598 This document contains information proprietary to Freescale Semiconductor and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of Freescale Semiconductor. Drawing Title: Designer: DANIEL KRUCZEK DEMO9S08AC60E 5 4 3 2 Drawn by: DANIEL KRUCZEK Page Title: Approved: DANIEL KRUCZEK Size C Document Number PDF: SPF-23729 SOURCE: SCH-23729 Date: Friday, August 31, 2007 TITLE PAGE Sheet 1 Rev A 1 of 5 A 5 4 3 2 1 1. Unless Otherwise Specified: All resistors are in ohms, 5%, 1/8 Watt All capacitors are in uF, 20%, 50V All voltages are DC All polarized capacitors are aluminum electrolytic 2. Interrupted Lines coded with the same letter or letter combinations are electrically connected. D 3. Device type number is for reference only. The number varies with the manufacturer. D 4. Special signal usage: _B Denotes - Active-Low Signal <> or [] Denotes - Vectored Signals 5. Interpret diagram in accordance with American National Standards Institute specifications, current revision, with the exception of logic block symbology. C C B B A A Drawing Title: DEMO9S08AC60E Page Title: NOTES 5 4 3 2 Size C Document Number PDF: SPF-23729 SOURCE: SCH-23729 Date: Friday, August 31, 2007 Sheet 1 Rev A 2 of 5 5 4 3 2 1 P_EXT_5V P3_3V U1 VDD_5V U2 F1 1 VIN_F 2 0.75A 1 + C19 100UF 3 VIN 2 VOUT 1 ADJ C18 10UF D4 MBRS130L 4 VOUT LT1086 R1 C12 10UF 510 OHM R2 1.5K J1 VIN 2 VOUT 1 ADJ VOUT 4 LT1086 R3 + 2 D 3 C13 100UF + C15 100UF C16 100UF + 510 OHM R17 820 OHM C14 10UF C17 10UF D 1 3 2 PJ-002A-SMT JP2 7V to 12V CENTER POSITIVE 1 HDR_1X1 DNP RESET_B BKGD VDD 1 1 VDD R28 10.0K C 2 J32 2 BKGD 1 3 5 DNP VDD 2 4 6 RESET_B VDD_5V HDR_2X3 Q3 VDD U3A VDD VCC 1 OF 2 XTAL 4 RESET 57 PTG5/XTAL 58 PTG6/EXTAL SPST PB NO VDD 22 VSS_1 VSS_2 21 59 VDDAD VSSAD 44 45 C10 0.1UF + P_IO_5V XTAL_R EXTAL_R VREFH VREFL 0 OHM W1 HDR_2X1 U6 ZR431 3 2 1 54 55 2 EXTAL HDR_1X3 10M Y1 P3_3V 1 1 D1 SML-LXL1206GC Q2 MGSF1N02LT1G R15 10K SUB MC9S08AC60 2 1 1 DNP 2 R18 HDR_1X1 W3 W2 HDR_1X3 R19 R4 10K 1 2 1 0 OHM 2 JP1 C11 100UF 3 R20 BKGD/MS 2 2 3 3 RESET_B 3 VCC_TGT_5V 1 2 3 56 SW6 1 IRLML6402TRPBF VCC_3V 3 P_EXT_5V 1 R7 10.0K C 4MHz B C23 22PF C22 22PF B R16 510 OHM C24 0.1UF C20 0.1UF C21 0.1UF VDD R21 10.0K J2 1 2 3 4 5 6 7 IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO14 IO13 IO12 IO11 IO10 IO9 IO8 14 13 12 11 10 9 8 DIP14 DNP R25 10.0K DNP A A Drawing Title: DEMO9S08AC60E Page Title: POWER, CLOCK, AND RESET 5 4 3 2 Size C Document Number PDF: SPF-23729 SOURCE: SCH-23729 Date: Friday, August 31, 2007 Sheet 1 Rev A 3 of 5 5 4 3 2 1 PTA[0:7] PTB[0:7] PTC[0:6] RESET_B BKGD VDD PTE[0:7] R29 10.0K PTF[0:7] U3B D 2 OF 2 PTG[0:4] 2 IRQ PTA7 PTA6 PTA5 PTA4 PTA3 PTA2 PTA1 PTA0 33 32 31 30 29 28 27 26 PTA7 PTA6 PTA5 PTA4 PTA3 PTA2 PTA1 PTA0 PTB7/AD1P7 PTB6/AD1P6 PTB5/AD1P5 PTB4/AD1P4 PTB3/AD1P3 PTB2/AD1P2 PTB1/TPM3CH1/AD1P1 PTB0/TPM3CH0/AD1P0 41 40 39 38 37 36 35 34 PTB7 PTB6 PTB5 PTB4 PTB3 PTB2 PTB1 PTB0 PTC6 PTC5/RXD2 PTC4 PTC3/TXD2 PTC2/MCLK PTC1/SDA1 PTC0/SCL1 9 64 1 63 62 61 60 PTC6 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0 PTD7/KBI1P7/AD1P15 PTD6/TPM1CLK/AD1P14 PTD5/AD1P13 PTD4/TPM2CLK/AD1P12 PTD3/KBI1P6/AD1P11 PTD2/KBI1P5/AD1P10 PTD1/AD1P9 PTD0/AD1P8 53 52 51 50 47 46 43 42 PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0 PTE7/SPSCK1 PTE6/MOSI1 PTE5/MISO1 PTE4/SS1 PTE3/TPM1CH1 PTE2/TPM1CH0 PTE1/RXD1 PTE0/TXD1 20 19 18 17 16 15 14 13 PTE7 PTE6 PTE5 PTE4 PTE3 PTE2 PTE1 PTE0 PTC4_SW P_IO_5V PTA0 PTA1 PTA2 PTA3 PTA4 PTA5 PTA6 PTA7 3 10 K B 4 D R33 R43 47K C38 0.1 UF 20K U10 V+ PTD5_SW 4 - 3 + 1 LMV321DBV VR48 10.0K C34 0.1 UF CONN_SKT_20X2 1 2 HDR_2X1 PTD7 1 2 1 2 HDR_2X1 1 R46 10.0K 3 2 1 2 J8 5 OUT 4 NC 2 6 4 HDR_2X1 C27 0.1 UF 20K 3 4 R6 1.0K 1 2 - 3 + 1 LMV321DBV VR24 10.0K 2 SW2 PTC6_SW C28 0.1 UF U7 V+ EL7900ILCZ 1 2 PTE0 1 VCC GND1 EN_B GND2 SPST PB NO J12 HDR_2X1 1 3 2 4 C29 0.1 UF SPST PB NO J13 HDR_2X1 J14 HDR_2X1 PTD7_SW SW4 PTD2_SW PTE1 J15 HDR_2X1 1 3 2 4 PTD6_SW C7 0.1 UF PTF0 1 VDD 3 VDD 2 VDD 27 28 4 V+ C1+ VCC 26 GND VC2+ 25 3 1 U5 PTF1 PTA2 HDR_2X1 PTA3 J27 2 1 PTF5 PTA4 J28 PTF6 2 1 PTA5 J29 C1- 21 22 23 INVALID FORCEOFF FORCEON LED_BAR_10 10 9 8 7 6 5 4 3 2 1 PTF4_SW PTF5_SW 11 12 13 14 15 16 17 18 19 20 R44 R42 R41 R40 R39 R38 R37 R35 R34 R32 510 OHM 510 OHM 510 OHM 510 OHM 510 OHM 510 OHM 510 OHM 510 OHM 510 OHM 510 OHM R45 0 OHM DNP 14 13 12 T1IN T2IN T3IN 20 19 18 17 16 15 R2OUTB R1OUT R2OUT R3OUT R4OUT R5OUT R1IN R2IN R3IN R4IN R5IN 2 9 10 11 15 YOUT 14 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 G-SELECT1 VSS G-SELECT2 5 6 7 8 9 10 11 13 16 1 2 J34 R55 C2T1OUT T2OUT T3OUT 12 XOUT 0 OHM C8 C9 0.1 UF SLEEPMODE 0.1 UF 0 OHM 4 5 6 7 8 M1 1 6 2 7 3 8 4 9 5 4 M2 LT_PTC4_SW R36 1.0K B R31 1.0K MMA6270QT DB9_5747844-4 MAX3243 R10 10.0K LED1 R9 10.0K PTF6_SW J22 HDR_2X1 HDR_2X1 PTF7 2 1 24 J21 HDR_2X1 HDR_2X1 PTA6_SW PTE1_SW PTF3_SW J20 HDR_2X1 HDR_2X1 1 2 2 1 PTF4 PTA5_SW PTE0_SW J19 HDR_2X1 1 2 J26 1 2 2 1 PTF3 PTA4_SW PTF2_SW J18 HDR_2X1 HDR_2X1 1 2 J25 1 2 PTA1 PTA6 1 2 2 1 2 1 PTF2 PTA3_SW R56 C6 0.1 UF J17 HDR_2X1 HDR_2X1 PTA2_SW R47 10.0K PTF0_SW PTF1_SW J24 PTA1_SW R8 10.0K 1 2 J16 HDR_2X1 PTA0 C33 0.1 UF VDD 3 0.1 UF SPST PB NO PTA0_SW P3_3V C26 U13 SW3 PTD3_SW 1 2 PTG4 PTG3 PTG2 PTG1 PTG0 76SB08ST C U4 PTD1_SW PTC2_SW 5 HDR_2X1 SW1 PTF7 PTF6 PTF5 PTF4 PTF3 PTF2 PTF1 PTF0 16 15 14 13 12 11 10 9 R23 VDD 47K PTC2 J9 PTC6 49 48 25 24 23 VDD R22 J7 10 12 11 8 7 6 5 4 PTD4_SW 1 2 J6 PTD5 SUB MC9S08AC60 1 2 3 4 5 6 7 8 A GND 1 6 J11 HDR_2X1 SW5 B IRQ RESET_B BKGD PTG4 PTB0 PTB1 PTB2 PTB3 PTB4 PTB5 PTB6 PTB7 PTC1 PTC0 PTG2 PTG3 PTF4 PTF5 PTC5 PTC3 5 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 SPST PB NO PTG4/KBI1P4 PTG3/KBI1P3 PTG2/KBI1P2 PTG1/KBI1P1 PTG0/KBI1P0 3 2 VCCA VCCB SN74LVC1T45 2 HDR_2X1 VDD 2 VR1 1 DIR 1 2 PTD3 PTD6 PTF7 PTF6 PTF5/TPM2CH1 PTF4/TPM2CH0 PTF3/TPM1CH5 PTF2/TPM1CH4 PTF1/TPM1CH3 PTF0/TPM1CH2 C39 0.1 UF J10 HDR_2X1 PTD4 C HDR_2X1 1 2 J4 PTD2 HDR_2X1 PTD0_SW 1 2 J3 PTD1 PTE0 PTE1 PTG0 PTG1 PTE2 PTE3 PTE6 PTE5 PTE7 PTE4 1 2 J5 PTD0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 2 PTC4 5 VDD J35 1 2 IRQ/TPMCLK P3_3V VDD U9 PTF7_SW JP4 A J30 J23 HDR_2X1 HDR_2X1 2 1 PTA7_SW A 1 HDR_1X1 PTA7 DNP J31 JP5 HDR_2X1 Drawing Title: 1 DEMO9S08AC60E HDR_1X1 Page Title: DNP 5 4 USER FUNCTIONS 3 2 Size C Document Number PDF: SPF-23729 SOURCE: SCH-23729 Date: Friday, October 12, 2007 Sheet 1 Rev A 4 of 5 5 4 3 2 1 D D VCC VCC_3V VCC 3 C2 0.1UF C4 4.7UF + U11A BODY 1 OF 2 2 MGSF1N02LT1G VCC C5 0.1UF + 1.0K C1 4.7UF 1.0K R30 1.0K R52 1.0K R51 R54 JP3 DNP TGT_EXTAL 1 C HDR_1X1 VCC VDD VREGEN REF3V XIRQ_PE0 IRQ_PE1 R_W_PE2 LSTRB_PE3 ECLK_PE4 MODA_PE5 MODB_PE6 XCLKS_PE7 PWROFF3V PWROFF5V BKGD TEST RESET_B IOC0_PT0 IOC1_PT1 IOC2_PT2 IOC3_PT3 SDAT0_PQ0 SDAT1_PQ1 SDAT2_PQ2 SDAT3_PQ3 SDAT4_PQ4 SDAT5_PQ5 SDAT6_PQ6 SDAT7_PQ7 SBSY_PP0 SCD_PP1 SCE_PP2 SWP_PP3 SCLE_PP4 SALE_PP5 SWE_PP6 SRE_PP7 SDCMD_PM0 SDCLK_PM1 SDDATA0_PM2 SDDATA1_PM3 SDDATA2_PM4 SDDATA3_PM5 MSBS_PJ0 MSSDIO_PJ1 MSSCLK_PJ2 U12 2 VIN C32 0.1UF + 4 GND 1.2V REF RST 1 NC NC NC NC NC 3 5 6 7 8 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 31 32 33 34 35 36 37 38 39 VCC D2 1 R5 2 680 OHM SML-LXL1206GC BGND_TO_TGT R13 BGND_TGT VCC_TGT_5V VCC Q4 IRLML6402TRPBF 47 OHM C RESET_TGT RESET_TO_TGT R12 3 47 OHM W5 DNP PASS_ENABLE USB_SPEED MC9S12UF32 + C42 4.7UF C37 0.1UF HDR_1X3 R53 U11B 1.0K 1 BODY 2 OF 2 3 2 1 2 4 6 2 1 RESET_B 8 VCC 2 1B 1A 1C BKGND 6 2B 15 16 U8 VDD RN1B 4.7K 1 RESET_TO_TGT 7 PASS_ENABLE_J 2A 5 2C 3 GND 4 VCC R14 D3 2 BGND_TO_TGT 680 OHM 1 SML-LXL1206YC BGND_TGT RESET_TGT 74LVC2G66 R11 26OHM C41 0.1UF 510 OHM D_MINUS J33 DMH DMF 92 91 R58 33 OHM DPF DPH 89 90 R57 33 OHM VDDA 88 RPU 87 VSSA 86 S2 2 3 4 1 S1 D_PLUS -D +D G V 1 C25 0.1UF R26 10K 94 4 VCC_TGT_5V 93 RREF 2 DNP VSSA1 3 HDR_1X3 CFATA_D0_PB0 CFATA_D1_PB1 CFATA_D2_PB2 CFATA_D3_PB3 CFATA_D4_PB4 CFATA_D5_PB5 CFATA_D6_PB6 CFATA_D7_PB7 CFATA_D8_PA0 CFATA_D9_PA1 CFATA_D10_PA2 CFATA_D11_PA3 CFATA_D12_PA4 CFATA_D13_PA5 CFATA_D14_PA6 CFATA_D15_PA7 CFATA_A2_PU5 CFATA_A1_PU4 CFATA_A0_PU3 CF_REG_PU2 CINPACK_ADMACK_PU1 CWAIT_AIORDY_PU0 CCE1_ACS0_PS0 CFOE_PS1 CFIOIS16_PS2 CCE2_ACS1_PS3 CFATA_IORD_PS4 CFATA_IORW_PS5 CWE_ADMARQ_PS6 CRDY_AINTQ_PS7 CF_A3_PR0 CF_A4_PR1 CF_A5_PR2 CF_A6_PR3 CF_A7_PR4 CF_A8_PR5 CF_A9_PR6 CF_A10_PR7 USB R50 C36 0.1UF FB2 1 1.5K VDDX VSSX 61 60 VSS3X VDD3X VDDR VSSR 30 29 10 9 EXTAL 85 ? XTAL 84 ? 2 B VCC 26OHM VCC_3V C31 0.1UF C30 0.1UF 2 J36 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 2 R49 1.0M Y2 12MHz 1 W4 VCC FB1 VER0 VER1 VER2 VER3 VER4 VER5 VER6 VER7 R27 10K RN1A 4.7K 3 VTARGET_ENABLE VCC B 2 1 2 3 VCC HDR_2X3 2 VCC MC34164 1 3 5 Q5 IRLML6402TRPBF 1 Q1 1 8 11 REF3V 12 95 96 C3 97 0.1UF 98 99 100 1 2 3 4 UF32_BKGD 5 6 UF32_RESET_B 7 40 41 42 43 1 C35 22PF MC9S12UF32 C40 22PF BKGD RESET_B A A Drawing Title: DEMO9S08AC60E Page Title: USB TO BDM REFERENCE BLOCK 5 4 3 2 Size C Document Number PDF: SPF-23729 SOURCE: SCH-23729 Date: Thursday, September 27, 2007 1 Sheet Rev A 5 of 5