KEMET C0201C101J3GAC

Product Bulletin
Surface Mount Ceramic Chip Capacitors – C0201 Series - C0G Dielectric
Outline Drawing
L
W
TIN PLATE
T
B
NICKEL PLATE
S
ELECTRODES
CONDUCTIVE METALLIZATION
Dimensions – Millimeters (Inches)
EIA Size Metric Size
Code
Code
0201
0603
L
Length
W
Width
B
Bandwidth
S
Separation
0.6 (.024) ± 0.03 (.001)
0.3 (.012) ± 0.03 (.001)
0.15 (.006) ± 0.05 (.002)
-
See Capacitance Value Table below for thickness dimension.
Capacitance Value
Capacitance
Value (pF)
KEMET Part Number
Voltage
10
C0201C100D3GAC
25
12
C0201C120J3GAC
25
15
C0201C150J3GAC
25
18
C0201C180J3GAC
25
22
C0201C220J3GAC
27
33
Capacitance
Tolerance
Thickness
Qty
7" Reel
0.3 (.012) ± 0.03 (.001)
15,000
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
C0201C270J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
C0201C330J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
39
C0201C390J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
47
C0201C470J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
56
C0201C560J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
68
C0201C680J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
82
C0201C820J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
100
C0201C101J3GAC
25
J,K,M
0.3 (.012) ± 0.03 (.001)
15,000
D
F-9080B 07/06
Capacitor Ordering Information
C 0201
C
101
J
G
A
C
End Metallization
C = Standard (Tin-plate
nickel barrier)
Style
C - Ceramic
Size Code
See dimension table
Failure Rate Level
A = Not Applicable
Specification
C - Standard
Capacitance Code, pF
First two digits represent significant figures.
Third digit specifies number of zeros. 100 pF = 101.
(Use “9” for 1.0 through 9.9 pF)
(Use “8” for 0.1 through .99 pF)
Capacitance Tolerance
D = ± 0.5pF
J = ± 5%
3
K = ± 10%
Temperature Characteristic
Designated by Capacitance
Change Over Temperature Range
G = C0G (0±30 ppm/°C) (-55°C +125°C)
Voltage
3 = 25V
M = ±20%
Electrical Parameters
As detailed in the KEMET Surface Mount Catalog F3102 for C0G, with following specific requirements
based on room temperature (25°C) parameters:
• Operating Range: -55°C to +125°C, with no-bias capacitance shift limited to ± 30 ppm/°C over that range.
• Insulation Resistance (IR) measured after 2 minutes at rated voltage @ 25°C: Limit is 10,000 MΩ, minimum.
• Capacitance and Quality Factor (Q) measured at 1 MHz and 0.5 Vrms: DF limit is 0.1%
Q = (< 30 pF: Q ≥ 400 + 20C; > 30pF: Q ≥ 1000)
C = Nominal Capacitance
Soldering Process
These components are suitable for reflow only. All parts incorporate the standard KEMET barrier layer of pure
nickel, with an overplate of pure tin to provide excellent solderability as well as resistance to leaching.
Marking
These chips will be supplied unmarked.
In general, the information in the KEMET Surface Mount catalog F3102 applies to these
capacitors. The information in this bulletin supplements that in the catalog.
F-9080B 07/06
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com