LXE1671Guide.pdf

LX1671/LX1672 CLQ
(MLPQ PACKAGE)
MULTIPLE OUTPUT LOADSHARETM
PWM EVALUATION BOARD
USERS GUIDE
I N T E G R A T E D
Copyright © 2002
Revision 0.2d, 8/8/2002
P R O D U C T S
LX1671 EVALUATION BOARD
USER GUIDE
TABLE OF CONTENTS
Overview................................................................................................................................................3
LX1671 PWM Topology.........................................................................................................................3
LX1671 Features ...................................................................................................................................3
Evaluation Board Features ....................................................................................................................3
LoadSHARE (Bi-Phase) Operation........................................................................................................3
Configuration .........................................................................................................................................4
Initial Setup ............................................................................................................................................5
Single Phase / Bi-Phase ........................................................................................................................6
Required Test Equipment ......................................................................................................................6
Optional Test Equipment .......................................................................................................................6
Evaluation Board Operation...................................................................................................................6
Load Regulation.....................................................................................................................................7
Line Regulation......................................................................................................................................7
Over Current Protection.........................................................................................................................7
UVLO .....................................................................................................................................................7
Oscilloscope Waveforms .......................................................................................................................7
Schematic ............................................................................................................................................10
Bill Of Materials....................................................................................................................................11
Silk Screen and Etch Layers................................................................................................................12
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 2
LX1671 EVALUATION BOARD
USER GUIDE
OVERVIEW
The LX1671 evaluation board is designed to allow
the user to get a detailed understanding of the
operation of the LX1671 or LX1672 and to allow
evaluation
of
several
configurations
that
demonstrate the full capabilities of the controller. All
three Pulse Width Modulator (PWM) phases and the
Linear Regulator (LDO) can be completely
evaluated. The LX1672 is a two phase version of
the LX1671
Due to the flexibility of the LX1671 evaluation board
a number of components must be selected for the
specific mode of operation desired and to establish
several variable parameters. The evaluation board is
delivered with all required factory-installed
components in a fully functional configuration.
The LX1671 evaluation board can be delivered in a
number of standard configurations. User changes to
the standard board can be made for different
applications and custom versions may be supplied in
some situations. When the MLPQ package is used
the LX1671 and the LX1672 have the same pinout
so the circuit board can be used for either part.
• Each PWM controller can operate from a
different input voltage when in single or BiPhase.
• When in Bi-Phase the currents supplied by
each phase can be unbalanced with the
LoadSHARE™ topology.
• 300 KHz PWM Switching frequency.
• Hiccup current limiting in all PWM outputs.
• Reference allows low output voltages down to
0.8 volts.·
• No current sense resistors; RDS(ON) is used for
current limit and hiccup mode.
• Soft start on each PWM and Under Voltage
Lockout on VCC and upper FET drivers·
• Output voltage power-up sequencing by
selecting soft-start capacitor value.
• Reference input on Phase 2 for forced current
sharing or DDR memory data bus termination.
EVALUATION BOARD FEATURES·
• The heat sinking on the LX1671/72 evaluation
board allows up to 8A out for each PWM
phase. Note: The controller is capable of 15A
out on all PWM phases but component
selection and thermal limits on the evaluation
board will prevent operating at full current.
• Linear Regulator with pass transistor, limited
to five watts power dissipation.
• Provisions are made for different input
voltages of 3.3, 5 , and 12 volts to be used as
input power for each of the three phases.
Bootstrap diodes and capacitors can be
installed depending on the input voltage
selected.
• Three terminal blocks are provided to allow
connection of input 3.3, 5, and 12 volt power.
• Four terminal blocks are provided for
connecting loads to the outputs.
• A connector with jumpers allows enabling
each PWM and the linear regulator
independently.
This document is intended to be used in conjunction
with the LX1671 data sheet and LX1671 Product
Design Guide (or LX1672 if applicable).
LX1671 PWM TOPOLOGY
The LX1671 is a PWM controller offering a high level
of integration. Three separate synchronous, voltage
mode PWM controllers are integrated into a single
package. Phases 1 and 2 can be used in a BiPhase mode with LoadSHARE™ or used as two
separate single-phase controllers. Phase 3 is always
used in single phase. The single-phase buck
regulators are limited to approximately 15 Amps
maximum output by the available gate drive; the
ability to operate in Bi-Phase allows output currents
of 30 Amps by paralleling the output capabilities of
two controller phases. There is also a controller for
a linear regulator that utilizes an external pass
transistor with a maximum output of approximately
5A.
LX1671 FEATURES
• Three synchronous PWM controllers
• One LDO controller
• Two PWM controllers can be operated in BiPhase to double the current output capability.·
• In Bi-Phase the two PWMs operate 180
degrees out of phase to reduce input and
output ripple current.
Copyright © 2002
Rev 0.2d, 8/8/2002
LOADSHARE (BI-PHASE) OPERATION
For LoadSHARE operation it is necessary to use
phases 1 and 2
because of the different
configuration of the phase 2 error amplifier input.
The phase 2 error amplifier does not internally
connect to the reference like the other two phases
but is brought out to the (RF2) pin to allow a filtered
feedback from phase 1 to be brought into the error
amplifier. Phase 1 determines the output voltage
and forces phase 2 to follow. When using
Microsemi
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Page 3
LX1671 EVALUATION BOARD
USER GUIDE
LoadSHARE the input power drawn by phase 1 and
2 can be different to proportion the available power.
Phase 3 and the LDO operate independently and
their output voltages can be set as desired.
Jumpers are installed on J1 to disable each
regulator independently.
CONFIGURATION
The LX1671 evaluation board is available in several
standard configurations or it can be customized for
specific applications.
Note: For the purpose of this document one of the
standard configurations (LX1671 EVAL -010) has
been chosen to describe the evaluation board
features and operation, all wording relates to this
specific version. The standard board is designed for
the MLPQ package. The LX1672 in the MLPQ
Vout Phase 1 & 2
Vout Phase 3
Vout LDO
Vin Phase 1
Vin Phase 2
Vin Phase 3
Vin LDO
Phase 3
Phase 1 & 2
VCCL
package has the same pinout so that the same
circuit board can be used with either part.
This configuration has three output voltages with
phases 1 and 2 operating in LoadSHARE; phase 3
and the LDO each have their own outputs.
The LoadSHARE configuration used is the ESR
method where the current sharing ratio is
determined by the ESR of the output inductors.
Since both inductors are the same part number the
current sharing ratio is 50% for each phase.
The Schematic (Fig 7) and Bill of Material (Fig 8)
are for the -010 version which is configured as
shown in Table 1 below.
Each evaluation board will have a Schematic and
Bill of Material documenting that specific
configuration.
1.5 Volts
2.5 Volts
2.5 Volts
5 Volts
3.3 Volts
12 Volts
3.3 Volts
Single Phase
LoadSHARE (Bi-Phase)
5 Volts
Phase 1 (VC1)
Phase 2 (VC2)
Phase 3 (VC3)
+12 Volts
+12 Volts
Bootstrap
Table 1 LX1671–010 Eval Board Configuration
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 4
LX1671 EVALUATION BOARD
USER GUIDE
INITIAL SETUP
Before applying any input power to the circuit board
several choices must be made and the proper
components must be chosen to allow operation with
the desired characteristics. Note: The factory
configuration is fully functional and can be changed
if desired.
Prior to changing the factory
configuration, the following criteria should be
considered:
• Single Phase or LoadSHARE operation for
Phase 1 and 2.
• Input voltages for each of the three PWM
regulators.
• Will bootstrap be required, based on input
voltages.
• Output voltages for all four outputs.
• Output current limit for PWM outputs.
• Power up sequencing for output voltages.
Once the above are known the proper components
and jumpers must be installed for the following:
• Feedback and low pass filters for phase 1 and
2 PWM regulators if LoadSHARE operation is
selected.
• Output voltage for Phase 2 if single phase
operation is used.
• Output voltage for Phase 1 and 3 if different
from preset values.
• Output voltage for the LDO if different from
preset value
• Bootstrap configuration if required.
• Current Limit for the PWM (if other than the
preset value).
• Soft start capacitors if different start up
sequence is required.
When LoadSHARE operation is used low pass
filtering is required on the two feedback paths from
the outputs of phase 1 and 2 to the phase 2 error
amplifier inputs. Typical values are shown on the
evaluation board schematic, Figure (7)
CONFIGURATION OPTIONS·
Bootstrap
A bootstrap circuit will be required if the high side
FET driver supply voltage (VCX) is not at least 5
volts greater than the PWM input voltage ( high side
FET drain voltage).
A typical configuration is to use +12 for the high side
gate driver, VCX, with either 3.3 or 5 as the PWM
input, this gives sufficient gate drive to enhance the
Copyright © 2002
Rev 0.2d, 8/8/2002
upper FET. An alternative is to use the bootstrap
configuration to add 5 volts to the PWM input
voltage which will generally make a slight
improvement in efficiency by keeping the VCX
voltage as low as possible and does not require a
+12 volt input. If 12 volts is selected as the PWM
input then bootstrapping will be required. Each of
the three PWM phases has provisions for a diode,
capacitor, and several 0 ohm jumpers that allow
bootstrapping each phase independently. See
schematic Figure (7). Be sure that the zero ohm
jumpers are configured to connect either +12 or the
bootstrap voltage to the VCX pins and add the
diode and capacitor for that phase. The bootstrap
diodes and capacitors are CR1-C26,CR2-C2, and
CR3,-C25.
Rectifier/Filter
Since the LDO gets its power from VC1 using a
bootstrap configuration for phase 1 results in the
error amplifier having a square wave as its supply
voltage. This square wave can be rectified and
filtered by adding a second diode and capacitor to
obtain a filtered output. VCCL can also be powered
by a bootstrap rectifier/filter configuration, options
allow deriving VCCL from either phase 2 or phase 3.
Additional diodes and capacitors are used to
implement a rectifier/filter with a clean DC output as
follows, CR4-C33 for VC1; CR5-C9 for VCCL
derived from phase 3; and CR10-C9 for VCCL
derived from phase 2. By optimizing drive voltages it
is possible to achieve small improvements in
efficiency.
Input Voltage Jumpers
There are three resistors shown in series with each
high side FET for the PWMs. These are actually
zero ohm jumpers that connect the desired input
voltage 3.3, 5, or 12 volts to the high side FET drain.
Only one of the three can be installed per phase with
the others left open. Similarly the LDO has three
choices that allow 3.3 volts, 5 volts, or the output of
phase 3 to be used for the input.
R6 and R56
The resistors shown as R6 and R56 on the
schematic are actually jumper wires due to the high
currents that can flow in these paths. These are only
installed for specific configurations.
Parallel Diodes
There are 3 Schottky diodes shown in parallel with
the lower FETs on the PWM output stage. These
diodes CR7-8- 9 may not be installed but can be
used to help prevent negative spikes on the lower
FET drain and will give a slight improvement in
efficiency.
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LX1671 EVALUATION BOARD
USER GUIDE
• Install a jumper for R26 - Connects the
reference to phase 2 error amplifier positive
input RF2·
• Remove R18 and C22 - Filtered feedback to
FB2·
• Change R21 to 4.02K
• Phase 2 voltage feedback
• Select R17 and R20 to give the desired output
voltage for phase 2
LoadSHARE Methods
There are four basic methods used for LoadSHARE
that are described in the LX1671 Product Design
Guide. Numerous components are related to the
implementation of these various methods.
LoadSHARE Filters
The low pass filters used for LoadSHARE operation
are made up of R18-C22 for the FB2 input and
R23-C6 for the RF2 input. Typical values are 61.9K
and 4700pf.
Proportional LoadSHARE
U2 and U3 are only used if proportional LoadSHARE
is desired. Several other components around U2
and U3 are also used only with proportional
LoadSHARE control.
LDO Soft Start
CR6-C27-R27 can be used to ramp the LDO output
up slowly if desired. The primary reason for this is to
prevent a possible UVLO condition if 5 volts is used
for the LDO input. If 5 volts is used for the LDO input
and a sudden current demand is placed on it by the
LDO load it can result in a transient on the 5 volts
that will trigger the UVLO.
Frequency Compensation
Three resistors R8-13-22 set the gain of the PWM
error amplifiers, these are typically 200K ohm and
three capacitors C23-31-32 can be placed in parallel
with the feedback resistors to lower the error
amplifier bandwidth.
Bulk Capacitors
There are a number of output bulk capacitors.
Phase one output C10-11; phase 2 output C12-13;
phase 3 output C19-26. These are chosen to
provide the required output filtering at the output
voltage.
 R17 + R20 

R20 

VOUT = 0.8
This equation is simplified and does not account for
drop across the input resistors due to error amplifier
input current. It is suggested that input resistors be
kept between 1K ohm and 10K ohm to minimize
error and noise coupling from surrounding circuits.
REQUIRED TEST EQUIPMENT
• Multiple channel Oscilloscope with ten to one
probes having short ground leads
• Digital Multimeter
• Power source (3.3 volts) if required for PWM
input (factory configuration requires +3.3)
• Power source (5 volts) with sufficient current
for loads (factory configuration requires +5)
• Power Source (12 volts) if required for PWM
input or VCX (factory configuration requires
+12)
Resistive loads for all outputs at the required power
levels for each output
OPTIONAL TEST EQUIPMENT
• Oscilloscope current probe with amplifier
• Electronic loads
SINGLE PHASE / BI-PHASE
• LoadSHARE operation of phases 1 and 2
requires several component selections that
are factory installed (if ordered for Bi-Phase
operation). If single-phase operation of phase
1 and 2 is desired than modifications must be
made as follows.·
• Remove R6 (jumper wire) - Connects phase 1
and 2 outputs together
• Remove R23 and C6 - Feedback filter to RF2·
• Remove C5 and replace with a jumper Phase 2 feedback integrator capacitor
• Change R22 to 200K - Phase 2 error amplifier
gain·
Copyright © 2002
Rev 0.2d, 8/8/2002
EVALUATION BOARD OPERATION
Once all components have been installed power can
be applied to the input terminal blocks and initial
operation checked with no load. It is recommended
that the power supplies used on the input have
adjustable current limits that can be set to a low
value for initial turn on of a new board. Apply all
input voltages with current limits set below 1A and
enable each output independently to verify that all
outputs are functional and have the correct output
voltage. Input power sequencing is not critical.
Once every output has been verified for proper
operation at no-load, a resistive load can be
connected to each output (up to the desired output
level). It is recommended that each output be loaded
individually the first time to insure normal operation
Microsemi
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LX1671 EVALUATION BOARD
USER GUIDE
and that each FET be checked for safe operating
temperature after a few moments of operation at full
load. When all outputs have been checked at full
output current with resistive loads there are a
number of tests that can be performed to evaluate
performance. For details of operation see the
LX1671 Product Design Guide.
EFFICIENCY
Since efficiency is always of interest it should be
measured. Variables such as input voltage and
output
current
effect
efficiency
so
any
measurements should be made at or close to actual
values. Efficiency (h) can be expressed as :
POUT
maintain safe FET currents and temperatures. The
initial RSET value is 1K ohm resulting in a 25A current
limit, this will result in safe average FET
temperatures and currents.
UVLO
The VCC and VCX pins are monitored by a undervoltage lockout circuit that will disable the PWM if
either voltage is below the preset limit. The input
voltages to these pin can be lowered to verify
operation. All phases will shutdown if any monitored
voltage goes below the threshold. The LDO is not
effected by the UVLO.
DYNAMIC LOADS
Measure the output voltage at a fixed load and vary
the load current over the range of interest. Observe
the change in output voltage as a function of load
current.
In many applications it is required that the output
voltage remain within specified limits for a specified
step change in load current. The primary component
that influences this specification is the output
capacitor. A step change in output current will result
in an instantaneous drop in output voltage that is the
product of the output capacitor ESR and the
magnitude of the current step. A current step can be
applied using either a dynamic load or an external
FET switch with an appropriate drain resistor to give
the desired current change. A function generator can
be used to supply the FET gate drive. The rise time
of the current step can be controlled by adding
resistance in series with the FET gate to slow down
the switching time.
LINE REGULATION
OSCILLOSCOPE WAVEFORMS
η=
PIN
× 100
Note: There will be voltage drops across the input
terminal blocks and zero ohm jumpers that will effect
efficiency measurements. The input voltage is best
measured directly across the half bridge to obtain
accurate results. The output voltage can be
measured at the output capacitor.
LOAD REGULATION
Measure the output voltage and vary the input
voltage over the range of interest. Observe the
change in output voltage as a function of input
voltage. Note: The under voltage lockout internal to
the LX1671 requires greater than 4.5 volts VCC to
operate and the VCC max is 6 volts. If the required
input voltage range includes voltages less than 4.5
or more than 6 volts then the high side FET drain
must be connected to a separate power supply to
isolate it from VCC.
VOUT
Inductor Current
Upper FET Gate
OVER CURRENT PROTECTION
Lower FET Gate
Each output has a current protection limit that can
be set to the desired maximum current by a resistor
RSET. Short circuit current limits can be verified either
by gradually increasing the load current or by
applying a shorting wire across the output. The drain
of the lower FET should be monitored with an
oscilloscope to insure that the over current limit is
functioning properly, during the hiccup period the
lower FET will be held on. With a short circuit
condition the LX1671 will go into a hiccup mode
where the soft start mode is repeatedly cycled to
Copyright © 2002
Rev 0.2d, 8/8/2002
Figure 1 – Phase 1 FET Gates & Output
Upper and lower gate waveforms along with inductor
current and output voltage. Note that the duty cycle
is 30% corresponding to a 5 volt input with a 1.5 volt
output.
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LX1671 EVALUATION BOARD
USER GUIDE
off and the drain voltage is slightly below ground.
This is caused by the FET body diode conducting
due to inductor current flow from ground up to the
phase node. When the FET actually turns on the
drop is reduced due to the low RDS(on) in parallel
with the body diode
Inductor Current
Lower FET Drain Voltage
VOUT
Lower FET Gate
Soft Start
Figure 2 – Phase 2 FET Gates & Output
Lower FET gate drive against its drain voltage and
inductor current. Note that the inductor current
ramps up when the lower FET is off (upper FET on)
and then ramps down when the lower FET is on.
The difference in width between the low gate drive
and high drain voltage is the non-overlap period
where both FETs are off.
Phase 1 – Lower FET Drain Voltage
Phase 1 – Inductor Current
Phase 2 – Inductor Current
Output Current
Figure 4 – Soft Start and Hiccup Mode
An external switch is periodically connecting a load
resistor across the output terminals. The load
resistor is low enough to result in current pulses that
exceed the current limit threshold determined by the
RSET resistor. During the soft start interval the
output voltage ramps up to the correct value while
the current limit circuit limits the peak value of the
current pulses. At the end of the soft start interval
the next load pulse triggers the hiccup sequence
causing the output voltage to go to zero until the end
of the hiccup interval when the soft start ramp
begins again. This sequence will repeat indefinitely
keeping average FET temperatures within
acceptable limits.
Phase 2 – Lower FET Drain Voltage
Figure 3 – Phase 1 versus Phase 2 Bi-Phase
Waveforms of the phase node voltage and inductor
currents of phase 1 and 2 operating in Bi-Phase.
The drain voltage waveforms show the 180 degree
out-of-phase operation of the two PWM controllers.
The difference in duty cycle is due to phase 1 having
a 5 volt input and phase 2 having a 3.3 volt input. If
both input voltages were the same the inductor
currents would also be 180 degrees out of phase.
Note the non-overlap period where both FETs are
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 8
LX1671 EVALUATION BOARD
USER GUIDE
Phase 1 & 2 VOUT
VOUT
Phase 3 VOUT
LDO VOUT
IOUT
+5 PWM Input
Inductor Current
Figure 5 – Start-Up Sequence
Figure 6 – Phase 2 Transient Response
Start-up sequence of phase 1 and 2 in Bi-Phase
versus phase 3 and the LDO when the +5 input is
switched on.
Output voltage and inductor current of phase 3 when
a 3 amp current step is applied to the output.
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 9
Copyright © 2002
Rev 0.2d, 8/8/2002
5
NU
R47
VOUT1
1
2
+5V
RTN
Vout4
2.5V
out
1
2
2
1
1
2
-
+
+5V
NU
R54
4
3
4 -
3 +
C29
NU
R23
61.9K
20K
R29
5
R24
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Microsemi
NU
R48
U2
LMC7101 NU
1
R49
NU
R17
NU
R26 NU
NU
C30
DIS-1
R50 100
R51
NU
20K
R28
Q9
12
11
10
9
8
7
6
5
4
3
2
1
DIS-1
DIS-2
DIS-3
PW GD
LDDIS
R22 2.00K
NU
LDDIS
C31
NDS7002A
FB2
4700pF
.22uF
4700pF
61.9K
R18
C5
C7
C27
NU
R44 499
R27
NU
+12V
CR6
NU
C22/R20
61.9K
R21
FB2
R25
1.58K
3.40K
C6/R55
4700pF
+ C17
180uF
4V
2
+5V
+3.3V
VOUT3
SUD45N05-20L
Q3
R43 NU
R45 ZOJ
R46 NU
+ C21
470uF
16V
+12V
+ C20
680uF
6.3V
+5V
NDS7002A
Q8
U3
LMC7101 NU
DIS-2
TB3
TB2
TB1
Vout1
+12 RTN
+12 VIN
+5 RTN
+5 VIN
C4
.1uF
2.00K
R19
EO2
FB2
RF2
SS2
36
35
34
33
32
U1
LX1671-CLQ
1
3
5
7
9
11
14
JI
C28
15
16
NU
2
4
6
8
10
12
17
18
NU
SS3
FB3
EO3
N/C
CS3
VS3
N/C
N/C
VCC
VCCL
PG3
LO3
+5V
+12V
R41 ZOJ
C8
2.00K
R12
PWGD
CR5
C32
+3.3 RTN
TB7
2.00K
R9
2
1
R11
2.00K
VOUT1
2.00K
R15
4.25K
R10
5817
CR9
.22uF
C26
+
5817
C2
+ C24
180uF
4V
R37 ZOJ
R36 NU
R35 NU
+5V
NU
+ C15
180 4V
L3 5.0uh
+ C19
100uF 16V
NU
1N5817
CR1
+3.3V
2.21K
R16
Q7
Si4842DY
C25
1N5817
CR2
CR3
C34
100uF 16V
Q6
Si4842DY
NU
+12V
DIS-3
+5V
+3.3 VIN
R14 2.00K
20K
R30
Q10
NDS7002A
200K
NU
4.7uF
10.0
NU
NU
CR4/R40
C1
NU
R2 ZOJ
1.0uF
CR10
R8
R7 2.00K
DIS-1
DIS-2
C9
R42
R52 NU
R53 ZOJ
C3
.33uF
20
21
22
23
24
25
26
27
28
29
30
31
+5V
R13 200K
C23
19
CS VS SS FB EO CS VS
2
1
1
2
1
1
1
13
RSVD
AGND
DGND
LDDIS
LDFB
LDGD
VC2
HO2
37
LO PG LO HO VC VC HO
2
1
1
3
1
1
3
38
.22
C33
R38 ZOJ
R39 NU
R1 ZOJ
R3 NU
Approved By
Approved By
Checked By
Drawn By
180 4V
2
1
RTN
REVISIONS
DESCRIPTION
Date:
B
Size
Title
5817
CR8
5817
R34 ZOJ
270uF 2V
+ C12
R5 NU
R4 NU
+ C13
+12V
+5V
+3.3V
+ C11
+12V
+5V
+3.3V
DATE
2
1
LX1671 EVAL - 010
Model No.:
-
1
Drawing No:
Sheet
TB5
1
ES2825
of
RTN
Vout1
X1
Rev
RTN
Vout2
1.5V
out
R6
Jumper
2
1
APPR
1.5V
out
TB4
05/08/02
SCHEMATIC, LX1671 MLP EVALUATION BOARD
L2 5.0uh
180uF 4V
+ C14
R56 NU
270uF 2V
+ C10
R33 NU
R31 ZOJ
R32 NU
+ C36
+ C35
L1 5.0uh
150uF 6V
+ C18
ORIGINAL ECN #298 RELEASE
CR7
Vout3
2.5V
out
ED120/2DS
TB6
Q5
Si4842DY
Q4
Si4842DY
VOUT3
+ C16
+12V
+5V
+3.3V
Q2
Si4842DY
Q1
Si4842DY
-
X1
LTR
LX1671 EVALUATION BOARD
USER GUIDE
SCHEMATIC
Figure 7 – LX1671 EVAL –010 Schematic
Page 10
LX1671 EVALUATION BOARD
USER GUIDE
BILL OF MATERIALS LX1671 EVAL -010
MISCELLANEOUS COMPONENTS
Line
Item
Part Description
Manufacturer & Part #
Reference
Designators
MLPQ
U1
Qty
1
2
Int. Ckt, Multi-Phase PWM
FAB, PWB, Eval Board X1
MICROSEMI
MICROSEMI
3
Diode, Schottky, 1A 20V
MICROSEMI UPS5817
4
Inductor, Power, 5µH, 6.5A
Trans, N-Channel, 30V, 6mΩ, 19A,
35nC Max
Trans, N-Channel, 30V, 18mΩ, 50A
Trans, N-Channel, 60V, 2Ω
Terminal Block, 2Pin
Header, 12Pin, 2x6 Dual Row
COOPER
CTX5-4A
SMD
CR1,CR7,
CR8,CR9
L1-L3
VISHAY
SI4842DY
SO-8
Q1, Q2, Q4-Q7
6
TO-252
SOT-23
Q3
Q8, Q9, Q10
TB1-B7
J1
1
3
7
1
Case
Reference
Designators
Qty
1206
0805
0805
0805
0805
D7.3x4.3
D7.3x4.3
D7.3x4.3
D7.3x4.3
10x10.5
10x10.5
1206
C8
C4, C26, C33
C2,C7,C7,C25,C26
C3
C5, C6, C22
C10-C13
C14-C17, C24,C36
C18,C35
C19,C34
C20
C21
C9
1
3
4
1
3
4
6
2
2
1
1
1
Case
Reference
Designators
Qty
5
6
7
8
9
LX1671CLQ
SGE2825X1
Case
SUD45N05-20L
VISHAY
FAIRCHILD NDS7002A
SGE2442-2
PWRMITE
1
1
4
3
CAPACITORS
Line
Item
1
2
3
4
5
6
7
8
9
10
11
12
Part Description
4.7µF, 16V, Ceramic
0.1µF, 25V, ±10%
0.22µF, 25V, ±10%
0.33µF, 25V, ±10%
4700pF, 25V, ±10%
270µF, 2V, Poly Elect
180µF, 4V, Poly Elect
150µF, 6V, Poly Elect
100µF, 16V, Poly Elect
680µF, 6.3V, ±20% Poly
470µF, 16V, ±20%, AL-EL
1µF, 16V, Ceramic
Manufacturer & Part #
Taiyo Yuden EMK316BJ475ML
ROHM
MCH182CN104KK
ROHM
MCH182CN224KK
ROHM
MCH182CN334KK
ROHM
MCH182CN472KK
CDE
ESRE271M02B
CDE
ESRE181M04B
CDE
ESRE151M06B
NEC
NRD107M16
FUJITSU
FP-063RE681M-R
PANASONIC EEU-FC1C471
Taiyo Yuden EMK316BJ105ML
RESISTORS
Line
Item
Part Description
Manufacturer & Part #
1
0Ω Jumper
ROHM
SGE2372-5
2
0Ω Jumper
ROHM
Buss Wire
4
2K, 1%, 1/8W
ROHM
MCR10F2001
0805
5
6
7
8
9
10
11
200K, 1%, 1/8W
4.25K, 1%, 1/8W
2.21K, 1%, 1/8W
61.9K, 1%, 1/8W
3.402K, 1%, 1/8W
1.58K, 1%, 1/8W
20K, 1%, 1/8W
ROHM
ROHM
ROHM
ROHM
ROHM
ROHM
ROHM
MCR10F2003
MCR10F4251
MCR10F2211
MCR10F6192
MCR10F3401
MCR10F1581
MCR10F2002
0805
0805
0805
0805
0805
0805
0805
0805
#18GA
R3 R31, R34, R37,
R41,R43, R45, R50,
R53
R6
R7, R9, R11, R12, R14,
R15, R19, R22
R8, R13
R10
R16
R18, R21, R23
R24
R25
R28-R30
9
1
8
2
1
1
3
1
1
3
Figure 8
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 11
LX1671 EVALUATION BOARD
USER GUIDE
PCB SILK SCREEN
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 12
LX1671 EVALUATION BOARD
USER GUIDE
Figure10 Component Side Layer 1
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
Power Ground
Phase 1 VOUT
Phase 2 VOUT
Power Ground
Phase 2 Phase Node
Phase 3 Input
Phase 3 VOUT
Phase 3 Phase Node
Power Ground
Phase 2 Input
Phase 1 Input
LDO Input
Phase 1 Phase Node
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 13
LX1671 EVALUATION BOARD
USER GUIDE
PCB LAYOUT / LAYERS
Figure 11 – Ground Plane Layer 2
1. Phase 1 Phase Node
2. Phase 2 Phase Node
3. Analog Ground
Figure 12 - +5V Plane Layer 3
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 14
LX1671 EVALUATION BOARD
USER GUIDE
PCB LAYOUT / LAYERS
1. Phase 1 Input
2. Phase 2 Input
3. Phase 3 Input
Figure 13 - +12V Plane Layer 4
1. Phase 3 Phase Node
2. Phase 3 VOUT
Figure 14 - +3.3V Plane Layer 5
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Page 15
LX1671 EVALUATION BOARD
USER GUIDE
PCB LAYOUT / LAYERS
1. Phase 2 VOUT
2. Phase 1 VOUT
3. LDO Input
Figure 15 – Layer 6 (Solder Side View)
Copyright © 2002
Rev 0.2d, 8/8/2002
Microsemi
Page 16
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, FAX: 714-893-2570
Signatu
re Not
Verified
KD
Digitally
signed by
KD
DN:
cn=KD,
o=Microse
mi, c=US
Date:
2002.08.08
08:00:44
-07'00'