AT27LV040A Features • • • • • • • • • • Fast Read Access Time - 120 ns Dual Voltage Range Operation Low Voltage Power Supply Range, 3.0V to 3.6V or Standard 5V ± 10% Supply Range Compatible With JEDEC Standard AT27C040 Low Power 3.3-volt CMOS Operation 20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V 29 mW max. Active at 5 MHz for VCC = 3.6V JEDEC Standard Packages 32-Lead PLCC 32-Lead TSOP High Reliability CMOS Technology 2,000V ESD Protection 200 mA Latchup Immunity Rapid Programming Algorithm - 100 µs/byte (typical) CMOS and TTL Compatible Inputs and Outputs JEDEC Standard for LVTTL Integrated Product Identification Code Commercial and Industrial Temperature Ranges 4 Megabit (512K x 8) Low Voltage OTP CMOS EPROM Description The AT27LV040A is a high performance, low power, low voltage, 4,194,304 bit onetime programmable read only memory (OTP EPROM) organized as 512K by 8 bits. It requires only one supply in the range of 3.0 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using battery power. Atmel’s innovative design techniques provide fast speeds that rival 5V parts while keeping the low power consumption of a 3V supply. At VCC = 3.0V, any byte can be accessed in less than 120 ns. With a typical power dissipation of only 18 mW at 5 MHz and VCC = 3.3V, the AT27LV040A consumes less than one half the power of a standard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V. (continued) Pin Configurations Pin Name Function A0 - A18 Addresses O0 - O7 Outputs CE Chip Enable OE Output Enable PLCC Top View AT27LV040A TSOP Top View Type 1 0557A 3-115 Description (Continued) System Considerations The AT27LV040A is available in industry standard JEDEC-approved one-time programmable (OTP) plastic PLCC and TSOP packages. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention. Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. The AT27LV040A operating with VCC at 3.0V produces TTL level outputs that are compatible with standard TTL logic devices operating at VCC = 5.0V. The device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts. Atmel’s AT27LV040A has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27LV040A programs exactly the same way as a standard 5V AT27C040 and uses the same programming equipment. 3-116 AT27LV040A AT27LV040A Block Diagram Absolute Maximum Ratings* Temperature Under Bias .................. -40°C to +85°C Storage Temperature...................... -65°C to +125°C Voltage on Any Pin with Respect to Ground......................... -2.0V to +7.0V (1) Voltage on A9 with Respect to Ground ...................... -2.0V to +14.0V (1) VPP Supply Voltage with Respect to Ground....................... -2.0V to +14.0V (1) *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: 1. Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V dc which may be exceeded if certain precautions are observed (consult application notes) and which may overshoot to +7.0 volts for pulses of less than 20 ns. Operating Modes CE Mode \ Pin Read (2) VIL Output Disable (2) Standby (2) VIH Rapid Program PGM (3) Verify (3) PGM Inhibit X (3) VIL X VIH OE VIL VIH X VIH VIL VIH Ai VPP Ai X X (1) X X X Ai VPP Ai VPP X VPP VCC Outputs VCC (2) DOUT VCC (2) High Z VCC (2) High Z VCC (3) DIN VCC (3) DOUT VCC (3) High Z (4) Product Identification (3, 5) VIL VIL Notes: 1. X can be VIL or VIH. 2. Read, output disable, and standby modes require, 3.0V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V. 3. Refer to Programming Characteristics. Programming modes require VCC = 6.5V. A9 = VH A0 = VIH or VIL A1 - A18 = VIL X VCC (3) Identification Code 4. VH = 12.0 ± 0.5V. 5. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte. 3-117 DC and AC Operating Conditions for Read Operation AT27LV040A Operating Temperature (Case) Com. Ind. VCC Power Supply -12 -15 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C 3.0V to 3.6V 3.0V to 3.6V 5V ± 10% 5V ± 10% = Preliminary Information DC and Operating Characteristics for Read Operation Symbol Parameter Condition Min Max Units VCC = 3.0V to 3.6V ILI ILO IPP1 (2) Input Load Current VIN = 0V to VCC ±1 µA Output Leakage Current VOUT = 0V to VCC ±5 µA VPP = VCC 10 µA ISB1 (CMOS), CE = VCC ± 0.3V 20 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 100 µA 8 mA VPP (1) Read/Standby Current VCC (1) Standby Current ISB f = 5 MHz, IOUT = 0 mA, CE = VIL ICC VCC Active Current VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC + 0 .5 V VOL Output Low Voltage IOL = 2.0 mA 0.4 V VOH Output High Voltage IOH = -2.0 mA 2.4 V VCC = 4.5V to 5.5V ILI ILO IPP1 (2) Input Load Current VIN = 0V to VCC ±1 µA Output Leakage Current VOUT = 0V to VCC ±5 µA VPP = VCC 10 µA ISB1 (CMOS), CE = VCC ± 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA f = 5 MHz, IOUT = 0 mA, CE = VIL 30 mA VPP (1) Read/Standby Current ISB VCC (1) Standby Current ICC VCC Active Current VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC + 0.5 V VOL Output Low Voltage IOL = 2.1 mA 0.4 V VOH Output High Voltage IOH = -400 µA Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP. 3-118 AT27LV040A 2.4 V 2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. AT27LV040A AC Characteristics for Read Operation (VCC = 3.0V to 3.6V and 4.5V to 5.5V) AT27LV040A -12 Symbol tACC (3) Parameter Condition Min -15 Max Min Max Units Address to Output Delay CE = OE = VIL 120 150 ns tCE (2) CE to Output Delay OE = VIL 120 150 ns tOE (2, 3) OE to Output Delay CE = VIL 50 60 ns 40 50 ns tDF (4, 5) OE or CE High to Output Float, whichever occurred first tOH Output Hold from Address, CE or OE, whichever occurred first Notes: 0 0 ns 2, 3, 4, 5. - see AC Waveforms for Read Operation. = Preliminary Information AC Waveforms for Read Operation (1) Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V. See Input Test Waveforms and Measurement Levels. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE . 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC . 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. 3-119 Output Test Load Input Test Waveform and Measurement Level tR, tF < 20 ns (10% to 90%) Note: CL = 100 pF including jig capacitance. Pin Capacitance (f = 1 MHz, T = 25°C) (1) Typ Max Units CIN 4 8 pF VIN = 0V COUT 8 12 pF VOUT = 0V Note: 3-120 Conditions 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. AT27LV040A AT27LV040A Programming Waveforms (1) Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27LV040A a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Symbol Parameter Test Conditions ILI Input Load Current VIN=VIL,VIH VIL Input Low Level VIH Input High Level VOL Output Low Voltage IOL = 2.1 mA VOH Output High Voltage IOH = -400 µA ICC2 VCC Supply Current (Program and Verify) IPP2 VPP Supply Current VID A9 Product Identification Voltage Limits Max Units ±10 µA -0.6 0.8 V 2.0 VCC + 0.5 V 0.4 V Min 2.4 CE = VIL 11.5 V 40 mA 20 mA 12.5 V 3-121 AC Programming Characteristics Rapid Programming Algorithm TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V A 100 µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. Symbol Parameter Test Conditions* (1) Limits Min Max Units 2 µs tOES OE Setup Time 2 µs tDS Data Setup Time 2 µs tAH Address Hold Time 0 µs tDH Data Hold Time 2 µs tDFP OE High to Output Float Delay (2) 0 tVPS VPP Setup Time 2 µs tVCS VCC Setup Time 2 µs tAS Address Setup Time tPW CE Program Pulse Width tOE Data Valid from OE (2) tPRT VPP Pulse Rise Time During Programming (3) 130 95 ns 105 µs 150 ns 50 ns *AC Conditions of Test: Input Rise and Fall Times (10% to 90%).....................20 ns Input Pulse Levels..........................................0.45V to 2.4V Input Timing Reference Level..........................0.8V to 2.0V Output Timing Reference Level.......................0.8V to 2.0V Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven —see timing diagram. 3. Program Pulse width tolerance is 100 µsec ± 5%. Atmel’s 27LV040A Integrated (1) Product Identification Code Pins Codes A0 O7 O6 O5 O4 O3 O2 O1 O0 Manufacturer Device Type Note: 3-122 0 1 0 0 0 0 0 0 1 0 1 1 1 0 1 1 Hex Data 0 1 1. The AT27LV040A has the same Product Identification Code as the AT27C040. Both are programming compatible. AT27LV040A 1E 0B AT27LV040A Ordering Information tACC (ns) 120 150 ICC (mA) VCC = 3.6V Ordering Code Package 0.02 AT27LV040A-12JC AT27LV040A-12TC 32J 32T Commercial (0°C to 70°C) 8 0.02 AT27LV040A-12JI AT27LV040A-12TI 32J 32T Industrial (-40°C to 85°C) 8 0.02 AT27LV040A-15JC AT27LV040A-15TC 32J 32T Commercial (0°C to 70°C) 8 0.02 AT27LV040A-15JI AT27LV040A-15TI 32J 32T Industrial (-40°C to 85°C) Active Standby 8 Operation Range = Preliminary Information Package Type 32J 32 Lead, Plastic J-Leaded Chip Carrier (PLCC) 32T 32 Lead, Plastic Thin Small Outline Package (TSOP) 3-123