5
4
3
2
1
Table of Contents
1
2
3
4
5
Revisions
Title
Block Diagram
K20D MCU
OpenSDA INTERFACE
I/O Headers and Power Supply
Rev
Description
Date
X1
Initial Draft
08/20/12
L. PUEBLA
A
Prototype Release
08/28/12
L. PUEBLA
B
Production Release
11/21/12
L. PUEBLA
C
Respin Release
01/21/13
L. PUEBLA
C1
D9 pop fix
01/29/13
L. PUEBLA
Approved
D
D
C
C
FRDM-K20D50M
B
B
A
A
Automotive, Industrial & MultiMarket Solutions Group
6501 William Cannon Drive West Austin, TX 78735-8598
ICAP Classification:
Designer:
RAFAEL DEL REY
5
4
3
2
FCP: ____
FIUO: ____
PUBI: X
Drawing Title:
FRDM-K20D50M
Drawn by:
RAFAEL DEL REY
Page Title:
Approved:
LUIS PUEBLA
Size
C
Document Number
Date:
Tuesday, March 26, 2013
TITLE PAGE
Rev
C1
SCH-27720 | PDF: SPF-27720
Sheet
1
1
of
5
5
4
3
2
1
1. Unless Otherwise Specified:
All resistors are in ohms, 5%, 1/8 Watt
All capacitors are in uF, 20%, 50V
All voltages are DC
All polarized capacitors are aluminum electrolytic
2. Interrupted lines coded with the same letter or letter
combinations are electrically connected.
D
D
3. Device type number is for reference only. The number
varies with the manufacturer.
4. Special signal usage:
_B Denotes - Active-Low Signal
<> or [] Denotes - Vectored Signals
5. Interpret diagram in accordance with American
National Standards Institute specifications, current
revision, with the exception of logic block symbology.
C
C
B
B
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
FRDM-K20D50M
Page Title:
BLOCK DIAGRAM
5
4
3
2
Size
C
Document Number
Date:
Tuesday, March 26, 2013
Rev
C1
SCH-27720 | PDF: SPF-27720
Sheet
1
2
of
5
5
4
L1
P3V3_K20D50M
1.0UF
C5
USB_CONN_DN
USB_CONN_DP
C11
C10
0.1UF 0.1UF 0.1UF
GND
R80
J21
DNP HDR 1X2 TH
GND
SHORTING HEADER
ON BOTTOM LAYER
A
GND
pg(5)
D9
3.0V
DNP
ZENNER 3.0V
2
AREF
0 DNP
1
2
L2
D
R3
VREFH
1K
DNP
TC_USB_ID_TP
GND
POPULATE THESE
PARTS FOR
USB HOST FUNCTIONALITY
R82
0
DNP
P3V3_K20D50M
CAD NOTE:
Please place these capacitors
near their respective CPU pin
(VREFH to VREFL
and VDDA to VSSA)
C9
0.1UF
ELECTRICAL PROTECTION
IS NOT PROVIDED.
USE IT AT YOUR OWN RISKGND
C8
0.1UF
HDR 1X2 TH
J15
P3V3
1
2
3
GND
0
R77
OPTIONAL USB HOST FUNCTIONALITY
P5V_SDA
P5V_K20D50M
15
14
GND
VREFL
VREFH
3
48
13
VDDA
VDD3
VDD2
VDD1
30
VBAT
K20D50M USB CONNECTOR
GND
21
2
G
C13
P3V3_K20D50M
U2
GSOT05C-GS08
330 OHM
C14
TP2
5
1
C6
1.0UF 1.0UF 1.0UF
U9
VBAT
TC_USB_ID_TP
R2
R1
C
D+
ID
4
GND
33 USB_DN
33 USB_DP
1
D-
2
S2
S4
SHIELD_K20USB
D
C3
330 OHM
P5V0_USB_CONN_VBUS
3
1
K20D50M Decoupling Caps
2
16
5V
1
P5V_K20D50M
1
2
VSSA
S1
S3
J5
CONN USB MINI-B
3
TP30
pg(5)
pg(5)
1
2
D1
D0
PTE0/UART1_TX/RTC_CLKOUT
PTE1/UART1_RX
VREF_OUT/CMP1_IN5/CMP0_IN5
pg(5)
pg(5)
pg(5)
pg(5)
ADC0_DP0
ADC0_DM0
ADC0_DP3
ADC0_DM3
pg(5)
CMP1_IN3
9
10
11
12
ADC0_DP0
ADC0_DM0
ADC0_DP3
ADC0_DM3
JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH5
JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6
JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7
JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0
NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1
PTA5/USB_CLKIN/FTM0_CH2/I2S0_TX_BCLK/JTAG_TRST
C
18
EXTAL/PTA18/FTM0_FLT2/FTM_CLKIN0
XTAL/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1
P5V_K20D50M
USB_VOUT33
USB_DN
USB_DP
C7
2.2UF
8
7
6
5
20
19
XTAL_32KHZ
1
32.768KHZ
Y3
GND
34
ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA
ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB
ADC0_SE12/TSI0_CH7/PTB2/I2C0_SCL/UART0_RTS/FTM0_FLT3
ADC0_SE13/TSI0_CH8/PTB3/I2C0_SDA/UART0_CTS/UART0_COL/FTM0_FLT0
TSI0_CH9/PTB16/UART0_RX/EWM_IN
TSI0_CH10/PTB17/UART0_TX/EWM_OUT
TSI0_CH11/PTB18/I2S0_TX_BCLK
TSI0_CH12/PTB19/I2S0_TX_FS
EXTAL32
XTAL32
ADC0_SE14/TSI0_CH13/PTC0/SPI0_PCS4/PDB0_EXTRG/I2S0_TXD1
ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0
ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS
CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK
PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT
PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT
CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK
CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS
CMP0_IN2/PTC8/I2S0_MCLK
CMP0_IN3/PTC9/I2S0_RX_BCLK
CMP0_IN4/PTC10/I2S0_RX_FS
PTC11/I2S0_RXD1
1
2
RST_K20D50M
HDR 1X2 TH
C
32
33
D8 pg(5)
PTA13 pg(5)
EXTAL_8MHZ
XTAL_8MHZ
DNP
R25
35
36
37
38
39
40
41
42
I2C0_SCL
pg(5)
I2C0_SDA
pg(5)
C16
22PF
DNP
A5 pg(4,5)
A4 pg(5)
D15 pg(5)
D14 pg(5)
UART_RX_K20D50M
UART_TX_K20D50M
1.0M
Y1
4
1
3
2
GND2
TSI
CAPACITIVE/TOUCH
INTERFACE
C19
22PF
DNP
GND1
8MHZ
GND
GND
R5
R6
1K
1K
GND
UART1_RX_TGTMCU
UART1_TX_TGTMCU
E1
GND
pg(4)
pg(4)
43
44
45
46
49
50
51
52
53
54
55
56
A0 pg(5)
A1 pg(5)
D10 pg(5)
D6 pg(3,5)
D7 pg(5)
PTC5 pg(5)
PTC6 pg(5)
TSI0_CH9
TSI0_CH10
PTC7 pg(5)
D4 pg(5)
PTC9 pg(5)
PTC10 pg(5)
Slider_4
HDR 1X2 TH
J17
INT1_ACCEL
pg(5)
INT2_ACCEL
pg(5)
DNP
PTC11
pg(5)
B
RST_TGTMCU
1
2
pg(3,4,5)
28
29
GND
R72
10K
DNP
B
pg(3,4)
RESET
P3V3_K20D50M
J14
D5 pg(5)
D9 pg(3,5)
SWD_DIO_TGTMCU
PTA4 pg(5)
D2 pg(5)
R76
0
R75
0
2
C28
22PF
DNP
pg(5)
1
2
C29
22PF
DNP
CMP1_IN5
K20D50M_SWD_CLK
VREGIN
VOUT33
USB0_DM
USB0_DP
GND
EXTAL_32KHZ
22
23
24
25
26
27
CMP1_IN3/ADC0_SE23
PTA12/FTM1_CH0/I2S0_TXD0/FTM1_QD_PHA
PTA13/FTM1_CH1/I2S0_TX_FS/FTM1_QD_PHB
TP3
17
J16
PTD0 pg(5)
D13 pg(5)
D11 pg(5)
D12 pg(5)
D3 pg(3,5)
A3 pg(5)
A2 pg(5)
PTD7 pg(5)
HDR 1X2 TH
DNP
VSS3
VSS2
57
58
59
60
61
62
63
64
31
4
PK20DX128VLH5
47
VSS1
PTD0/SPI0_PCS0/UART2_RTS
ADC0_SE5B/PTD1/SPI0_SCK/UART2_CTS
PTD2/SPI0_SOUT/UART2_RX
PTD3/SPI0_SIN/UART2_TX
PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN
ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT
ADC0_SE7b/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0
PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1
GND
A
SHORTING HEADER ON BOTTOM LAYER
SWD CONNECTOR
RGB LED FEATURE
TP14
D3
pg(3,5)
D6
R8 330
LEDRGB_RED
P3V3
1
R
4
LEDRGB_GREEN
R7
330
D3
pg(3,5)
3
LEDRGB_BLUE
R11 330
D9
pg(3,5)
pg(3,4)
B
1
3
5
7
9
CLV1A-FKB-CJ1M1F1BB7R4S3
GND
4
DNP J11
J6
P3V3_K20D50M
TP17
5
SWD_DIO_TGTMCU
G
2
A
Jumper is shorted by a cut-trace
on bottom layer. Cutting the trace
will effectively isolate the on-board
MCU from the OpenSDA
debug interface.
TP13
2
4
6
8
10
1
2
K20D50M_SWD_CLK
ICAP Classification:
Drawing Title:
HDR 1X2 TH
SWD_CLK_TGTMCU
FCP: ___
FIUO: ___
PUBI: X
FRDM-K20D50M
pg(4)
Page Title:
RST_TGTMCU
K20D MCU
pg(3,4,5)
HDR 2X5
DNP
3
2
Size
C
Document Number
Date:
Tuesday, March 26, 2013
Rev
C1
SCH-27720 | PDF: SPF-27720
Sheet
1
3
of
5
5
4
3
D
2
1
D
U6
P3V3_SDA
1
VDD1
C17
1.0UF
7
GND
8
VDDA
VSSA
JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH5
JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6
JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7
JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0
NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1/LLWU_P3
GND
P5V_SDA
L4
1
11
TC_VBAT_TP
C15
1.0UF
330 OHM
SDA_USB_CONN_DP
4
TC_SDA_USB_ID_TP
R14
R13
U8
GSOT05C-GS08
SDA_USB_DN
SDA_USB_DP
C21
2.2UF
6
5
4
3
10
9
GND
TP5
TP4
3
GND
SDA_SWD_EN
17
18
SDA_EXTAL
SDA_XTAL
Y2
4
1
TARGET MCU
INTERFACE
SIGNALS
3
2
GND2
GND1
C23
22PF
DNP
ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/LLWU_P5
ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB
20
21
8MHZ
GND
C25
22PF
DNP
GND
GND
GND
RST_TGTMCU
EXTAL32
XTAL32
pg(3,4,5)
P3V3_SDA
R15
C
SDA_SWD_OE_B
10K
19
2
GND
UART1_TX_TGTMCU
RESET
pg(3)
UART1_RX_TGTMCU
GND
pg(3)
P3V3_SDA
P5V_SDA
2
R17
4.7K
VSS1
GND
SDA_RST
R21
10K
ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0/LLWU_P6
ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS
CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/I2S0_TX_BCLK/LLWU_P7
PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT/LLWU_P8
PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT/LLWU_P9
CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK/LLWU_P10
CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS
22
23
24
25
26
27
28
SDA_SPI0_RST_B
SDA_SPI0_CS
UART1_TX_TGTMCU
UART1_RX_TGTMCU
SDA_SPI0_SCK
SDA_SPI0_SOUT
SDA_SPI0_SIN
TP22
TP18
VCC
2
3
SDA_SPI0_SOUT
SDA_RST
U4A
1
14
330 OHM
EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0
XTAL0/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1
VREGIN
VOUT33
USB0_DM
USB0_DP
TC_EXTAL_TP
TC_XTAL_TP
L3
1
R23
10K
VBAT
TP24
5
G
33
33
1
3
SDA_USB_VOUT33
2
5V
DD+
ID
SDA_USB_CONN_DN
S2
S4
SDA_USBSHIELD
C
P5V0_SDA_USB_CONN_VBUS
2
P3V3_SDA
P5V_SDA
GND
1
SDA_JTAG_TCLK
SDA_JTAG_TDI
SDA_JTAG_TDO
SDA_JTAG_TMS
SDA_SWD_EN
SWD_DIO_TGTMCU
pg(3)
GND
P3V3_SDA
TP16
7
S1
S3
J7
CONN USB MINI-B
TP25
2
12
13
14
15
16
74LVC125ADB
TP27
R12
220
GND
PU/PD LOGIC:
SERIAL INTERFACE
IS ALWAYS RESET
WHEN USB PORT
IS DISCONNECTED
LED GREEN
U4C
GND
SDA_LED_R
8
SDA_SPI0_SIN
TP10
74LVC125ADB
SDA_LED
C
SDA_PTD5
pg(5)
U4D
13
29
30
31
32
9
D4
TP20
PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN/LLWU_P14
ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT
ADC0_SE7B/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0/LLWU_P15
PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1
10
EPAD
A
33
GND
12
11
SWD_CLK_TGTMCU
pg(3)
SDA_SPI0_SCK TP12
B
R24
B
74LVC125ADB
SDA_PTD6
A5
0
pg(3,5)
K20D50M Pin
ADC0_SE8/TSI0_CH0/PTB0/LLWU_P5/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/
PK20DX128VFM5
P5V_SDA
OpenSDA INTERFACE
R10
4.7K
SDA_USB_P5V_SENSE
TP19
R9
10K
GND
SPARE 74HC125 buffer
OpenSDA INTERFACE JTAG CONNECTOR
TARGET RESET AND BOOTLOADER
PUSH BUTTON
P3V3_SDA
P3V3_SDA
P3V3
R19
10K
4
A
R4
10K
U4B
TP11
TP15
TC_74125_SPARE_I_TP 5
6
pg(3,4,5)
TC_74125_SPARE_O_TP
1
RST_TGTMCU
C12
1.0UF
74LVC125ADB
J8
P3V3_SDA
1
3
5
7
9
SW1
2
EVQ-PE105K
GND
GND
GND
2
4
6
8
10
A
SDA_JTAG_TMS
SDA_JTAG_TCLK
SDA_JTAG_TDO
SDA_JTAG_TDI
SDA_RST
ICAP Classification:
Drawing Title:
HDR 2X5
DNP
FCP: ___
FIUO: ___
PUBI: X
FRDM-K20D50M
Page Title:
OpenSDA interface
5
4
3
2
Size
C
Document Number
Date:
Tuesday, March 26, 2013
Rev
C1
SCH-27720 | PDF: SPF-27720
Sheet
1
4
of
5
5
4
3
2
OPTIONAL
COIN CELL
HOLDER BT1
3
TP8
2
1
D7
MBR120VLSFT1G
A
C
P3V3_BATT
D
P5V_SDA
3003
DNP
P3V3
DNP
J4
HDR 1X2 TH
GND
P3V3_K20D50M
D
P5V_K20D50M
A
1
2
P5-9V_VIN
C1
10uF
+
GND
1
R73
D8
MBR120VLSFT1G
TP7
C4
10uF
NCP1117ST33T3G
VIN
VOUT
TAB
2
P3V3_VREG
0
R81
10
4
C2
10uF
J3
HDR 1X2 TH
J20
DNP
GND
GND
GND
20mOhm Resistor
in layout
HDR 1X2 TH
SHORTING HEADER
ON BOTTOM LAYER
P3V3_SDA
1
2
3
D1
MBR120VLSFT1G
A
C
1
2
C
C
P5-9V_VIN_VR
GND
U1
C
D2
MBR120VLSFT1G
1
D10
MBR120VLSFT1G
A
A
DNP
DNP
R74
0
I2C INERTIAL SENSOR
P3V3
C18
10uF
GND
1
P3V3
R20
10K
pg(3)
pg(3)
4
6
I2C0_SCL
I2C0_SDA
TP26
MMA8451_SERIAL_ADDR0
VDDIO
U7
C
SCL
SDA
7
SA0
INT1
INT2
TP23
MMA8451_BYP 2
BYP
GND1
GND2
GND3
C22
0.1UF
MMA8451Q
GND
INT1_ACCEL
INT2_ACCEL
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
3
8
13
15
16
pg(3)
pg(3)
pg(3)
D8
D9
D10
D11
D12
D13
{PTE1}
{PTE0}
{PTA5}
{PTD4}
{PTC8}
{PTA1}
{PTC3}
{PTC4}
C
DEBUG GROUND HOOK
{PTA12}
{PTA2}
{PTC2}
{PTD2}
{PTD3}
{PTD1}
TP6 DNP
GND
{VREFH}
{PTB3}
{PTB2}
AREF
D14
D15
5
10
12
GND
NC3
NC8
NC13
NC15
NC16
11
9
D0
D1
D2
D3
D4
D5
D6
D7
20
18
16
14
12
10
8
6
4
2
R22
10K
DNP
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
GND
14
R18
4.7K
VDD
R16
4.7K
GND
16
14
12
10
8
6
4
2
C20
0.1UF
J2
CON 2X10
DNP
19
17
15
13
11
9
7
5
3
1
GND
J19
CON 2X8
DNP
TP1
IN CIRCUIT TEST
GND PROBING
TP9
15
13
11
9
7
5
3
1
P3V3
P3V3
TP28
GND
VISIBLE LIGHT SENSOR
SHORTING HEADER
ON BOTTOM LAYER
J12
HDR 1X2 TH
P3V3
{PTC10}
{PTA13}
pg(3) PTC10
pg(3) PTA13
R26
ADC0_DM0
2
1
SNS_LIGHT_ADC
Q1
ALS-PT19-315C/L177/TR8
2
B
{PTC9}
{PTD7}
{PTA4}
{PTC7}
{PTC6}
{PTC5}
{PTC11}
{PTD0}
pg(3) PTC9
pg(3) PTD7
pg(3) PTA4
pg(3) PTC7
pg(3) PTC6
pg(3) PTC5
pg(3) PTC11
pg(3) PTD0
pg(3,5)
DNP
1
10K
pg(3,5)
pg(3)
pg(3,5)
pg(3)
pg(3)
pg(3)
GND
B
ADC0_DM0
ADC0_DP0
ADC0_DM3
ADC0_DP3
CMP1_IN3
CMP1_IN5
TEMPERATURE SENSOR
P5V_SDA
P5V_K20D50M
P3V3
D5
MBR120VLSFT1G
CON 2X6
DNP
2
4
6
8
10
12
14
16
D6
BD1020HFV-TR
GND
J9
CON 2X8
DNP
A
DNP
MBR120VLSFT1G
pg(3,4)
J10
1
3
5
7
9
11
1
3
5
7
9
11
13
15
pg(3,5)
2
4
6
8
10
12
VOUT
ADC0_DM3
A
NC
SNS_TMP_ADC
C
PG
5
1
3
GND
2
C
4
VDD
TP29
SNS_TEMPERATURE
U11
2
1
SHORTING HEADER
ON BOTTOM LAYER
J13
HDR 1X2 TH
P3V3
C24
2.2UF
RST_TGTMCU
P3V3
GND
P5V_USB
P5-9V_VIN
GND
pg(4)
A
pg(3)
pg(3)
pg(3)
pg(3)
pg(3)
pg(3,4)
A0
A1
A2
A3
A4
A5
SDA_PTD5
A
{PTC0}
{PTC1}
{PTD6}
{PTD5}
{PTB1}
{PTB0}
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
FRDM-K20D50M
Page Title:
ARDUINO SHIELDS & PWR SUPPLY
5
4
3
2
Size
C
Document Number
Date:
Tuesday, March 26, 2013
Rev
C1
SCH-27720 | PDF: SPF-27720
Sheet
1
5
of
5