Cypress Product Roadmap Q1 2015 Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL Roadmap Slide Index 1. Platform PSoC® Programmable System-on-Chip Solutions 2. TrueTouch® Touchscreen Controllers 3. CapSense® Controllers 4. USB Controllers 5. Wireless/RF 6. Asynchronous SRAM 7. Synchronous SRAM 8. Nonvolatile RAM 9. Timing Solutions 10. Specialty Memory 11. Trackpad Module 12. Aerospace Memory 13. Automotive Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 12 Platform PSoC® Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 3 PSoC® 1 Portfolio M8C Core | 24 MHz PSoC MCU Programmable Digital Intelligent Analog Performance Analog CY8C29xxx 32K/2K1, 64 GPIOs2 CapSense, 16x Prog. Digital Blocks3 4x CMP4, 1x14-bit ΔƩ ADC5, 12x SC/CT PAB6 CY8C27xxx 32K/2K1, 44 GPIOs2 CapSense, 8x Prog. Digital Blocks3 4x CMP4, 1x14-bit ΔƩ ADC5, 12x SC/CT PAB6 CY8C24x94 16K/1K1, 56 GPIOs2 CapSense, 4x Prog. Digital Blocks3 2x CMP4, 2x14-bit SAR ADC5, 6x SC/CT PAB6 CY8C28xxx 16K/1K1, 44 GPIOs2 CapSense, 12x Prog. Digital Blocks3 4x CMP4, 4x14-bit ΔƩ ADC5, 16x SC/CT PAB6 Performance CY8C2xx45 16K/1K1, 38 GPIOs2 CapSense, 8x Prog. Digital Blocks3 4x CMP4, 1x10-bit SAR ADC5, 6x SC/CT PAB6 CY8C21x34 8K/0.5K1 , 28 GPIOs2 CapSense, 4x Prog. Digital Blocks3 2x CMP4, 1x10-bit ADC5, 4x SC/CT PAB6 CY8C24x23 4K/0.25K1, 24 GPIOs2 CapSense, 4x Prog. Digital Blocks3 2x CMP4, 1x14-bit ΔƩ ADC5, 6x SC/CT PAB6 CY8C23x33 8K/0.25K1, 26 GPIOs2 CapSense, 4x Prog. Digital Blocks3 1x CMP4, 1x 8-bit SAR ADC5, 4x SC/CT PAB6 CY8C21x23 4K/0.25K1, 16 GPIOs2 4x Prog. Digital Blocks3 2x CMP4, 1x10-bit ADC5, 4x SC/CT PAB6 CY8C24x93 32K/2K1, 36 GPIOs2 2x CMP4, 1x10-bit ADC5 Integration 1 4 2 General-purpose 5 Analog-to-digital Flash KB/SRAM KB input output pins 3 Programmable digital block Document No. 001-89435 Rev. *G Comparator converter (incremental, successive approximation (SAR) or Delta-Sigma (ΔƩ)) Status 6 Switched capacitor/continuous time programmable analog block Availability CYPRESS CONFIDENTIAL Production Sampling Development Concept QQYY QQYY 4 PSoC® 3 Portfolio 8051 | CapSense® | DMA | LCD | RTC | 4x Timer/Counter/PWM Programmable Digital PSoC 3200 Intelligent Analog PSoC 3400 Performance Analog PSoC 3600 Precision Analog PSoC 3800 Analog: ΔƩ ADC1, 1x DAC2, 2x CMP3, 0.9% Vref Analog: ΔƩ ADC1, 2x DAC2, 4x CMP3, 2x Opamps, 2x SC/CT PAB5, 0.9% Vref Interfaces: FF4 I2C Interfaces: FF4 I2C Analog: ΔƩ ADC1, 2x/4x DAC2, 0x/2x/4x CMP3, 0x/2x/4x Opamps, 0x/2x/4x SC/CT PAB5, 0.1% Vref Interfaces: USB, FF4 I2C Analog: ΔƩ ADC1, 2x/4x DAC2, 0x/2x/4x CMP3, 0x/2x/4x Opamps, 0x/2x/4x SC/CT PAB5, 0.1% Vref Interfaces: USB, FF4 I2C CY8C3666 67 MHz, 64K/8K/2K6 0x/1x DFB5, 12b ADC1 20x/24x UDB6, CAN9 Performance NEW NEW NEW CY8C3246 50 MHz, 64K/8K/2K6 12b ADC1 24x UDB8, USB, 72-CSP10 CY8C3446 50 MHz, 64K/8K/2K6 12b ADC1 24x UDB8, USB, CAN9 CY8C3245 50 MHz, 32K/4K/1K6 12b ADC1 20x UDB8, USB, 72-CSP10 CY8C3445 50 MHz, 32K/4K/1K10 12b ADC1 20x UDB8, USB CY8C3244 50 MHz, 16K/2K/0.5K6 12b ADC1 16x UDB8 CY8C3444 50 MHz, 16K/2K/0.5K6 12b ADC1 16x UDB8 CY8C3665 67 MHz, 32K/4-8K/1K6 0x/1x DFB7, 12b ADC1 16x/20x UDB8, 72-CSP10 NEW CY8C3866 67 MHz, 64K/8K/2K6 DFB7, 20b ADC1 20x/24x UDB8, CAN9, 72-CSP10 CY8C3865 67 MHz, 32K/4-8K/1K6 0x/1x DFB7, 20b ADC1 16x/20x UDB8 Integration 1 Delta-Sigma analog-to-digital converter 2 Digital-to-analog converter 3 Comparator Document No. 001-89435 Rev. *G 4 Fixed function 5 Switched capacitor/continuous time programmable analog block 6 Flash KB/SRAM KB/EEPROM KB 5 Digital filter block 6 Universal digital block CYPRESS CONFIDENTIAL 9 Production Sampling Development Concept Controller area network Status Chip scale package 10 QQYY QQYY Availability 10 5 PSoC® 4 Portfolio ARM® Cortex™-M0 | CapSense® PSoC MCU PSoC 4000 Intelligent Analog PSoC 4100 BL = BLE-Series M = M-Series Q215 CY8C4127-M Q215 24 MHz, 128K/16K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, CAN9 Performance NEW CY8C4014 16 MHz, 16K/2K1, CMP2, I2C, IDAC5, TCPWM6 Q215 NEW CY8C4127-BL 24 MHz, 128K/16K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, BLE7 L = L-Series NEW CY8C4248-L Q315 48 MHz, 256K/32K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, UDB8, CAN9, USB CY8C4128-BL 24 MHz, 256K/32K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, BLE7 NEW Programmable Analog PSoC 4400 Programmable Digital PSoC 4200 NEW CY8C4247-M Q215 48 MHz, 128K/16K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, UDB8, CAN9 NEW Q215 CY8C4126-M 24 MHz, 64K/8K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6 CY8C4246-M 48 MHz, 64K/8K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, UDB8 CY8C4125 24 MHz, 32K/4K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6 CY8C4245 48 MHz, 32K/4K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, UDB8 CY8C4124 24 MHz, 16K/4K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6 CY8C4244 48 MHz, 16K/4K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, UDB8 NEW CY8C4247-L Q315 48 MHz, 128K/16K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, UDB8, CAN9, USB NEW CY8C4248-BL Q215 48 MHz, 256K/32K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, BLE7, UDB8 NEW CY8C4247-BL 48 MHz, 128K/16K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, BLE7, UDB8 Q315 CY8C4246-L 48 MHz, 64K/8K1, CMP2, Opamp, ADC3, SCB4, IDAC5, TCPWM6, UDB8, CAN9, USB CY8C44x6 48 MHz, 64K/16K1 Concept Only Contact Sales CY8C44x5 48 MHz, 32K/8K1 Concept Only Contact Sales CY8C4013 16 MHz, 8K/2K1, CMP2, I2C, IDAC5, TCPWM6 Integration 1 Flash KB/SRAM KB 2 Comparator 3 Analog-to-digital converter 4 Serial communication block programmable as I2C/SPI/UART 5 Current-output digital-to-analog converter 6 Timer, counter, PWM block Document No. 001-89435 Rev. *G Production Sampling Development Concept 7 Bluetooth Low Energy Digital Block 9 Controller Area Network 8 Universal CYPRESS CONFIDENTIAL Status Availability QQYY QQYY 6 PSoC® 4000 PSoC MCU Family Applications Block Diagram MCU and discrete analog replacement User interface for button replacement User interface for heating, ventilation, air conditioning PSoC 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks I/O Subsystem GPIO x8 CORTEX-M0 32-bit MCU subsystem 16-MHz ARM® Cortex™-M0 CPU Up to 16KB flash and 2KB SRAM Programmable analog Two IDACs1 (7-bit and 8-bit), digitally controlled current source One comparator (CMP) CapSense® with SmartSense™ Auto-tuning One Cypress Capacitive Sigma-Delta™ (CSD) controller Capacitive sensing supported on up to 16 pins Programmable digital One configurable 16-bit timer, counter or pulse-width modulator (TCPWM) block One I2C master or slave Packages 8-pin SOIC, 16-pin SOIC, 16-QFN, 24-pin QFN 1 16 MHz Flash (8KB to 16KB) SRAM (2KB) CMP CSD Programmable Digital Blocks TCPWM I2C Programmable Interconnect and Routing Features Advanced High-Performance Bus (AHB) IDAC1 x2 GPIO x8 GPIO x8 Serial Wire Debug GPIO x4 Collateral Availability Datasheet: PSoC 4000 Technical Reference Manual: PSoC 4000 Sampling: Production: Now Now Current-output digital-to-analog converter Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 7 PSoC® 4100 Intelligent Analog Family Applications Block Diagram User interface for home appliances Digital and analog sensor hub MCU and discrete analog replacement PSoC 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 32-bit MCU Subsystem 24-MHz ARM® Cortex™-M0 CPU Up to 32KB flash and 4KB SRAM Opamp x2 SAR1 ADC CMP x2 CSD 8-bit IDAC2 7-bit IDAC2 I/O Subsystem GPIO x8 CapSense® with SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller CapSense supported on up to 36 pins Flash (16KB to 32KB) Programmable Analog Blocks Two comparators (CMPs) Two opamps, programmed as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR1 ADC Two IDACs2 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Four programmable 16-bit TCPWM3 blocks Two SCBs4: I2C master or slave, SPI master or slave, or UART Packages: 28-pin SSOP, 40-pin QFN, 44-pin TQFP, 48-pin LQFP SRAM (4KB) Programmable Digital Blocks TCPWM3 x4 Programmable Interconnect and Routing 24 MHz Advanced High-Performance Bus (AHB) CORTEX-M0 GPIO x8 GPIO x8 GPIO x8 SCB4 x2 Serial Wire Debug GPIO x4 Segment LCD Drive Collateral Datasheet: PSoC 4 (CY8C4100) Technical Reference Manual: PSoC 4 1 Successive approximation register digital-to-analog converter 2 Current-output Document No. 001-89435 Rev. *G 3 4 Availability Sampling: Production: Now Now Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 8 PSoC® 4200 Programmable Digital Family Applications Block Diagram User interface for home appliances Digital and analog sensor hub MCU and discrete analog replacement PSoC 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 32-bit MCU Subsystem 48-MHz ARM® Cortex™-M0 CPU Up to 32KB flash and 4KB SRAM Opamp x2 SAR1 ADC CMP x2 CSD 8-bit IDAC2 7-bit IDAC2 I/O Subsystem GPIO x8 CapSense® with SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller CapSense supported on up to 36 pins Flash (16KB to 32KB) Programmable Analog Blocks Two comparators (CMPs) Two opamps, programmed as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR1 ADC Two IDACs2 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Four Universal Digital Blocks (UDBs): custom digital peripherals Four programmable 16-bit TCPWM3 blocks Two SCBs4: I2C master or slave, SPI master or slave, or UART SRAM (4KB) Programmable Digital Blocks UDB x4 TCPWM3 x4 Programmable Interconnect and Routing 48 MHz Advanced High-Performance Bus (AHB) CORTEX-M0 GPIO x8 GPIO x8 GPIO x8 SCB4 x2 Serial Wire Debug Packages: 28-pin SSOP, 40-pin QFN, 44-pin TQFP, 48-pin LQFP GPIO x4 Segment LCD Drive Collateral Datasheet: PSoC 4 (CY8C4200) Technical Reference Manual: PSoC 4 1 Successive approximation register digital-to-analog converter 2 Current-output Document No. 001-89435 Rev. *G 3 4 Availability Sampling: Production: Now Now Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 9 PSoC® 4100 BLE-Series Intelligent Analog Family with Bluetooth Low Energy Block Diagram Sports and fitness monitors, wearable electronics, medical devices, home automation solutions, game controllers, sensor-based low-power systems for the Internet of Things (IoT) PSoC 4 BLE One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 24 MHz BLE System Flash (128KB to 256KB) SRAM (16KB to 32KB) Serial Wire Debug Availability Datasheet: PSoC 4 BLE (CY8C4XX7 BLE) Sampling: Production: front end(s) approximation register 2 Successive Document No. 001-89435 Rev. *G 3 4 CMP x2 GPIO x8 SAR2 ADC CSD Programmable Digital Blocks TCPWM3 x4 SCB4 x2 GPIO x8 GPIO x8 GPIO x8 Segment LCD Drive GPIO x4 Collateral 1 Analog Advanced High-Performance Bus (AHB) 32-bit MCU subsystem 24-MHz ARM® Cortex™-M0 CPU Up to 256KB flash and 32KB SRAM Programmable AFE1 Four opamps, configurable as PGAs, comparators, filters, etc. One 12-bit, 1-Msps SAR2 ADC CapSense® with SmartSense™ Auto-tuning One Cypress Capacitive Sigma-Delta™ (CSD) controller with touchpad capability Programmable digital logic Four configurable TCPWM3 blocks: 16-bit timer, counter or PWM Two configurable serial communication blocks (SCBs4): I2C master or slave, SPI master or slave, or UART Packages 56-pin QFN, 68-pin CSP Bluetooth Smart connectivity with Bluetooth 4.1 2.4-GHz BLE radio with integrated Balun Opamp x4 CORTEX-M0 I/O Subsystem Programmable Interconnect and Routing Applications Now 128KB Now, 256KB Q2 2015 Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 10 PSoC® 4200 BLE-Series Programmable Digital Family with Bluetooth Low Energy Block Diagram Sports and fitness monitors, wearable electronics, medical devices, home automation solutions, game controllers, sensor-based low-power systems for the Internet of Things (IoT) PSoC 4 BLE One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 48 MHz BLE System Flash (128KB to 256KB) SRAM (16KB to 32KB) Sampling: Production: Document No. 001-89435 Rev. *G 3 4 CSD Programmable Digital Blocks UDB x4 TCPWM3 x4 SCB4 x2 GPIO x8 GPIO x8 GPIO x8 GPIO x4 Datasheet: PSoC 4 BLE (CY8C4XX7 BLE) front end(s) approximation register ADC Segment LCD Drive Availability 2 Successive CMP x2 GPIO x8 SAR2 Serial Wire Debug Collateral 1 Analog Advanced High-Performance Bus (AHB) 32-bit MCU subsystem 48-MHz ARM® Cortex™-M0 CPU Up to 256KB flash and 32KB SRAM Programmable AFE1 Four opamps, configurable as PGAs, comparators, filters, etc. One 12-bit, 1-Msps SAR2 ADC CapSense® with SmartSense™ Auto-tuning One Cypress Capacitive Sigma-Delta™ (CSD) controller with touchpad capability Programmable digital logic Four Universal Digital Blocks (UDBs): custom digital peripherals Four configurable TCPWM3 blocks: 16-bit timer, counter or PWM Two configurable serial communication blocks (SCBs4): I2C master or slave, SPI master or slave, or UART Packages 56-pin QFN, 68-pin CSP Bluetooth Smart connectivity with Bluetooth 4.1 2.4-GHz BLE radio with integrated Balun Opamp x4 CORTEX-M0 I/O Subsystem Programmable Interconnect and Routing Applications Now 128KB Now, 256KB Q2 2015 Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 11 PSoC® 4100 M-Series Intelligent Analog Family Applications Block Diagram User interface and host processor for home appliances Digital and analog sensor hub MCU and discrete analog replacement PSoC® 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks I/O Subsystem GPIO x8 Features 32-bit MCU Subsystem 24-MHz ARM® Cortex®-M0 CPU with a DMA controller and RTC1 Up to 128KB flash and 16KB SRAM Up to 55 GPIOs supporting analog, digital and CapSense interfaces CapSense® With SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller Programmable Analog Blocks Six comparators (CMP) Four opamps, programmable as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR2 ADC Four IDACs3 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Eight programmable 16-bit TCPWM4 blocks Four SCBs5: I2C master or slave, SPI master or slave, or UART Two Controller Area Network (CAN) Controllers Packages: 48-pin LQFP, 64-pin TQFP (0.8-mm pitch), 64-pin TQFP (0.5-mm pitch), 68-pin QFN 1 Real-time GPIO x8 Flash (64KB to 128KB) SRAM (8KB to 16KB) Serial Wire Debug CAN x2 CMP x6 CSD 8-bit IDAC3 x2 7-bit IDAC3 x2 Programmable Digital Blocks TCPWM4 x8 Programmable Interconnect and Routing 24 MHz Advanced High-Performance Bus (AHB) Cortex-M0 GPIO x8 GPIO x8 GPIO x8 SCB5 x4 GPIO x8 Segment LCD Drive GPIO x7 RTC1 DMA Availability Collateral Datasheet: SAR2 ADC Opamp x4 Sampling: Production: PSoC 4100M datasheet clock approximation register 2 Successive Document No. 001-89435 Rev. *G 3 4 Current-output digital-to-analog converter Timer, counter, PWM block 5 Now Q2 2015 Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 12 PSoC® 4200 M-Series Programmable Digital Family Applications Block Diagram User interface and host processor for home appliances Digital and analog sensor hub LED control and communication for lighting systems PSoC® 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks I/O Subsystem GPIO x8 Features 32-bit MCU Subsystem 48-MHz ARM® Cortex®-M0 CPU with a DMA controller and RTC1 Up to 128KB flash and 16KB SRAM Up to 55 GPIOs supporting analog, digital and CapSense interfaces CapSense® With SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller Programmable Analog Blocks Six comparators (CMPs) Four opamps, programmable as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR2 ADC Four IDACs3 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Four Universal Digital Blocks (UDBs): custom digital peripherals Eight programmable 16-bit TCPWM3 blocks Four SCBs4: I2C master or slave, SPI master or slave, or UART Two Controller Area Network (CAN) Controllers Packages: 48-pin LQFP, 64-pin TQFP (0.8-mm pitch), 64-pin TQFP (0.5-mm pitch), 68-pin QFN 1 Real-time GPIO x8 Flash (64KB to 128KB) SRAM (8KB to 16KB) Serial Wire Debug CAN x2 CMP x6 CSD 8-bit IDAC3 x2 7-bit IDAC3 x2 Programmable Digital Blocks UDB x4 TCPWM4 x8 Programmable Interconnect and Routing 48 MHz Advanced High-Performance Bus (AHB) Cortex-M0 GPIO x8 GPIO x8 GPIO x8 GPIO x8 RTC1 SCB5 DMA x4 Segment LCD Drive GPIO x7 Availability Collateral Datasheet: SAR2 ADC Opamp x4 Sampling: Production: PSoC 4200M datasheet clock approximation register 2 Successive Document No. 001-89435 Rev. *G 3 4 Current-output digital-to-analog converter Timer, counter, PWM block 5 Now Q2 2015 Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 13 PSoC® 4200 L-Series Programmable Digital Family Applications Block Diagram User interface and host processor for home appliances Digital and analog sensor hub MCU and discrete analog replacement LED control and communication for lighting systems PSoC® 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks Features clock approximation register 2 Successive Document No. 001-89435 Rev. *G CSD x2 8-bit IDAC3 x2 7-bit IDAC3 x2 GPIO x8 ADC SRAM (8KB to 32KB) Serial Wire Debug CAN x2 Full-Speed USB 2.0 Programmable Digital Blocks UDB x8 TCPWM4 x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 SCB5 RTC1 Programmable Interconnect and Routing Flash (64KB to 256KB) Advanced High-Performance Bus (AHB) 48 MHz GPIO x8 x4 GPIO x8 DMA Segment LCD Drive GPIO x4 Availability Collateral 1 Real-time CMP x6 GPIO x8 Cortex-M0 32-bit MCU Subsystem 48-MHz ARM® Cortex® -M0 CPU with a DMA controller and RTC1 Up to 256KB flash and 32KB SRAM Up to 98 GPIOs supporting analog and digital interfaces CapSense® With SmartSense™ Auto-tuning Two Cypress Capacitive Sigma-Delta™ (CSD) controllers Programmable Analog Blocks Two comparators (CMPs) Four opamps, configurable as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR2 ADC Four IDACs3 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Eight Universal Digital Blocks (UDBs): custom digital peripherals Eight configurable 16-bit TCPWM4 blocks Four SCBs5: I2C master or slave, SPI master or slave, or UART Full-Speed USB 2.0 Controller and Transceiver Two Controller Area Network (CAN) Controllers Packages: 48-pin TQFP, 64-pin TQFP, 68-pin QFN, 124-pin µBGA Preliminary Datasheet: Opamp x4 SAR2 I/O Subsystem Sampling: Production: Contact Sales 3 4 Current-output digital-to-analog converter Timer, counter, PWM block 5 Q3 2015 Q4 2015 Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 14 PSoC® 5LP Portfolio ARM® Cortex™-M3 | CapSense® | DMA | LCD | RTC | 4x Timer/Counter/PWM Programmable Digital PSoC 5200 Intelligent Analog PSoC 5400 Performance Analog PSoC 5600 Precision Analog PSoC 5800 Analog: 1x ADC1, 1x DAC2, 2x CMP3, 0.9% Vref Analog: 1x ADC1, 2x DAC2, 4x CMP3, 2x Opamps, 2x SC/CT PAB5, 0.9% Vref Interfaces: USB, FF4 I2C Interfaces: USB, FF4 I2C Analog: 2x ADC1, 4x DAC2, 4x CMP3, 4x Opamps, DFB6, 4x SC/CT PAB5, 0.9% Vref Interfaces: USB, FF4 I2C, CAN7 Analog: 2x/3x ADC1, 4x DAC2, 4x CMP3, 4x Opamps, DFB6, 4x SC/CT PAB5, 0.1% Vref Interfaces: USB, FF4 I2C, CAN7 Performance NEW CY8C5288 80 MHz, 256K/64K/2K8 12b SAR ADC1 24x UDB9, 99-CSP10 NEW CY8C5488 80 MHz, 256K/64K/2K8 12b SAR ADC1 24x UDB9, 99-CSP10 NEW NEW CY8C5688 80 MHz, 256K/64K/2K8 2x 12b SAR ADC1 24x UDB9, 99-CSP10 CY8C5888 80 MHz, 256K/64K/2K8 20b ΔƩ ADC11, 2x 12b SAR ADC1 24x UDB9, 99-CSP10 CY8C5268 67 MHz, 256K/64K/2K8 12b SAR ADC1 24x UDB9 CY8C5468 67 MHz, 256K/64K/2K8 12b SAR ADC1 24x UDB9 CY8C5668 67 MHz, 256K/64K/2K8 12b ΔƩ ADC11, 12b SAR/2x 12b SAR ADC1 24x UDB9 CY8C5868 67 MHz, 256K/64K/2K8 20b ΔƩ ADC10, 2x 12b SAR ADC1 24x UDB9 CY8C5267 67 MHz, 128K/32K/2K8 12b SAR ADC1 24x UDB9 CY8C5467 67 MHz, 128K/32K/2K8 12b SAR ADC1 24x UDB9 CY8C5667 67 MHz, 128K/32K/2K8 12b ΔƩ ADC11, 12b SAR/2x 12b SAR ADC1 24x UDB9 CY8C5867 67 MHz, 128K/32K/2K8 20b ΔƩ ADC11, 12b SAR ADC1 24x UDB9 CY8C5266 67 MHz, 64K/16K/2K9 12b SAR ADC1 20x UDB10 CY8C5466 67 MHz, 64K/16K/2K8 12b SAR ADC1 20x UDB9 CY8C5666 67 MHz, 64K/16K/2K8 12b ΔƩ ADC11, 12b SAR ADC1 20x UDB9 CY8C5866 67 MHz, 64K/16K/2K8 20b ΔƩ ADC11, 12b SAR ADC1 20x UDB9 CY8C5265 67 MHz, 32K/8K/2K8 12b SAR ADC1 20x UDB9 CY8C5465 67 MHz, 32K/8K/2K8 12b SAR ADC1 20x UDB9 Integration 1 Analog-to-digital converter 2 Digital-to-analog converter 3 Comparator 4 Fixed function 5 Switched capacitor/continuous time programmable analog block Document No. 001-89435 Rev. *G 6 Digital filter block 7 Controller area network 8 Flash KB/SRAM KB/EEPROM KB Production Sampling Development Concept 9 Universal digital block Chip scale package 11 Delta-Sigma ADC 10 CYPRESS CONFIDENTIAL Status Availability QQYY QQYY 15 PSoC Platform Packages Package Pins LQFP 48 PSoC 1 PDIP QFN 8 20 28 16 24 32 40 48 56 68 8 16 20 28 PSoC 3 PSoC 4 SOIC PSoC 5LP CapSense Package SSOP TQFP Pins 8 16 20 24 28 32 48 44 PSoC 1 68 CYPRESS CONFIDENTIAL 72 99 124 PSoC 5LP Document No. 001-89435 Rev. *G 30 PSoC 4 100 µBGA PSoC 3 CapSense 64 WLCSP 16 TrueTouch® Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 17 TrueTouch® Portfolio Mobile Phones (Full-feature/Low-cost) Wearables Mobile Phones (Advanced Features) 8″-12″ NEW CYTMA448 58 I/O, 8.3″, 10 F1, 110-Hz RR2 DualSense3, H2O4, 35-Vpp CA5 SLIM®6, AMS7, Glove NEW Q115 CYTT21XXX-48 48 I/O, 7″, 10 F1, 100-Hz RR2 DualSense3, H2O4, 15-Vpp CA5, SLIM6 AMS7, Glove, Face Detect 3″-8″ E-readers, Tablets, Digital Still Cameras, Printers, GPS, Industrial CYTMA525 25 I/O, 3.6″, 4 F1, 100-Hz RR2 DualSense3, H2O4, 60-Vpp CA5, SLIM6 AMS7, Passive Stylus, Glove, Hover NEW CYTMA525A 24 I/O, 3.0″, 4 F1, 120-Hz RR2 DualSense3, H2O4, 35-Vpp CA5 SLIM6, AMS7, Glove Q115 NEW Q115 CYTT21XXX-36 36 I/O, 5.2″, 10 F1, 120-Hz RR2 DualSense3, H2O4, 35-Vpp CA5 SLIM6, AMS7, Glove, Face Detect CYTMA568 58 I/O, 8.3″, 10 F1, 110-Hz RR2 DualSense3, H2O4, 60-Vpp CA5, SLIM6 AMS7, Passive Stylus, Glove, Hover NEW Q115 CYTT31XXX-48 48 I/O, 7″, 10 F1, 100-Hz RR2 DualSense3, H2O4, 15-Vpp CA5, SLIM6 AMS7, Passive Stylus, Glove CYTMA545 36 I/O, 5.2″, 10 F1, 100-Hz RR2 DualSense3, H2O4, 60-Vpp CA5, SLIM6 AMS7, Passive Stylus, Glove, Hover CY8CTST241/42 and CY8CTMG240 32 I/O, 3.6″, 1 or 2 F1 100-Hz RR2, Self-Capacitance3 Low-Cost Backgammon Sensor 1 Number of finger locations reported 2 Refresh rate 3 Self-Capacitance (capacitance of a row or column in a Touchscreen Sensor) + Mutual-Capacitance (capacitance of the intersection between a row or column of a Touchscreen Sensor) 4 Water rejection and wet-finger tracking 5 Charger Armor™: Cypress proprietary Charger Noise mitigation technology Document No. 001-89435 Rev. *G CYTMA568 58 I/O, 8.3″, 10 F1, 110-Hz RR2 DualSense3, H2O4, 60-Vpp CA5, SLIM6 AMS7, Passive Stylus, Glove, Hover CYTMA448 58 I/O, 8.3″, 10 F1, 110-Hz RR2 DualSense3, H2O4, 35-Vpp CA5, SLIM6 AMS7, Glove NEW Q115 CYTT31XXX-48 48 I/O, 7″, 10 F1, 100-Hz RR2 DualSense3, H2O4, 15-Vpp CA5, SLIM6 AMS7, Passive Stylus, Glove NEW CY8CTST241/42 and CY8CTMG240 32 I/O, 3.6″, 1 or 2 F1 100-Hz RR2, Self-Capacitance3 Low-Cost Backgammon Sensor Q215 CYTT41XXX-88 88 I/O, 12.7″, 10 F1, 120-Hz RR2 DualSense™3, H2O4,15-Vpp CA5 Active Stylus,1-mm Passive Stylus CYTT21XXX-36 36 I/O, 5.2″, 10 F1, 120-Hz RR2 DualSense3, H2O4, 35-Vpp CA5 SLIM6, AMS7, Glove Q115 CY8CTST241/42 and CY8CTMG240 32 I/O, 3.6″, 1 or 2 F1 100-Hz RR2, Self-Capacitance3 Low-Cost Backgammon Sensor Market Segments 6 Low-cost Single-Layer Independent Multi-Touch sensor 7 Automatic Mode Switching 8 A type of sensor stack-up in which the touch sensor is inside the LCD module under the color-filter glass CYPRESS CONFIDENTIAL Production Sampling Development Concept Status Availability QQYY QQYY 18 CY8CTST241/242 and CY8CTMG240 Lowest-cost Solution Applications Block Diagram Host Processor Mobile phones Digital cameras Wearables Printers INT2 CY8CTST241 CY8CTST242 CY8CTMG240 Features Low-Cost User Interface Low-cost “backgammon” sensor (U.S. Patent No. 8,121,283) Two-finger “zoom” gestures decoded on chip (TST242) Single-click, double-click and pan gestures decoded on chip Waterproofing: No false touches with water droplets Supports capacitive and virtual buttons Proprietary Analog Front End1 Low-noise self-capacitance sensing (Patented analog multiplexer: U.S. patent no. 8,067,948) System Solutions Lowest-cost capacitive touchscreen available Manufacturing test kits for production testing Tiny 2.2-mm x 2.32-mm WLCSP package Operates from single supply: 1.71-5.5 V Ultra-low power: 3.6 mW in active mode Flash SRAM 32 (Touch I/O: XY00-XY31) Touchscreen Sensor Datasheets and Design Guides: Contact Sales or [email protected] Full production 2 Interrupt 3 Inter-integrated 4 Serial Document No. 001-89435 Rev. *G CPU Programmable Analog Multiplexer Availability circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) I2C3 / SPI4 Analog Front End Collateral 1 Analog Clock/ 2 Data circuit peripheral interface CYPRESS CONFIDENTIAL 19 CYTT21XXX-36 Lowest-cost Multi-touch Solution (Up to 5.2ʺ Touchscreens) Applications Block Diagram Host Processor Mass Market mobile phones Digital cameras Mass Market tablets INT3 Clock/ Data 2 CYTT21XXX-36 Features I2C4 / SPI5 Advanced User Interface Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505 and 8,067,948) 10-finger tracking with 1-mm-thick gloves 2-finger tracking with 5-mm-thick gloves Face detection: Infrared proximity sensor replacement Automatic Mode Switching for advanced sensing modes Proprietary Analog Front End1 with Charger Armor™2 True 5-V TX-Boost™ with 24 multi-phase transmit lines (reduces noise by 5x compared to single-phase transmit line) 35-Vpp charger noise immunity (1-500 kHz, 9-mm finger) Display synchronization System Solutions Android and Windows Phone operating systems Wireless tuning with a TrueTouch Host Emulator mobile tuner Manufacturing test kits for production testing Flash ARM M0 CPU SRAM 5-V TX Pump Touch Sequencer RX Channels Programmable Analog Multiplexer 36 (Touch I/O: XY00-XY35) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Sampling: Production: 1 Analog circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) and mutual-capacitance (capacitance of the intersection between a row or column of a touchscreen sensor) 2 Cypress proprietary charger noise mitigation technology Document No. 001-89435 Rev. *G Q1 2015 Q2 2015 3 Interrupt 4 Inter-integrated 5 Serial circuit peripheral interface CYPRESS CONFIDENTIAL 20 CYTT21XXX-48 Full-feature Solution (Up to 7ʺ Touchscreens) Applications D+C Block Diagram Host Processor Mass Market mobile phones Mass Market tablets INT3 2 Clock/ Data CYTT21XXX-48 Features I2C4 / SPI5 Advanced User Interface Face Detection: Infrared Proximity Sensor replacement Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505; and 8,067,948) Automatic Mode Switching (AMS) for advanced sensing modes 10-finger tracking with 1-mm-thick gloves 2-finger tracking with 5-mm-thick gloves Proprietary Analog Front End1 with ChargerArmor™2 True 5-V TX-Boost™ with 8 multi-phase transmit lines (reduces noise by 3x compared to single-phase transmit line) 15-Vpp Charger Noise immunity (1-500 kHz, 9-mm finger) System Solutions Android and Windows Phone operating systems Wireless tuning with a TrueTouch Host Emulator mobile tuner Manufacturing test kits for production testing Flash ARM M0 CPU SRAM Channel Engine Touch Sequencer RX Channels 5-V TX Pump Programmable Analog Multiplexer 48 (Touch I/O: XY00-XY47) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Sampling: Production: 1 Analog circuit in the touchscreen controller used to measure Self-Capacitance (capacitance of a row or column in a Touchscreen Sensor) and Mutual-Capacitance (capacitance of the intersection between a row or column of a Touchscreen Sensor) 2 Cypress proprietary Charger Noise mitigation technology Document No. 001-89435 Rev. *G Q1 2015 Q2 2015 3 Interrupt 4 Inter-integrated 5 Serial circuit peripheral interface CYPRESS CONFIDENTIAL 21 CYTT31XXX-48 Advanced Features Solution (Up to 7ʺ Touchscreens) Applications D+C Block Diagram Host Processor Premium Market mobile phones E-readers INT3 2 Clock/ Data CYTT31XXX-48 Features I2C4 / SPI5 Advanced User Interface Passive Stylus support with palm rejection and AMS Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505; and 8,067,948) Automatic Mode Switching (AMS) for advanced sensing modes 10-finger tracking with 1-mm-thick gloves 2-finger tracking with 5-mm-thick gloves Proprietary Analog Front End1 with ChargerArmor™2 True 5-V TX-Boost™ with 8 multi-phase transmit lines (reduces noise by 3x compared to single-phase transmit line) 15-Vpp Charger Noise immunity (1-500 kHz, 9-mm finger) System Solutions Android and Windows Phone operating systems Wireless tuning with a TrueTouch Host Emulator mobile tuner Manufacturing test kits for production testing Flash ARM M0 CPU SRAM Channel Engine Touch Sequencer RX Channels 5-V TX Pump Programmable Analog Multiplexer 48 (Touch I/O: XY00-XY47) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Sampling: Production: 1 Analog circuit in the touchscreen controller used to measure Self-Capacitance (capacitance of a row or column in a Touchscreen Sensor) and Mutual-Capacitance (capacitance of the intersection between a row or column of a Touchscreen Sensor) 2 Cypress proprietary Charger Noise mitigation technology Document No. 001-89435 Rev. *G Q1 2015 Q2 2015 3 Interrupt 4 Inter-integrated 5 Serial circuit peripheral interface CYPRESS CONFIDENTIAL 22 CYTMA448 Full-feature Solution (Up to 8.3ʺ Touchscreens) Applications Block Diagram Host Processor Mobile phones Tablets INT3 Clock/ 2 Data CYTMA448 Features I2C4 / SPI5 Advanced User Interface Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505 and 8,067,948) 10-finger tracking with 1-mm-thick gloves 2-finger tracking with 5-mm-thick gloves Automatic Mode Switching for advanced sensing modes Proprietary Analog Front End1 with 35-V Charger Armor™2 True 10-V TX-Boost™ with 37 multi-phase transmit lines (reduces noise by 6x compared to single-phase transmit line) 35-Vpp charger noise immunity (1-500 kHz, 9-mm finger) Display synchronization System Solutions Android and Windows Phone operating systems Wireless tuning with TrueTouch Host Emulator mobile tuner Manufacturing test kits for production testing Flash ARM M0 CPU SRAM Channel Engine Touch Sequencer RX Channels 10-V TX Pump Programmable Analog Multiplexer 58 (Touch I/O: XY00-XY57) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Full production 1 Analog circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) and mutual-capacitance (capacitance of the intersection between a row or column of a touchscreen sensor) 2 Cypress proprietary charger noise mitigation technology Document No. 001-89435 Rev. *G 3 Interrupt 4 Inter-integrated 5 Serial circuit peripheral interface CYPRESS CONFIDENTIAL 23 CYTMA525 Advanced Features Solution for On-cell and SLIM®1 (Up to 3.6ʺ Touchscreens) Applications Block Diagram Host Processor Wearables INT5 Clock/ 2 Data CYTMA525 Features I2C6 / SPI7 Advanced User Interface Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505 and 8,067,948) Passive stylus support with palm rejection Low-power look-for-touch scan mode Multiple gloved-finger tracking; works with 5-mm-thick ski gloves Hover sensing: Tracks a hovering finger above the touchscreen Proprietary Analog Front End2 with 60-V Charger Armor™3 True 10-V TX-Boost™ with 8 multi-phase transmit lines (reduces noise by 3x compared to single-phase transmit line) 60-Vpp charger noise immunity (1-500 kHz, 9-mm finger) System solutions Supports on-cell and direct-laminated ITO4 stackups; SLIM1 and metal mesh sensors Android and Windows Phone operating systems Manufacturing test kits for production testing Flash SRAM ARM M0 CPU Channel Engine Touch Sequencer RX Channels 10-V TX Pump Programmable Analog Multiplexer 25 (Touch I/O: XY00-XY24) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Full production 1 Low-cost 3 Cypress 2 Analog 4 Indium Single-Layer Independent Multi-Touch sensor circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) and mutual-capacitance (capacitance of the intersection between a row or column of a touchscreen sensor) Document No. 001-89435 Rev. *G proprietary charger noise mitigation technology tin oxide 5 Interrupt 6 Inter-integrated circuit CYPRESS CONFIDENTIAL 7 Serial peripheral interface 24 CYTMA525A Advanced Features Solution for On-cell and SLIM®1 (Up to 3.0ʺ Touchscreens) Applications Block Diagram Host Processor Wearables INT5 Clock/ 2 Data CYTMA525A I2C6 / SPI7 Features Advanced User Interface Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505 and 8,067,948) Low-power look-for-touch scan mode Multiple gloved-finger tracking; works with 5-mm-thick ski gloves Proprietary Analog Front End2 with Charger Armor™3 True 5-V TX-Boost™ with 24 multi-phase transmit lines (reduces noise by 5x compared to single-phase transmit line) 35-Vpp charger noise immunity (1-500 kHz, 9-mm finger) System solutions Supports on-cell and direct-laminated ITO4 stackups; SLIM1 and metal mesh sensors Android and Windows Phone operating systems Manufacturing test kits for production testing Flash SRAM ARM M0 CPU Channel Engine Touch Sequencer RX Channels 5-V TX Pump Programmable Analog Multiplexer 24 (Touch I/O: XY00-XY23) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Sampling: Production: 1 Low-cost 3 Cypress 2 Analog 4 Indium Single-Layer Independent Multi-Touch sensor circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) and mutual-capacitance (capacitance of the intersection between a row or column of a touchscreen sensor) Document No. 001-89435 Rev. *G Q1 2015 Q2 2015 proprietary charger noise mitigation technology tin oxide 5 Interrupt 6 Inter-integrated circuit CYPRESS CONFIDENTIAL 7 Serial peripheral interface 25 CYTMA545 Advanced Features Solution for On-cell and SLIM®1 (Up to 5.2ʺ Touchscreens) Applications Block Diagram Host Processor Mobile phones INT5 Clock/ 2 Data CYTMA545 I2C6 / SPI7 Features Advanced User Interface Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505 and 8,067,948) Passive stylus support with palm rejection Multiple gloved-finger tracking; works with 5-mm-thick ski gloves Hover sensing: Tracks a hovering finger above the touchscreen Proprietary Analog Front End2 with 60-V Charger Armor™3 True 10-V TX-Boost™ with 8 multi-phase transmit lines (reduces noise by 3x compared to single-phase transmit line) 60-Vpp charger noise immunity (1-500 kHz, 9-mm finger) System Solutions Supports on-cell and direct-laminated ITO4 stack-ups; SLIM®1 and metal mesh sensors Android and Windows Phone operating systems Manufacturing test kits for production testing Flash SRAM ARM M0 CPU Channel Engine Touch Sequencer RX Channels 10-V TX Pump Programmable Analog Multiplexer 36 (Touch I/O: XY00-XY35) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Full production 1 Low-cost 3 Cypress 2 Analog 4 Indium Single-Layer Independent Multi-Touch sensor circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) and mutual-capacitance (capacitance of the intersection between a row or column of a touchscreen sensor) Document No. 001-89435 Rev. *G proprietary charger noise mitigation technology tin oxide 5 Interrupt 6 Inter-integrated circuit CYPRESS CONFIDENTIAL 7 Serial peripheral interface 26 CYTMA568 Advanced Features Solution for In-cell and On-cell (Up to 8.3ʺ Touchscreens) Applications Block Diagram Host Processor Mobile phones Tablets INT5 Clock/ 2 Data CYTMA568 I2C6 / SPI7 Features Advanced User Interface Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505 and 8,067,948) Multiple gloved-finger tracking; works with 5-mm-thick ski gloves Passive stylus support with palm rejection Hover sensing: Tracks a hovering finger above the touchscreen Proprietary Analog Front End1 with 60-V Charger Armor™2 True 10-V TX-Boost™ with 37 multi-phase transmit lines (reduces noise by 6x compared to single-phase transmit line) 60-Vpp charger noise immunity (1-500 kHz, 9-mm finger) System Solutions Supports in-cell3, on-cell and direct-laminated ITO4 stackups and metal mesh sensors Android and Windows Phone operating systems Manufacturing test kits for production testing Flash Channel Engine Touch Sequencer Programmable Analog Multiplexer 58 (Touch I/O: XY00-XY57) Touchscreen Sensor Availability Datasheets and Design Guides: Contact Sales or [email protected] Full production circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) and mutual-capacitance (capacitance of the intersection between a row or column of a touchscreen sensor) 2 Cypress proprietary charger noise mitigation technology Document No. 001-89435 Rev. *G RX Channels 10-V TX Pump Collateral 1 Analog SRAM ARM M0 CPU 3 A type of sensor stack-up in which the touch sensor is inside the LCD module under the color-filter glass 4 Indium tin oxide 5 Interrupt CYPRESS CONFIDENTIAL 6 Inter-integrated 7 Serial circuit peripheral interface 27 CYTT41XXX-88 Advanced Features Solution with Active Stylus (Up to 10.1ʺ Touchscreens) Applications Block Diagram Host Processor Android tablets INT3 2 Clock/ Data CYTT41XXX-88 Features I2C4 / SPI5 Advanced User Interface 1-mm passive and active stylus support with palm rejection Tracking with 5-mm-thick gloves Automatic Mode Switching for advanced sensing modes Waterproofing and wet-finger tracking with DualSense™ (U.S. patents 8,358,142; 8,319,505 and 8,067,948) Proprietary Analog Front End1 with ChargerArmor™2 True 5-V TX-Boost™ with multi-phase transmit (reduces noise compared to single-phase transmit line) 15-Vpp charger noise immunity (1-500 kHz, 9-mm finger) System Solutions Android operating system Wireless tuning with a TrueTouch Host Emulator mobile tuner Manufacturing test kits for production testing Flash ARM M0 CPU SRAM Channel Engine Touch Sequencer RX Channels 5-V TX Pump Programmable Analog Multiplexer 88 (Touch I/O: XY00-XY87) Touchscreen Sensor Collateral Availability Datasheets and Design Guides: Contact Sales or [email protected] Sampling: Production: 1 Analog circuit in the touchscreen controller used to measure self-capacitance (capacitance of a row or column in a touchscreen sensor) and mutual-capacitance (capacitance of the intersection between a row or column of a touchscreen sensor) 2 Cypress proprietary charger noise mitigation technology Document No. 001-89435 Rev. *G Q2 2015 Q3 2015 3 Interrupt 4 Inter-integrated 5 Serial CYPRESS CONFIDENTIAL circuit peripheral interface 28 CapSense® Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 29 Performance CapSense® Portfolio CapSense Express™ CapSense Plus™ PSoC® Configurable Controllers1 Programmable Controllers2 Programmable System-on-Chip2 CY8CMBR3116 16 Buttons, 8 LEDs Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8C28xx 44 Buttons, 8 Sliders 16KB Flash Proximity, Liquid Tolerance SmartSense™ Auto-tuning NEW CY8CMBR3106S 11 Buttons, 2 Sliders Proximity, Liquid Tolerance SmartSense_EMCplus™3 CY8C56xx/58xx 62 Buttons, 12 Sliders 64, 128, 256KB Flash Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8CMBR3110 10 Buttons, 5 LEDs Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8C20xx7 31 Buttons, 6 Sliders 16, 32KB Flash Proximity, Liquid Tolerance SmartSense Auto-tuning NEW CY8CMBR3108 8 Buttons, 4 LEDs Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8C36xx/38xx 62 Buttons, 12 Sliders 32, 64KB Flash Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8CMBR2110 10 Buttons, 10 LEDs SmartSense Auto-tuning CY8C20xx6A/S 33 Buttons, 6 Sliders 16, 32KB Flash, 2KB SRAM SmartSense Auto-tuning CY8C52xx/54xx 62 Buttons, 12 Sliders 32, 64, 128, 256KB Flash Proximity, Liquid Tolerance SmartSense_EMCplus3 NEW CY8CMBR3102 2 Buttons, Proximity SmartSense_EMCplus3 CY8CMBR2016 16 Buttons SmartSense Auto-tuning CY8C21x34/B 24 Buttons, 4 Sliders 8KB Flash Proximity, Liquid Tolerance SmartSense Auto-tuning CY8C32xx/34xx 62 Buttons, 12 Sliders 16, 32, 64KB Flash Proximity, Liquid Tolerance SmartSense_EMCplus3 NEW CY8CMBR310XLP 4 Buttons, Low Power NDA Required Contact Sales CY8CMBR2044 4 Buttons, 4 LEDs SmartSense Auto-tuning CY8CMBR2010 10 Buttons, 10 LEDs SmartSense Auto-tuning CY8C20x36A 33 Buttons, 6 Sliders 8KB Flash SmartSense Auto-tuning CY8C41xx/42xx 36 Buttons, 7 Sliders 16, 32KB Flash Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8CMBR3002 2 Buttons, 2 LEDs SmartSense_EMCplus3 CY8C201xx 10 Buttons, 5 LEDs 2 Sliders 1 Standard CY8C20xx6H 25 Buttons, 5 Sliders 8, 16KB Flash SmartSense Auto-tuning Haptics Integration Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL CY8C4246/7-M Q215 55 Buttons, 11 Sliders 128KB Flash, Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8C4xx8-BL Q115 36 Buttons, 7 Sliders 256KB Flash, BLE4 Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8C4xx7-BL 36 Buttons, 7 Sliders 128KB Flash, BLE4 Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8C40xx 16 Buttons, 3 Sliders 8, 16KB Flash Proximity, Liquid Tolerance SmartSense_EMCplus3 CY8C20x34 25 Buttons, 6 Sliders 8KB Flash products that are configured for target applications with a graphical user interface 2 Microcontroller-based products that can be freely programmed to implement additional functions 3 SmartSense Electromagnetic Compatible = SmartSense Auto-tuning + high noise immunity CY8C4246/7-L Q315 96 Buttons, 19 Sliders 256KB Flash, Proximity, Liquid Tolerance SmartSense_EMCplus3 4 Production Sampling Development Concept Bluetooth Low Energy Status Availability QQYY QQYY 30 CY8CMBR3xxx Family Applications Family Table Industrial control panels White goods, small home appliances Keypads Elevator controls TVs, monitors Music players Mobile phones, tablets CapSense GPOs Buttons MPN CY8CMBR3002-SX1I CY8CMBR3102-SX1I CY8CMBR3108-LQXI CY8CMBR3110-SX2I CY8CMBR3106S-LQXI CY8CMBR3116-LQXI Features 2 2 8 10 11 16 2 1 4 5 0 8 Proximity Sensors Communication Interface Buzzer 2 2 2 2 2 GPO I2C I2C I2C I2C I2C N N Y Y Y Y Block Diagram Up to 16 buttons, or 8 buttons and 8 LEDs Up to two 5-segment sliders SmartSense™ Auto-tuning eliminates manual tuning Proximity sensing distance of up to 30 cm LED control Buzzer output Liquid tolerance1 Register-configurable with EZ-Click™ software tool Wide operating voltage: 1.7-5.5 V Packages: 8-pin SOIC, 16-pin QFN, 16-pin SOIC, 24-pin QFN CY8CMBR3xxx 1.7-5.5 V 16 Internal Voltage Regulator CPU Watchdog Timer 32 32 Configuration Memory 9 XRES2 Host Interrupt 2 I2C Interface I2C Driven Shield Shield PWM Buzzer 16 CapSense + SmartSense GPOs 8 8 Sensors Collateral Datasheet: Design Guide: 1 Sensors/LEDs Availability CY8CMBR3xxx CY8CMBR3xxx Sampling: Production: The ability of a capacitive sensing solution to work in the presence of water droplets or mist Document No. 001-89435 Rev. *G 2 Now Now External reset CYPRESS CONFIDENTIAL 31 PSoC® 4000 PSoC MCU Family Applications Block Diagram MCU and discrete analog replacement User interface for button replacement User interface for heating, ventilation, air conditioning PSoC 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks I/O Subsystem GPIO x8 CORTEX-M0 32-bit MCU subsystem 16-MHz ARM® Cortex™-M0 CPU Up to 16KB flash and 2KB SRAM Programmable analog Two IDACs1 (7-bit and 8-bit), digitally controlled current source One comparator (CMP) CapSense® with SmartSense™ Auto-tuning One Cypress Capacitive Sigma-Delta™ (CSD) controller Capacitive sensing supported on up to 16 pins Programmable digital One configurable 16-bit timer, counter or pulse-width modulator (TCPWM) block One I2C master or slave Packages 8-pin SOIC, 16-pin SOIC, 16-QFN, 24-pin QFN 1 16 MHz Flash (8KB to 16KB) SRAM (2KB) CMP CSD Programmable Digital Blocks TCPWM I2C Programmable Interconnect and Routing Features Advanced High-Performance Bus (AHB) IDAC1 x2 GPIO x8 GPIO x8 Serial Wire Debug GPIO x4 Collateral Availability Datasheet: PSoC 4000 Technical Reference Manual: PSoC 4000 Sampling: Production: Now Now Current-output digital-to-analog converter Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 32 PSoC® 4100 Intelligent Analog Family Applications Block Diagram User interface for home appliances Digital and analog sensor hub MCU and discrete analog replacement PSoC 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 32-bit MCU Subsystem 24-MHz ARM® Cortex™-M0 CPU Up to 32KB flash and 4KB SRAM Opamp x2 SAR1 ADC CMP x2 CSD 8-bit IDAC2 7-bit IDAC2 I/O Subsystem GPIO x8 CapSense® with SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller CapSense supported on up to 36 pins Flash (16KB to 32KB) Programmable Analog Blocks Two comparators (CMPs) Two opamps, programmed as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR1 ADC Two IDACs2 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Four programmable 16-bit TCPWM3 blocks Two SCBs4: I2C master or slave, SPI master or slave, or UART Packages: 28-pin SSOP, 40-pin QFN, 44-pin TQFP, 48-pin LQFP SRAM (4KB) Programmable Digital Blocks TCPWM3 x4 Programmable Interconnect and Routing 24 MHz Advanced High-Performance Bus (AHB) CORTEX-M0 GPIO x8 GPIO x8 GPIO x8 SCB4 x2 Serial Wire Debug GPIO x4 Segment LCD Drive Collateral Datasheet: PSoC 4 (CY8C4100) Technical Reference Manual: PSoC 4 1 Successive approximation register digital-to-analog converter 2 Current-output Document No. 001-89435 Rev. *G 3 4 Availability Sampling: Production: Now Now Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 33 PSoC® 4200 Programmable Digital Family Applications Block Diagram User interface for home appliances Digital and analog sensor hub MCU and discrete analog replacement PSoC 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 32-bit MCU Subsystem 48-MHz ARM® Cortex™-M0 CPU Up to 32KB flash and 4KB SRAM Opamp x2 SAR1 ADC CMP x2 CSD 8-bit IDAC2 7-bit IDAC2 I/O Subsystem GPIO x8 CapSense® with SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller CapSense supported on up to 36 pins Flash (16KB to 32KB) Programmable Analog Blocks Two comparators (CMPs) Two opamps, programmed as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR1 ADC Two IDACs2 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Four Universal Digital Blocks (UDBs): custom digital peripherals Four programmable 16-bit TCPWM3 blocks Two SCBs4: I2C master or slave, SPI master or slave, or UART SRAM (4KB) Programmable Digital Blocks UDB x4 TCPWM3 x4 Programmable Interconnect and Routing 48 MHz Advanced High-Performance Bus (AHB) CORTEX-M0 GPIO x8 GPIO x8 GPIO x8 SCB4 x2 Serial Wire Debug Packages: 28-pin SSOP, 40-pin QFN, 44-pin TQFP, 48-pin LQFP GPIO x4 Segment LCD Drive Collateral Datasheet: PSoC 4 (CY8C4200) Technical Reference Manual: PSoC 4 1 Successive approximation register digital-to-analog converter 2 Current-output Document No. 001-89435 Rev. *G 3 4 Availability Sampling: Production: Now Now Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 34 PSoC® 4100 BLE-Series Intelligent Analog Family with Bluetooth Low Energy Block Diagram Sports and fitness monitors, wearable electronics, medical devices, home automation solutions, game controllers, sensor-based low-power systems for the Internet of Things (IoT) PSoC 4 BLE One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 24 MHz BLE System Flash (128KB to 256KB) SRAM (16KB to 32KB) Serial Wire Debug Availability Datasheet: PSoC 4 BLE (CY8C4XX7 BLE) Sampling: Production: front end(s) approximation register 2 Successive Document No. 001-89435 Rev. *G 3 4 CMP x2 GPIO x8 SAR2 ADC CSD Programmable Digital Blocks TCPWM3 x4 SCB4 x2 GPIO x8 GPIO x8 GPIO x8 Segment LCD Drive GPIO x4 Collateral 1 Analog Advanced High-Performance Bus (AHB) 32-bit MCU subsystem 24-MHz ARM® Cortex™-M0 CPU Up to 256KB flash and 32KB SRAM Programmable AFE1 Four opamps, configurable as PGAs, comparators, filters, etc. One 12-bit, 1-Msps SAR2 ADC CapSense® with SmartSense™ Auto-tuning One Cypress Capacitive Sigma-Delta™ (CSD) controller with touchpad capability Programmable digital logic Four configurable TCPWM3 blocks: 16-bit timer, counter or PWM Two configurable serial communication blocks (SCBs4): I2C master or slave, SPI master or slave, or UART Packages 56-pin QFN, 68-pin CSP Bluetooth Smart connectivity with Bluetooth 4.1 2.4-GHz BLE radio with integrated Balun Opamp x4 CORTEX-M0 I/O Subsystem Programmable Interconnect and Routing Applications Now 128KB Now, 256KB Q2 2015 Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 35 PSoC® 4200 BLE-Series Programmable Digital Family with Bluetooth Low Energy Block Diagram Sports and fitness monitors, wearable electronics, medical devices, home automation solutions, game controllers, sensor-based low-power systems for the Internet of Things (IoT) PSoC 4 BLE One-Chip Solution MCU Subsystem Programmable Analog Blocks Features 48 MHz BLE System Flash (128KB to 256KB) SRAM (16KB to 32KB) Sampling: Production: Document No. 001-89435 Rev. *G 3 4 CSD Programmable Digital Blocks UDB x4 TCPWM3 x4 SCB4 x2 GPIO x8 GPIO x8 GPIO x8 GPIO x4 Datasheet: PSoC 4 BLE (CY8C4XX7 BLE) front end(s) approximation register ADC Segment LCD Drive Availability 2 Successive CMP x2 GPIO x8 SAR2 Serial Wire Debug Collateral 1 Analog Advanced High-Performance Bus (AHB) 32-bit MCU subsystem 48-MHz ARM® Cortex™-M0 CPU Up to 256KB flash and 32KB SRAM Programmable AFE1 Four opamps, configurable as PGAs, comparators, filters, etc. One 12-bit, 1-Msps SAR2 ADC CapSense® with SmartSense™ Auto-tuning One Cypress Capacitive Sigma-Delta™ (CSD) controller with touchpad capability Programmable digital logic Four Universal Digital Blocks (UDBs): custom digital peripherals Four configurable TCPWM3 blocks: 16-bit timer, counter or PWM Two configurable serial communication blocks (SCBs4): I2C master or slave, SPI master or slave, or UART Packages 56-pin QFN, 68-pin CSP Bluetooth Smart connectivity with Bluetooth 4.1 2.4-GHz BLE radio with integrated Balun Opamp x4 CORTEX-M0 I/O Subsystem Programmable Interconnect and Routing Applications Now 128KB Now, 256KB Q2 2015 Timer, counter, PWM block Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 36 PSoC® 4100 M-Series Intelligent Analog Family Applications Block Diagram User interface and host processor for home appliances Digital and analog sensor hub MCU and discrete analog replacement PSoC® 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks I/O Subsystem GPIO x8 Features 32-bit MCU Subsystem 24-MHz ARM® Cortex®-M0 CPU with a DMA controller and RTC1 Up to 128KB flash and 16KB SRAM Up to 55 GPIOs supporting analog, digital and CapSense interfaces CapSense® With SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller Programmable Analog Blocks Six comparators (CMP) Four opamps, programmable as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR2 ADC Four IDACs3 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Eight programmable 16-bit TCPWM4 blocks Four SCBs5: I2C master or slave, SPI master or slave, or UART Two Controller Area Network (CAN) Controllers Packages: 48-pin LQFP, 64-pin TQFP (0.8-mm pitch), 64-pin TQFP (0.5-mm pitch), 68-pin QFN 1 Real-time GPIO x8 Flash (64KB to 128KB) SRAM (8KB to 16KB) Serial Wire Debug CAN x2 CMP x6 CSD 8-bit IDAC3 x2 7-bit IDAC3 x2 Programmable Digital Blocks TCPWM4 x8 Programmable Interconnect and Routing 24 MHz Advanced High-Performance Bus (AHB) Cortex-M0 GPIO x8 GPIO x8 GPIO x8 SCB5 x4 GPIO x8 Segment LCD Drive GPIO x7 RTC1 DMA Availability Collateral Datasheet: SAR2 ADC Opamp x4 Sampling: Production: PSoC 4100M datasheet clock approximation register 2 Successive Document No. 001-89435 Rev. *G 3 4 Current-output digital-to-analog converter Timer, counter, PWM block 5 Now Q2 2015 Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 37 PSoC® 4200 M-Series Programmable Digital Family Applications Block Diagram User interface and host processor for home appliances Digital and analog sensor hub LED control and communication for lighting systems PSoC® 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks I/O Subsystem GPIO x8 Features 32-bit MCU Subsystem 48-MHz ARM® Cortex®-M0 CPU with a DMA controller and RTC1 Up to 128KB flash and 16KB SRAM Up to 55 GPIOs supporting analog, digital and CapSense interfaces CapSense® With SmartSense™ Auto-tuning Cypress Capacitive Sigma-Delta™ (CSD) controller Programmable Analog Blocks Six comparators (CMPs) Four opamps, programmable as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR2 ADC Four IDACs3 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Four Universal Digital Blocks (UDBs): custom digital peripherals Eight programmable 16-bit TCPWM3 blocks Four SCBs4: I2C master or slave, SPI master or slave, or UART Two Controller Area Network (CAN) Controllers Packages: 48-pin LQFP, 64-pin TQFP (0.8-mm pitch), 64-pin TQFP (0.5-mm pitch), 68-pin QFN 1 Real-time GPIO x8 Flash (64KB to 128KB) SRAM (8KB to 16KB) Serial Wire Debug CAN x2 CMP x6 CSD 8-bit IDAC3 x2 7-bit IDAC3 x2 Programmable Digital Blocks UDB x4 TCPWM4 x8 Programmable Interconnect and Routing 48 MHz Advanced High-Performance Bus (AHB) Cortex-M0 GPIO x8 GPIO x8 GPIO x8 GPIO x8 RTC1 SCB5 DMA x4 Segment LCD Drive GPIO x7 Availability Collateral Datasheet: SAR2 ADC Opamp x4 Sampling: Production: PSoC 4200M datasheet clock approximation register 2 Successive Document No. 001-89435 Rev. *G 3 4 Current-output digital-to-analog converter Timer, counter, PWM block 5 Now Q2 2015 Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 38 PSoC® 4200 L-Series Programmable Digital Family Applications Block Diagram User interface and host processor for home appliances Digital and analog sensor hub MCU and discrete analog replacement LED control and communication for lighting systems PSoC® 4 One-Chip Solution MCU Subsystem Programmable Analog Blocks Features clock approximation register 2 Successive Document No. 001-89435 Rev. *G CSD x2 8-bit IDAC3 x2 7-bit IDAC3 x2 GPIO x8 ADC SRAM (8KB to 32KB) Serial Wire Debug CAN x2 Full-Speed USB 2.0 Programmable Digital Blocks UDB x8 TCPWM4 x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 GPIO x8 SCB5 RTC1 Programmable Interconnect and Routing Flash (64KB to 256KB) Advanced High-Performance Bus (AHB) 48 MHz GPIO x8 x4 GPIO x8 DMA Segment LCD Drive GPIO x4 Availability Collateral 1 Real-time CMP x6 GPIO x8 Cortex-M0 32-bit MCU Subsystem 48-MHz ARM® Cortex® -M0 CPU with a DMA controller and RTC1 Up to 256KB flash and 32KB SRAM Up to 98 GPIOs supporting analog and digital interfaces CapSense® With SmartSense™ Auto-tuning Two Cypress Capacitive Sigma-Delta™ (CSD) controllers Programmable Analog Blocks Two comparators (CMPs) Four opamps, configurable as PGAs, CMPs, filters, etc. One 12-bit, 1-Msps SAR2 ADC Four IDACs3 (2x 8-bit, 2x 7-bit) Programmable Digital Blocks Eight Universal Digital Blocks (UDBs): custom digital peripherals Eight configurable 16-bit TCPWM4 blocks Four SCBs5: I2C master or slave, SPI master or slave, or UART Full-Speed USB 2.0 Controller and Transceiver Two Controller Area Network (CAN) Controllers Packages: 48-pin TQFP, 64-pin TQFP, 68-pin QFN, 124-pin µBGA Preliminary Datasheet: Opamp x4 SAR2 I/O Subsystem Sampling: Production: Contact Sales 3 4 Current-output digital-to-analog converter Timer, counter, PWM block 5 Q3 2015 Q4 2015 Serial communication block programmable as I2C/SPI/UART CYPRESS CONFIDENTIAL 39 PSoC Platform Packages Package Pins LQFP 48 PSoC 1 PDIP QFN 8 20 28 16 24 32 40 48 56 68 8 16 20 28 PSoC 3 PSoC 4 SOIC PSoC 5LP CapSense Package SSOP TQFP Pins 8 16 20 24 28 32 48 44 PSoC 1 68 CYPRESS CONFIDENTIAL 72 99 124 PSoC 5LP Document No. 001-89435 Rev. *G 30 PSoC 4 100 µBGA PSoC 3 CapSense 64 WLCSP 40 USB Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 41 USB Portfolio Hub Bridge CYUSB301x FX3 32-Bit Bus to USB 3.0 ARM9, 512KB RAM CYUSB33xx HX3 4 Ports, Shared Link™1 BC 1.22, Ghost Charge™3 CYUSB306x CX3 CSI-24 to USB 3.0 4 CSI-24 Lanes, 1 Gbps/Lane USB 3.0 Device NEW Host Storage Type-C CYUSB303x FX3S 16-Bit Bus to USB 3.0 RAID5, Dual SDXC6/eMMC7 Q115 CYPD1xxx CCG1 USB Type-C Port Controller 2 PD Ports, 5 Profiles, 100 W CYUSB302x SD3 SDXC6/eMMC7 to USB 3.0 RAID5 DX3 USB 3.0 to DSI8 TX Contact Sales NEW Q115 NEW CCG2 USB Type-C Cable Controller Contact Sales NEW USB 2.0 GX3 USB 3.0 to Gigabit Ethernet Contact Sales CY7C6801x/53 FX2LP 16-Bit Bus to USB 2.0 8051, 16KB RAM CY7C656x4 HX2VL 4 Ports 4 Transaction Translators CY7C68003 TX2UL ULPI9 PHY 13, 19.2, 24, 26 MHz CY7C656x1 HX2LP 4 Ports, Industrial Grade 1 Transaction Translator CYWB016xBB Bay™ HS USB OTG Dual SDXC6/eMMC7 CYWB0x2xABS Arroyo™, Astoria™ 16-Bit Bus to USB 2.0 8051, Dual SD/eMMC7 Type-C product applies to any USB speed CY7C6803x NX2LP NAND Flash to USB 2.0 8051, 15KB RAM USB 1.1 CY7C683xx AT2LP Parallel ATA to USB 2.0 8051 CY7C638xx enCoRe™ II M8C MCU, 20 GPIOs SPI, 8KB Flash CY7C6521x USB-Serial UART/SPI/I2C to USB 2 Channels, CapSense® SL811HS FS USB Host/Device 256Byte RAM CY7C64215 enCoRe III M8C MCU, 50 GPIOs, ADC I2C/SPI, 16KB Flash CY7C65213 USB-to-UART (Gen 2) 3 Mbps, 8 GPIOs CY7C67300 EZ-Host 4 Ports, FS USB OTG 32 GPIOs CY7C643xx enCoRe V M8C MCU, 36 GPIOs, ADC I2C/SPI, 32KB Flash CY7C64225 USB-to-UART (Gen 1) 230 Kbps CY7C67200 EZ-OTG™ 2 Ports, FS USB OTG 25 GPIOs 1 Simultaneous USB 2.0 and USB 3.0 traffic on the same port 2 Battery Charging specification v1.2 Document No. 001-89435 Rev. *G 3 Enables USB charging without host connection 4 Camera Serial Interface v2.0 5 Redundant array of independent disks 6 SD extended capacity 7 Embedded MultiMedia Card Serial Interface 9 UTMI low-pin interface 8 Display CYPRESS CONFIDENTIAL Production Sampling Development Concept Status Availability QQYY QQYY 42 CCG1: USB Type-C Port Controller Block Diagram Notebooks, tablets, monitors, docking stations, power adapters, Type-C EMCA and dongles CCG1: USB Type-C Port Controller with PD MCU Subsystem Programmable Analog Blocks Features 1 Timer, Type-C Port 1 CORTEX-M0 48 MHz Flash (32KB) SRAM (4KB) Comparators Programmable Digital Blocks TCPWM1 SCB2 (I2C, SPI, UART) Profiles and Configurations Baseband MAC Type-C Port 2 GPIOs Serial Wire Debug Samples: Contact Sales counter, pulse-width modulation block Document No. 001-89435 Rev. *G ADC Baseband PHY Availability Collateral Preliminary Datasheet: IDAC Advanced High-Performance Bus (AHB) 32-bit MCU subsystem 48-MHz ARM® Cortex™-M0 CPU with 32KB flash and 4KB SRAM Integrated analog blocks 12-bit, 1-Msps ADC for VBUS voltage and current monitoring Dynamic Overcurrent and Overvoltage Protection Integrated digital blocks Two configurable 16-bit TCPWM1 blocks One SCB2: I2C master or slave, SPI master or slave, or UART Up to 8 GPIOs Type-C Support Integrated Transceiver, supporting up to two Type-C ports Controls routing of all protocols to an external MUX PD 2.0 Support Supports Provider and Consumer roles and all power profiles Low-power operation 1.71-5.5 V operation Sleep: 1.3 mA, Deep Sleep: 1.3 µA, Hibernate: 150 nA, Stop: 20 nA Packages 40-pin QFN (36 mm2), 28-pin SSOP (80 mm2), 35-ball CSP (6.8 mm2), 16-pin SOIC (60 mm2) I/O Subsystem Programmable Interconnect and Routing Applications 2 Now Production: March 2015 Serial communication block configurable as UART, SPI or I 2C CYPRESS CONFIDENTIAL 43 CX3: MIPI1 CSI-2 to USB 3.0 Bridge Applications Block Diagram Industrial, medical and machine vision cameras 1080p Full HD and 4K Ultra HD (UHD) camera Document scanners, fingerprint scanners Game consoles Videoconferencing systems Notebook PCs, tablets Image acquisition systems 5 CX3 JTAG 512KB RAM USB 3.0-compliant video-class controller Four-lane MIPI1 Camera Serial Interface v2.0 (CSI-2) input Camera Control Interface (CCI) for image sensor configuration Supports industry-standard video data formats: RAW8/10/12/142, YUV422/4443, RGB888/666/5654 Supports uncompressed streaming video: 4K UHD at 15 fps, 1080p at 30 fps, 720p at 60 fps On-chip ARM9 with 512KB RAM for data processing Supports I2C, I2S, SPI, UART and 12 GPIOs 121-BGA (10 x 10 x 1.7 mm) Collateral Datasheet: Reference Design Kit: Software Development Kit: 1 Mobile Industry Processor Interface format for raw video data 2 Video Document No. 001-89435 Rev. *G Image Sensor or Image Signal Processor 4 32 32 32 32 UART 4 I2 C 2 USB 3.0 Features MIPI1 CSI-2 ARM9 6 USB 3.0 Host SPI 4 GPIO 12 Availability CX3 Datasheet CX3 RDK EZ-USB SDK 3 4 Production: Now Video format for luminance and chrominance components Video format for red, green and blue pixel components CYPRESS CONFIDENTIAL 44 HX3: USB 3.0 Hub Applications Block Diagram Upstream Port Docking stations for notebook PCs and tablets PC motherboards, servers Digital TV, monitors Retail hub boxes Printers, scanners Set-top boxes, home gateways, routers, game consoles SS3 PHY USB 2.0 PHY I2C 32 Features 16 SuperSpeed Hub Controller USB 3.0-compliant four-port Hub Controller USB-IF certified (Test ID: 330000047) WHQL certified for Windows 7, Window 8, Windows 8.1 Shared Link™: Supports simultaneous USB 2.0 and SuperSpeed Devices on the same port Ghost Charge™: Enables USB charging while the Hub is disconnected from a USB Host Charging Standard support: USB-IF Battery Charging v1.2 Apple Charging Standard Charging an OTG Host in an ACA-Dock Programming of external EEPROM via USB Configurable USB 3.0 & USB 2.0 PHY. Drives 11ʺ trace 68-QFN (8 x 8 x 1.0 mm), 88-QFN (10 x 10 x 1.0 mm), 100-BGA (6 x 6 x 1.0 mm) USB 2.0 Hub Controller 16 32 Buffers 4x TT1 Repeater 16 32 Routing Logic Routing Logic 32 16 USB 3.0 PHY SS3 PHY USB 3.0 PHY USB 2.0 PHY SS3 PHY 4 2 Downstream Port 1 Collateral 4 USB 3.0 PHY USB 2.0 PHY SS3 PHY 2 4 Downstream Port 2 USB 3.0 PHY USB 2.0 PHY SS3 PHY 2 4 USB 2.0 PHY 2 Downstream Port 3 Downstream Port 4 Availability Datasheet: Application Note: Kits: Configuration Utility: HX3 Datasheet HX3 Hardware Design Guide CY4609, CY4603, CY4613 Blaster Plus2 1 2 Document No. 001-89435 Rev. *G 8 MCU USB 3.0 PHY 32 Transaction translator 2 2 4 HX3 Hub EEPROM Production: Now A Cypress GUI-based PC application for setting HX3 configuration parameters CYPRESS CONFIDENTIAL 3 SuperSpeed 45 USB-Serial Bridge Controller Block Diagram Applications USB-to-RS232 cables Portable medical devices (e.g., blood glucose meters) Barcode readers, point-of-sale (POS) terminals NFC card readers, fingerprint scanners Temperature, current and energy measurement systems Servers and networking switches, home gateways GPS dongles, set-top boxes, Smart UPSs, industrial meters Precision trackpad (PTP) bridge USB-Serial Bridge Controller 1.8-V Regulator 3.3 V 4 USB 8 8 CapSense 8 Touch Buttons 8 8 GPIOs GPIO Features Dual-channel UART/I2C/SPI to full-speed USB bridge CapSense® for eight touch buttons USB Battery Charging Detection revision 1.2 Integrated regulator, oscillator and termination resistors Customizable bridge for different serial interface standards (UART, I2C or SPI) and voltage domains (1.8 V to 5 V) Driver support for major operating systems: Windows Vista, Windows CE, Windows XP, Windows 7, Windows 8, Mac OS X 10.6/7, Linux kernel 2.6.35 and later, Android Gingerbread and later Software utility to program product ID and vendor ID and to configure serial interfaces 24-QFN (4 x 4 x 0.55 mm), 32-QFN (5 x 5 x 1.0 mm), 28-SSOP (10 x 7.5 x 1.65 mm) Collateral Datasheets: Product Overview: Evaluation Kits: Software Development Kit: Document No. 001-89435 Rev. *G Any USB Host Battery Charger Detection 8 Serial Communication Block 1 6 UART/ I2C/ SPI 8 Serial Communication Block 2 6 UART/ I2C/ SPI 32 Cortex M0 32KB Flash 4KB RAM Availability USB-Serial Datasheets USB-Serial Overview USB-Serial Kits USB-Serial SDK Production: Now CYPRESS CONFIDENTIAL 46 Wireless/RF Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 47 Wireless/RF Portfolio Programmable Radio-on-Chip (PRoCTM) 2.4-GHz RF Transceiver NEW GFSK3 + DSSS6 GFSK3 BLE2 CYBL1016x PRoC BLE CM03, 2 SCB4 36 GPIOs, 128KB Flash NEW Q215 CYBL1017x PRoC BLE CM03, 2 SCB4 36 GPIOs, 256KB Flash CYRF8935 WUSB8-NL 1 Mbps Tx 18 mA, Rx 18 mA CYRF89135 PRoC™-Embedded WUSB8-NL, M8C9 35 GPIOs, 32KB Flash CYRF9935 WUSB8-NX 2 Mbps Tx 12 mA, Rx 15 mA CYRF89235 PRoC-USB WUSB8-NL, M8C9, USB 13 GPIOs, 32KB Flash CYRF6936 WUSB8-LP 1 Mbps Tx 26 mA, Rx 21 mA TrueTouch®1 CapSense® MCU NEW CYBL1046x PRoC BLE CM03, 2 SCB4, CapSense 36 GPIOs, 128KB Flash NEW Programmable System-on-Chip (PSoCTM) Q215 CYBL1047x PRoC BLE CM03, 2 SCB4, CapSense 36 GPIOs, 256KB Flash CYRF89435 PRoC-CS WUSB8-NL, M8C9 35 GPIOs, 32KB Flash Intelligent Analog NEW CYBL1056x PRoC BLE CM03, 2 SCB4, 2-Finger1 36 GPIOs, 128KB Flash Q215 NEW CYBL1057x PRoC BLE CM03, 2 SCB4, 2-Finger1 36 GPIOs, 256KB Flash Programmable Digital NEW NEW CY8C41x7-BL PSoC 4 BLE CM03 , 2 SCB4, 2-Finger1 CMP5, Opamp 36 GPIOs, 128KB Flash CY8C42x7-BL PSoC 4 BLE CM03 , 2 SCB4, 2-Finger1 CMP5, Opamp, 4 UDBs6 36 GPIOs, 128KB Flash CY8C41x8-BL Q215 PSoC 4 BLE CM03 , 2 SCB4, 2-Finger1 CMP5, Opamp 36 GPIOs, 256KB Flash CY8C42x8-BL Q215 PSoC 4 BLE CM03 , 2 SCB4, 2-Finger1 CMP5, Opamp, 4 UDBs6 36 GPIOs, 256KB Flash NEW NEW CYRF89535 PRoC-TT WUSB8-NL, M8C9, 2-Finger1 35 GPIOs, 32KB Flash CYRF69103 PRoC-LP WUSB8-LP, M8C9 14 GPIOs, 8KB Flash CYRF69213 PRoC-LP WUSB8-LP, M8C9, USB 14 GPIOs, 8KB Flash Integration 1 Touch-sensing 9 Cypress 2 Bluetooth 10 Direct technology with 2-finger gestures Low Energy, also known as Bluetooth Smart 3 ARM® Cortex™-M0 4 Serial communication block Document No. 001-89435 Rev. *G proprietary 8-bit MCU sequence spread spectrum CYPRESS CONFIDENTIAL Production Sampling Development Concept Status Availability QQYY QQYY 1048 PRoC™-TT (CYRF89535) Programmable Radio-on-Chip with TrueTouch® Touch Sensing Block Diagram Applications Wireless touch mice Wireless keyboards with trackpads Wireless trackpads RF remote controls with trackpads PRoC-TT System-on-Chip 26 8 8 TrueTouch Features Trackpad Sensors One-chip solution for wireless human interface devices (HIDs) with TrueTouch touch sensing Cypress M8C, a proprietary 8-bit MCU subsystem 32KB flash, 2KB SRAM, 35 GPIOs Three 16-bit programmable timers 10-bit ADC for battery monitoring I2C master/slave, SPI master/slave TrueTouch capacitive touch module: On-chip library for one- and two-finger gestures 26 X/Y sensor inputs Cypress’s WUSB-NL: On-chip, low-power, 2.4-GHz radio AgileHID™ protocol for interference immunity1 68 QFN (8 x 8 x 1.0 mm) Collateral Datasheet: Development Kit: 1 Cypress’s Flash LED 8 Timers 8 ADC M8C MCU 8 4 GPIO Buttons 8 WUSB-NL Step-Up Converter Battery Availability Contact Sales Contact Sales Production: Now proprietary 2.4-GHz protocol for human interface devices (HIDs) Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 49 WUSB-NX (CYRF9935) WirelessUSB™ Proprietary 2.4-GHz Radio Applications Block Diagram Wireless mice Wireless touch mice Wireless keyboards Wireless trackpads Wireless keyboards with trackpads RF remote controls WUSB-NX TX FIFO Features 4 MCU SPI Ultra-low-power, 2.4-GHz radio Low current consumption: Sleep current: 900 nA Idle current: 26 µA Transmit current: 12 mA Receive current: 15 mA Programmable data rates: 2 Mbps, 250 Kbps Maximum link budget: +97 dB for 30-meter range Max transmit power: +4 dBm Min receive sensitivity: −93 dBm at 250 Kbps MCU interface: SPI slave Package: 24-QFN (4 x 4 x 0.55 mm) PA3 Baseband Engine Rx FIFO Frequency Synthesizer GFSK1 DEMOD4 BPF5 LNA6 Register Map Collateral Datasheet: Development Kit: GFSK1 MOD2 Availability CYRF9935 Contact Sales Production: 1 Gaussian Document No. 001-89435 Rev. *G Now frequency shift keying 4 Demodulator 2 Modulator 5 Band-pass 3 6 Low-noise Power amplifier CYPRESS CONFIDENTIAL filter amplifier 50 PRoC™ BLE (CYBL101x/4x/5xx) Programmable Radio-on-Chip with Bluetooth Low Energy Applications Block Diagram Wireless touch mice Wireless keyboards with trackpads Wireless trackpads Wireless remote control with trackpads BLE connectivity Wireless toys PRoC BLE System-on-Chip Analog I/O Subsystems ARM Cortex-M0 48 MHz Features CSD6 48-MHz ARM® Cortex™-M0 MCU Up to 256KB Flash, 32KB SRAM, 36 programmable GPIOs1 Bluetooth Smart connectivity with Bluetooth 4.1: 2.4-GHz BLE2 radio and baseband with integrated Balun -92-dBm Rx sensitivity, +3-dBm Tx output power Modes: 1.3-µA Deep-Sleep, 150-nA Hibernate, 60-nA Stop Analog and digital peripherals: One 12-bit, 1-Msps SAR3 ADC Four 16-bit TCPWM4 blocks Two SCBs5, configurable as I2C, SPI or UART I2S for audio input Flexible mapping onto GPIOs Integrated library support for one- and two-finger gestures 56-QFN (7 x 7 x 0.6 mm), 68-ball CSP (3.9 x 3.5 x 0.55 mm) Advanced High-Performance Bus (AHB) Peripherals Flash (Up to 256KB) Sampling: Production: 4 Timer, 5 Serial Document No. 001-89435 Rev. *G GPIO Port GPIO Port Segment LCD Drive Datasheet Application Notes input/output (configurable) Low Energy, also known as Bluetooth Smart 3 Successive approximation register GPIO Port GPIO Port SWD7 Availability 2 Bluetooth 2 x SCB5 BLE2 Collateral 1 General-purpose 4 x TCPWM4 I2S SRAM (Up to 32KB) GPIO Port SAR3 ADC Programmable Interconnect and Routing MCU Subsystems Now Now counter, pulse-width modulator communication blocks 6 Capacitive Sigma-Delta controller CYPRESS CONFIDENTIAL 7 Serial wire debug communication protocol 51 11a PSoC 4 BLE (CY8C4xx7-BL) Block Diagram Sports and fitness monitors, wearable electronics, medical devices, home automation solutions, game controllers, sensor-based low-power systems for IoT PSoC 4 BLE One-Chip Solution MCU Subsystem Programmable Analog Blocks Features Opamp x4 32-bit MCU Subsystem 48-MHz ARM® Cortex™-M0 CPU Up to 256KB flash and 32KB SRAM Programmable AFE1 Four opamps, configurable as PGAs, comparators, filters, etc. One 12-bit, 1-Msps SAR2 ADC CapSense® with SmartSense™ Auto-tuning One Cypress Capacitive Sigma-Delta™ (CSD) controller with touchpad capability Programmable Digital Logic Four Universal Digital Blocks (UDBs): custom digital peripherals Four configurable TCPWM3 blocks: 16-bit timer, counter or PWM Two configurable serial communication blocks (SCBs): I2C master or slave, SPI master or slave, or UART Packages 56-pin QFN, 68-pin CSP Bluetooth Smart Connectivity with Bluetooth 4.1 2.4-GHz BLE radio with integrated Balun 1 2 48 MHz BLE System Flash (Up to 256KB) SRAM (Up to 32KB) CSD Programmable Digital Blocks UDB4 x4 TCPWM3 x4 SCB5 x2 GPIO x8 GPIO x8 GPIO x8 GPIO x4 Datasheet Application Notes Sampling: Production: Document No. 001-89435 Rev. *G ADC Segment LCD Drive Availability 3 Timer, CMP x2 GPIO x8 SAR2 Serial Wire Debug Collateral Analog front end(s) Successive approximation register Advanced High-Performance Bus (AHB) CORTEX-M0 I/O Subsystem Programmable Interconnect and Routing Applications Now Now counter, pulse-width modulator; configurable as 16-bit timer, counter, pulse-width modulator blocks 5 Serial communication block configurable as I 2C/SPI/UART digital block 4 Universal CYPRESS CONFIDENTIAL 52 Asynchronous SRAM Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 53 Asynchronous SRAM Portfolio High Density | Wide Voltage Range | Automotive A, E1,2 | On-chip ECC3 4 Low-Power SRAM (MoBL®: More Battery Life) PowerSnooze™ Fast SRAM ECC3 Non-ECC ECC3 ECC3 Quad-SPI, ECC3 Other Densities NDA Required Contact Sales CY6218x 64Mb; 2.5, 3.0 V 55 ns; x8, x16 Ind5 Other Densities NDA Required Contact Sales Other Densities NDA Required Contact Sales Other Densities NDA Required Contact Sales 32Mb-128Mb Non-ECC CY7C107x 32Mb; 3.3 V 12 ns; x8, x16 Ind5 CY6217x 32Mb; 2.5, 3.0, 5.0 V 55 ns; x8, x16 Ind5 64Kb-1Mb 2Mb-16Mb CY7C106x 16Mb; 1.8, 3.3 V 10 ns; x8, x16, x32 Ind5 CY7C106x Q115 16Mb; 1.8-5.0 V 10 ns; x8, x16, x32 Ind5, Auto E2 CY6216x 16Mb;1.8, 3.0, 5.0 V 45 ns; x8, x16 Ind5, Auto A1 CY7C105x 8Mb; 3.3 V 10 ns; x8, x16 Ind5 CY7C1012 12Mb; 3.3 V 10 ns; x24 Ind5 CY7C104x 4Mb; 3.3, 5.0 V 10 ns; x4, x8, x16 Ind5, Auto A1, E2, RH6 CY7C1034 6Mb; 3.3 V 10 ns; x24 Ind5 CY7C1010/11 2Mb; 3.3 V 10 ns; x8, x16 Ind5, Auto A1, E2 CY7C1024 3Mb; 3.3 V 10 ns; x24 Ind5 CY6213x 2Mb; 1.8, 2.5-5.0 V 45 ns; x8, x16 Ind5, Auto A1, E2 CY7C1020 512Kb; 2.6, 3.3, 5.0V 10 ns; x16 Ind5, Auto E2 CY7C1019/21/100x 1Mb; 2.6, 3.3, 5.0 V 10 ns; x4, x8, x16 Ind5, Auto A1, E22 CY6212x 1Mb; 1.8, 2.5-5.0 V 45 ns; x8, x16 Ind5, Auto A1, E2 CY7C185 64Kb; 5.0 V 15 ns; x8 Ind5 CY7C19x/1399 256Kb; 3.3, 5.0 V 10 ns; x4, x8 Ind5, Auto A1 CY7C104x Q215 4Mb; 1.8-5.0 V 10 ns; x8, x16 Ind5, Auto E2 4 Fast 2 AEC-Q100 5 Industrial Document No. 001-89435 Rev. *G CY6216x Q115 16Mb; 1.8-5.0 V 45 ns; x8, x16, x32 Ind5, Auto E2 CY7S106x Q115 16Mb; 1.8-5.0 V 10 ns; x8, x16, x32 Ind5, Auto E2 CY6214x Q215 4Mb; 1.8-5.0 V 45 ns; x8, x16 Ind5, Auto E2 CY7S104x Q215 4Mb; 3.3 V 10 ns; x8, x16 Ind5, Auto E2 CY6215x 8Mb; 1.8, 3.0, 2.5-5V 45 ns; x8, x16 Ind5, Auto A1, E2 1 AEC-Q100 -40ºC to +85ºC -40ºC to +125ºC 3 Error-correcting code Serial SRAM CY6214x 4Mb; 1.8, 3.0, 2.5-5V 45 ns; x8, x16 Ind5, Auto A1, E2 CY6264 64Kb; 5.0 V 55 ns, 70 ns; x8 Ind5 CY62256 256Kb; 1.8, 3.0, 5.0V 55 ns; x8 Ind5, Auto A1, E2 SRAM with low-power sleep mode grade -40ºC to +85ºC 6 Radiation hardened, military grade -55ºC to +125ºC CYPRESS CONFIDENTIAL Production Sampling Development Concept Status Availability QQYY QQYY 54 Fast SRAM with ECC Applications Family Table Switches and routers IP phones Test equipment Automotive Computation servers Military and aerospace systems Features Density MPN Access Time 4Mb 8Mb 16Mb 32Mb CY7C104x CY7C105x CY7C106x CY7C107x 10 ns 10 ns 10 ns 12 ns Supply Current (Max. at 85ºC) 45 mA 60 mA 110 mA 150 mA Block Diagram Access time: 10 ns or 12 ns (see Family Table) Multiple bus-width configurations: x8, x16 and x32 Wide operating voltage range: 1.8-5.0 V Available in industrial and automotive temperature grades Industry-standard, RoHS-compliant packages Error-correcting code (ECC) to detect/correct single-bit errors Bit-interleaving to avoid multi-bit errors Error indication (ERR) pin to indicate single-bit errors Fast SRAM with ECC SRAM Array ECC Encoder Input Buffer x8, x16, x32 18-23 Address Data ERR I/O Mux Address Decoder Sense Amps SRAM Array ECC Decoder Control Logic CE WE BHE1 BLE2 Availability Collateral Preliminary Datasheet: OE Sampling: Production: Contact Sales 1 Document No. 001-89435 Rev. *G Byte high enable CYPRESS CONFIDENTIAL Now (16Mb), Q2 2015 (4Mb) Q1 2015 (16Mb), Q4 2015 (4Mb) 2 Byte low enable 55 3 ® MoBL SRAM with ECC Applications Family Table Programmable logic controllers Handheld devices Multifunction printers Automotive Implantable medical devices Computation servers Features Density MPN 4Mb 8Mb 16Mb 32Mb 64Mb 128Mb CY6214x CY6215x CY6216x CY6217x CY6218x CY6219x Standby Current (Max. at 85ºC) 8.7 µA 9 µA 16 µA 60 µA 60 µA 120 µA Standby Current (Typ. at 25ºC) 3.7 µA 5.3 µA 5.3 µA 8.5 µA 8.5 µA 17.0 µA Block Diagram Standby current: 16 µA for 16Mb (see Family Table) Multiple bus-width configurations: x8, x16 and x32 Wide operating voltage range: 1.8-5.0 V Available in industrial and automotive temperature grades Industry-standard, RoHS-compliant packages Error-correcting code (ECC) to detect/correct single-bit errors Bit-interleaving to avoid multi-bit errors Error indication (ERR) pin to indicate single-bit errors MoBL®3 SRAM with ECC SRAM Array ECC Encoder Input Buffer x8, x16, x32 18-23 Address Address Decoder Data ERR I/O Mux Sense Amps SRAM Array ECC Decoder Control Logic CE Collateral Preliminary Datasheet: OE WE BHE1 BLE2 Availability Sampling: Production: Contact Sales 1 Document No. 001-89435 Rev. *G Byte high enable CYPRESS CONFIDENTIAL Now (16Mb), Q2 2015 (4Mb) Q1 2015 (16Mb), Q4 2015 (4Mb) 2 Byte low enable 3 More Battery Life 56 Fast SRAM With PowerSnooze™ Applications Family Table Programmable logic controllers Handheld devices Multifunction printers Automotive Computation servers Features Density MPN 4Mb 8Mb 16Mb 32Mb CY7S104x CY7S105x CY7S106x CY7S107x 10 ns 10 ns 10 ns 12 ns Block Diagram Access time: 10 ns or 12 ns (see Family Table) PowerSnooze™: Additional power-savings (deep-sleep) mode Deep-sleep current: 23 µA for 16Mb (see Family Table) Multiple bus-width configurations: x8, x16 and x32 Wide operating voltage range: 1.8-5.0 V Available in industrial and automotive temperature grades Industry-standard, RoHS-compliant packages Error-correcting code (ECC) to detect/correct single-bit errors Bit-interleaving to avoid multi-bit errors Fast SRAM with PowerSnooze™ ECC Encoder Input Buffer Data Address 20 x8, x16, x32 Address Decoder SRAM Array Power Management Block (Enables PowerSnooze) Collateral I/O Mux ERR DS1 Preliminary Datasheet: Deep Sleep Current (Max. at 85ºC) 10 µA 22 µA 22 µA 92 µA Access Time Sense Amps ECC Decoder Control Logic CE OE WE BHE2 BLE3 Availability Sampling: Production: Contact Sales 1 Document No. 001-89435 Rev. *G Deep sleep CYPRESS CONFIDENTIAL Now (16Mb), Q2 2015 (4Mb) Q1 2015 (16Mb), Q4 2015 (4Mb) 2 Byte high enable 3 Byte low enable 57 Synchronous SRAM Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 58 Synchronous SRAM Portfolio High Random Transaction Rate (RTR)1 | Low Latency | High Bandwidth Standard Sync and NoBL™ Standard Sync and NoBL™ with ECC2 QDR® -II/ DDR-II QDR-II+/ DDR-II+ QDR-II+X/ DDR-II+X QDR-IV Max RTR1: 250 MT/s Max BW: 18 Gbps Latency: 1 Cycle Pipeline and Flow-through Modes Max RTR1: 250 MT/s Max BW: 18 Gbps Latency: 1 Cycle Pipeline and Flow-through Modes Max RTR1: 666 MT/s Max BW: 47.9 Gbps Latency: 1.5 Cycles CIO3 and SIO4 Max RTR1: 666 MT/s Max BW: 79.2 Gbps Latency: 2 or 2.5 Cycles CIO3and SIO4, ODT5 Max RTR1: 900 MT/s Max BW: 91.1 Gbps Latency: 2.5 Cycles SIO4, ODT5 Max RTR1: 2.1 GT/s Max BW: 153.5 Gbps Latency: 5 or 8 Cycles Dual-Port Bidirectional ODT5 CY7C161/2xKV18 144Mb; 250-333 MHz 1.8 V; x9, x18, x36 Burst 2, 4 CY7Cx4/5/6/7xKV18 144Mb; 300-550 MHz 1.8 V; x18, x36 Burst 2, 4 NEW CY7C151/2xKV18 72Mb; 250-333 MHz 1.8 V; x9, x18, x36 Burst 2, 4 CY7Cx54/5/6/7KV18 72Mb; 250-550 MHz 1.8 V; x18, x36 RH6; Burst 2, 4 CY7C156/7xXV18 72Mb; 366-633 MHz 1.8 V; x18, x36 Burst 2, 4 NEW CY7C141/2xKV18 36Mb; 250-333 MHz 1.8 V; x8, x9, x18, x36 Burst 2, 4 CY7Cx24/5/6/7xKV18 36Mb; 400-550 MHz 1.8 V; x18, x36 Burst 2, 4 CY7C126/7x 36Mb; 366-633 MHz 1.8 V; x18, x36 Burst 2, 4 NEW CY7C131/2/9xKV18 18Mb; 250-333 MHz 1.8 V; x8, x18, x36 Burst 2, 4 CY7Cx14/5/6/7xKV18 18Mb; 400-550 MHz 1.8 V; x18, x36 Burst 2, 4 Density CY7C147/8xB 72Mb; 133-250 MHz 2.5, 3.3 V; x18, x36 CY7C144/6xA 36Mb; 133-250 MHz 2.5, 3.3 V; x36, x72 CY7C137/8xD 18Mb; 100-250 MHz 3.3 V; x18, x32, x36 72Mb with ECC2 133-250 MHz 2.5, 3.3 V; x18, x36, x72 Contact Sales 36Mb with ECC2 133-250 MHz 2.5, 3.3 V; x18, x36 Contact Sales 18Mb with ECC2 100-250 MHz 2.5, 3.3 V; x18, x36 Contact Sales CY7C135/6xC 9Mb; 100-250 MHz 3.3 V; x18, x32, x36 Auto E7 NEW CY7C41xKV13 144Mb; 667-1066 MHz 1.3 V; x18, x36 Burst 2 NEW CY7C40xKV13 72Mb; 667-1066 MHz 1.3 V; x18, x36 Burst 2 CY7C1911xKV18 18Mb; 250-333 MHz 1.8 V; x9 Burst 2, 4 CY7C134/2xG 2,4Mb; 100-250 MHz 3.3 V; x18, x32, x36 Random Transaction Rate 1 Rate of truly random accesses to memory, expressed in transactions per second (MT/s, GT/s) Document No. 001-89435 Rev. *G 2 Error-correcting 3 Common I/O 4 Separate I/O code 5 On-die termination; parts are CY7C2x hardened, military grade 7 AEC-Q100 -40ºC to +125ºC 6 Radiation CYPRESS CONFIDENTIAL Production Sampling Development Concept Status Availability QQYY QQYY 2 59 QDR-IV Product Overview Family Table Switches and routers High-performance computing Military and aerospace systems Test and measurement Density MPN Max Freq RTR QDR-IV HP 72Mb 144Mb CY7C40x1KV13 CY7C41x1KV13 667 MHz 1,334 MT/s QDR-IV XP 72Mb 144Mb CY7C40x2KV13 CY7C41x2KV13 1,066 MHz 2,132 MT/s Block Diagram Available in two options: QDR-IV HP (RTR 1,334 MT/s) and QDR-IV XP (RTR 2,132 MT/s) Two independent, bidirectional DDR1 data ports Error-correcting code (ECC) to reduce soft error rate to less than 0.01 Failure-in-Time (FIT) per megabit Bus inversion to reduce simultaneous switching I/O noise On-die termination (ODT) to reduce board complexity De-skew training to improve signal-capture timing I/O levels: 1.2-1.25 V (HSTL/SSTL), 1.1-1.2 V (POD2) Package: 361-pin FCBGA3 Bus widths: x18, x36 Address/ Control Clock QDR-IV Data Valid x2 x18, x36 Data Port A x2 x2 Control Logic Control x4 x2 Data Clocks Data Valid x18, x36 Data Port B x2 Bus Inversion Test Engine JTAG Interface Availability Contact Sales Data Rate: two data transfers per clock cycle Document No. 001-89435 Rev. *G Address Interface SRAM Array Impedance Matching 1 Double x21,x22 x2 ODT Preliminary Datasheet: Address Parity Parity Error ECC Data Clocks x2 Bus Inversion Collateral Bus Address Inversion Port x2 Data Port A (HSTL/SSTL or POD) Features Option Data Port B (HSTL/SSTL or POD) Applications Sampling: Production: 2 Pseudo Now Now open drain: Signaling interface that uses strong pull-down and weak pull-up drive strength CYPRESS CONFIDENTIAL 3 Flip-chip ball grid array 3 60 Nonvolatile RAM Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 61 nvSRAM Portfolio High Density | High Speed I2C nvSRAM SPI nvSRAM SPI nvSRAM CY14V116F/G 16Mb; 3.0, 1.8 V I/O 30 ns; ONFI3 1.0 x8, x16; Ind1 CY14B116R/S 16Mb; 3.0 V 25, 45 ns; x32; Ind1 RTC2 Higher Densities DDRx6 nvSRAM NDA Required Contact Sales CY14B108K/L 8Mb; 3.0 V 25, 45 ns; x8; Ind1 RTC2 CY14B108M/N 8Mb; 3.0 V 25, 45 ns; x16; Ind1 RTC2 CY14B116K/L 16Mb; 3.0 V 25, 45 ns; x8; Ind1 RTC2 CY14B116M/N 16Mb; 3.0 V 25, 45 ns; x16; Ind1 RTC2 CY14B104K/LA 4Mb; 3.0 V 25, 45 ns; x8; Ind1 RTC2 CY14V104LA 4Mb; 3.0, 1.8 V I/O 25, 45 ns; x8; Ind1 CY14B104M/NA 4Mb; 3.0 V 25, 45 ns; x16; Ind1 RTC2 CY14V104NA 4Mb; 3.0, 1.8 V I/O 25, 45 ns; x16; Ind1 CY14V101PS 1Mb; 3.0, 1.8 V I/O 108 MHz QSPI5; Ind1 Ext. Ind7; RTC2 CY14V101QS 1Mb; 3.0, 1.8 V I/O 108 MHz QSPI5; Ind1 Ext. Ind7 CY14B101I 1Mb; 3.0 V 3.4 MHz I2C; Ind1 RTC2 CY14B101KA/LA 1Mb; 3.0 V 25, 45 ns; x8; Ind1 RTC2 CY14V101LA 1Mb; 3.0, 1.8 V I/O 25, 45 ns; x8; Ind1 CY14B101MA/NA 1Mb; 3.0 V 25, 45 ns; x16; Ind1 RTC2 CY14V101NA 1Mb; 3.0, 1.8 V I/O 25, 45 ns; x16; Ind1 CY14B101P 1Mb; 3.0 V 40 MHz SPI; Ind1 RTC2 CY14B512P 512Kb; 3.0 V 40 MHz SPI; Ind1 RTC2 CY14B512I 512Kb; 3.0 V 3.4 MHz I2C; Ind1 RTC2 CY14B256KA/LA 256Kb; 3.0 V 25, 45 ns; x8; Ind1 RTC2 CY14V/U256LA 256Kb; 3.0, 1.8V I/O 35 ns; x8; Ind1 CY14E256LA 256Kb; 5.0 V 25, 45 ns; x8; Ind1 STK14C88-5 256Kb; 5.0 V 35, 45 ns; x8; Mil4 CY14B256P 256Kb; 3.0 V 40 MHz SPI; Ind1 RTC2 CY14B256I 256Kb; 3.0 V 3.4 MHz I2C; Ind1 RTC2 STK11C68-5 64Kb; 5.0 V 35, 55 ns; x8; Mil4 STK12C68-5 64Kb; 5.0 V 35, 55 ns; x8; Mil4 CY14B064P 64Kb; 3.0 V 40 MHz SPI; Ind1 RTC2 CY14B064I 64Kb; 3.0 V 3.4 MHz I2C; Ind1 RTC2 64Kb - 256Kb 512Kb - 16Mb ParallelParallel nvSRAM nvSRAM grade −40ºC to +85ºC clock 3 Open NAND flash interface 4 2 Real-time 5 Document No. 001-89435 Rev. *G NEW Military grade −55ºC to +125ºC Quad serial peripheral interface 6 Double Data Rate 1 Industrial Higher Densities QSPI5 nvSRAM NDA Required Contact Sales 7 NEW Extended Industrial grade −40ºC to +105ºC CYPRESS CONFIDENTIAL Production Sampling Development Concept Status Availability QQYY QQYY 62 F-RAM Portfolio Low Power | High Endurance 512Kb - 8Mb FM25H20/V20 2Mb; H20: 2.7-3.6 V V20: 2.0-3.6 V 40 MHz SPI; Ind1 Processor Companion I2C F-RAM SPI F-RAM Wireless Memory Parallel F-RAM NEW FM22L16/LD16 4Mb; 2.7-3.6 V 55 ns; x8; Ind1 CY15B104Q 4Mb; 2.0-3.6 V 40 MHz SPI; Ind1 NEW CY15B102Q 2Mb; 2.0-3.6 V 25 MHz SPI; Auto E3 FM25V10/VN10 1Mb; 2.0-3.6 V 40 MHz SPI; Ind1, Auto A2 NEW FM25V05 512Kb; 2.0-3.6 V 40 MHz SPI; Ind1, Auto A2 4Kb - 256Kb FM28V202A 2Mb; 2.0-3.6 V 60 ns; x16; Ind1 FM28V102A 1Mb; 2.0-3.6 V 60 ns; x16; Ind1 FM24V10/VN10 1Mb; 2.0-3.6 V 3.4 MHz I2C; Ind1 FM24V05 512Kb; 2.0-3.6 V 3.4 MHz I2C; Ind1 FM25V02/W256 256Kb; V02: 2.0-3.6 V W256: 2.7-5.5 V 40 MHz SPI; Ind1, Auto A2 FM24V02/W256 FM33256 256Kb; V02: 2.0-3.6 V 256Kb; 3.3V; 16 MHz SPI W256: 2.7-5.5 V Ind1; RTC4; Power Fail 3.4 MHz I2C; Ind1, Auto A2 Watchdog; Counter FM25V01 128Kb; 2.0-3.6 V 40 MHz SPI; Ind1, Auto A2 FM24V01 128Kb; 2.0-3.6 V 3.4 MHz I2C; Ind1, Auto A2 FM31256/31(L)278 256Kb; 3.3, 5.0V; 1 MHz I2C; Ind1; RTC4; Power Fail; Watchdog; Counter FM25640/CL64 64Kb; 3.3, 5.0 V 20 MHz SPI; Ind1, Auto E3 FM24C64/CL64 64Kb; 3.3, 5.0 V 1 MHz I2C; Ind1, Auto E3 FM3164/31(L)276 64Kb; 3.3, 5.0 V; 1 MHz I2C; Ind1; RTC4; Power Fail; Watchdog; Counter FM25C160/L16 16Kb; 3.3, 5.0 V 20 MHz SPI; Ind1, Auto E3 FM24C16/CL16 16Kb; 3.3, 5.0 V 1 MHz I2C; Ind1 FM25040/L04 4Kb; 3.3, 5.0 V 20 MHz SPI; Ind1, Auto E3 FM24C04/CL04 4Kb; 3.3, 5.0 V 1 MHz I2C; Ind1 Industrial grade −40ºC to +85ºC −40ºC to +85ºC 3 AEC-Q100 −40ºC to +125ºC 1 4 Real-time CY15B102N 2Mb; 2.0-3.6 V 60 ns; x16; Auto A2 FM28V020 256Kb; 2.0-3.6 V 70 ns; x8; Ind1 FM18W08 256Kb; 2.7-5.5 V 70 ns; x8; Ind1 FM1808B 256Kb; 5.0 V 70 ns; x8; Ind1 FM16W08 64Kb; 2.7-5.5 V 70 ns; x8; Ind1 Production Sampling Development Concept clock 2 AEC-Q100 Document No. 001-89435 Rev. *G Wireless Memory NDA Required Contact Sales NEW CY15B101N 1Mb; 2.0-3.6 V 60 ns; x16; Auto A2 Status Availability CYPRESS CONFIDENTIAL QQYY QQYY 63 16Mb Parallel nvSRAM Applications Block Diagram Industrial automation Programmable logic controllers Gaming machines Industrial data logging Networking and storage Telecom equipment VCAP4 16Mb Parallel nvSRAM Control Features 3 Control Logic Fast access time (25 ns) Available in parallel and Open NAND Flash Interface (ONFI) version 1.0 interfaces Unlimited write endurance One million store cycles on power fail Twenty-year data retention at 85ºC Optional real-time clock (RTC) functionality Industrial temperature range: -40°C to +85°C Packages: 44-TSOP II, 48-TSOP I, 54-TSOP II, 165-FBGA Data XIN1 XOUT2 INT3 Store/Recall Control SRAM Array x32 HSB5 Recall I/O Control RTC Power Control SONOS Array Store Address Decoder Software Command Detect x21 Address Collateral Availability Final Datasheets: 16Mb nvSRAM Datasheets Sampling: Production: Now Now 1 4 2 5 Crystal connection input Crystal connection output 3 Interrupt output/calibration/square wave Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL External capacitor connection Hardware STORE busy 64 1Mb Quad SPI nvSRAM Applications Block Diagram Computing and networking Industrial automation RAID storage VCAP2 1Mb Quad SPI nvSRAM Store Control 2 Features QSPI I/Os Quad SPI interface: 108 MHz Unlimited write endurance One million store cycles on power fail Data retention of 20 years at 85°C Operating voltages: 3.0 V, 1.8-V I/O Low standby (280-µA) and sleep (10-µA) currents Industrial temperature range: -40°C to +85°C Extended Industrial temperature range: -40°C to +105°C Integrated, high-accuracy real-time clock (RTC) Package: 16-SOIC Control Logic Store/Recall Control SRAM Array I/O Control Recall Software Command Detect XIN1 XOUT1 RTC VRTC HSB3 Availability Collateral Preliminary Datasheet: Contact Sales Sampling: Production: 1 2 Document No. 001-89435 Rev. *G 4 Power Control SONOS Array Q2 2015 Q3 2015 Crystal connections External capacitor connection CYPRESS CONFIDENTIAL 3Hardware store busy 65 4Mb SPI Serial F-RAM Applications Block Diagram Multifunction printers Industrial controls and automation Medical wearables Test and measurement equipment Smart meters 4Mb SPI Serial F-RAM Control 4 Instruction Register Features 40-MHz SPI interface 100-trillion read/write cycle endurance Operating voltage range: 2.0-3.6 V Low (8-µA) sleep current 100-year data retention Industrial temperature range: -40°C to +85°C Packages: 8-pin TDFN, 8-pin SOIC F-RAM Array Address Register Serial Input Data I/O Register Serial Output Status Register Collateral Availability Preliminary Datasheet: Contact Sales Sampling: Production: Document No. 001-89435 Rev. *G Control Logic CYPRESS CONFIDENTIAL Q2 2015 Q4 2015 66 Timing Solutions Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 67 Timing Solutions Portfolio Programmable | High-Performance | EMI Reduction | Automotive Clock Generators Application Specific Non-EMI Reduction NEW 4-PLL Clock Generator Max. Frequency: 700 MHz 0.7-ps RMS Jitter1 Contact Sales NEW 2-PLL Clock Generator Max. Frequency: 700 MHz 0.7-ps RMS Jitter1 Contact Sales CY2Xx (FleXO™) Max. Frequency: 690 MHz 1 output; Frequency Margining 0.6-ps RMS Jitter1; Ind2 CY254x/CY251x Max. Frequency: 166 MHz 3-9 outputs; 1-4 PLL; I2C 100-ps CCJ3; Ind2 CY2239x/CY229x/CY2238x Max. Frequency: 200 MHz 3-6 outputs; 3-4 PLL; I2C 400-ps CCJ3; Ind2; Auto E4 CY22800/801 Max. Frequency: 166 MHz 3 outputs; 1 PLL 250-ps CCJ3; Ind2 CY22050/150 Max. Frequency: 200 MHz 3-6 outputs; 1 PLL 250-ps CCJ3; Ind2 Standard Performance High Performance EMI Reduction Clock Buffers NEW PCIe 3.0 Clock Generator Max. Frequency: 700 MHz 0.7-ps RMS Jitter1 Contact Sales NEW CY24293A Max. Frequency: 200 MHz 2 outputs; 1 PLL; PCIe 1.1 75-ps CCJ3; Auto A5 Non-Zero Delay Buffer (NZDB) NEW Programmable XO/VCXO Max. Frequency: 2.1 GHz 0.15-ps RMS Jitter1 NDA Required; Contact Sales CY2DLx/DMx/DPx/CPx Max. Frequency: 1.5 GHz 2-10 outputs; LVDS, LVPECL, CML 0.05-ps RMS Jitter1; Ind2 CY230x/EP0x Max. Frequency: 220 MHz 5-9 outputs; LVCMOS 22-ps CCJ3; Ind2; Auto A5 CY230xNZ Max. Frequency: 133 MHz 4-18 outputs; LVCMOS 250-ps CCJ3; Ind2 CY23FS04/08 Max. Frequency: 200 MHz 4-8 outputs; Fail Safe6 200-ps CCJ3; Ind2 Q115 CY23S02/05/08/09/FP12 Max. Frequency: 200 MHz 2-12 outputs; Spread Aware 200-ps CCJ3; Ind2 CY7B99x (RoboClock™) Max. Frequency: 200 MHz 8-18 outputs; Configurable Skew 50-ps CCJ3; Ind2 CY2429x Max. Frequency: 200 MHz 2-4 outputs; PCIe 1.1 75-ps CCJ3; Ind2 1 4 2 Industrial 5 AEC-Q100: Integrated phase noise across 12-kHz to 20-MHz offset grade -40ºC to +85ºC 3 Cycle-to-cycle jitter Document No. 001-89435 Rev. *G Zero Delay Buffer (ZDB) AEC-Q100: -40ºC to +125ºC -40ºC to +85ºC 6 Automatic clock switching on failure of a clock source CYPRESS CONFIDENTIAL Production Sampling Development Concept Status Availability QQYY QQYY 68 PCI Express Clock AEC-Q100 (CY24293A) Applications Block Diagram Automotive infotainment systems PCI Express Clock XIN1 XOUT2 Features Out1P Oscillator Block Out1N PLL Two sets of differential PCIe 1.1 clocks Pin-selectable output frequencies Two HCSL outputs Spread-spectrum capability Cycle-to-cycle jitter <75 ps FS03 FS13 Collateral Availability Preliminary Datasheet: Contact Sales Sampling: Production: Control Logic Out2P Out2N Now Q1 2015 1 Crystal input output 3 Frequency select inputs 2 Crystal Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 69 Specialty Memory Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 70 Specialty Memory Portfolio Intelligent Memory | High Density | High Throughput Dual-Port SRAM Asynchronous FIFO Synchronous Asynchronous Synchronous 2 Mb-72 Mb CYFB0072V4 72Mb; 1.8, 3.3 V 133 MHz x36; Ind1 CYD02/9/18/36SxxV18 22Mb, Mb, 99Mb, Mb, 18 Mb,36Mb; 36 Mb;1.8 1.8VV 18Mb, 167 MHz, 200 MHz x18, x36, x72; Ind1 CYFX18V/36V/72V 18Mb, 36Mb, 72Mb; 1.8, 3.3 V 100 MHz, 133 MHz x9 to x36 Prog3; Ind1 2 Kb-64 Kb 128 Kb-1 Mb CY7C083x/5x 2Mb, 4Mb, 9Mb, 18Mb; 3.3 V 100 MHz, 133 MHz, 167 MHz x18, x36, x72; Ind1 CY7C02x/3x/5x 512Kb, 1Mb; 3.3, 5.0 V 12 ns, 15 ns, 20 ns, 25 ns x8, x16, x18, x36; Ind1 CY7C09279/289/389/579 512Kb, 1Mb; 3.3 V 7, 9, 12 ns; 83 MHz, 100 MHz x8, x16, x18, x36; Ind1 CY7C4275/81/85/91 512Kb, 1Mb; 3.3 V 67 MHz, 100 MHz x9, x18; Ind1 CY7C006/025/026 128Kb, 256Kb; 3.3, 5.0 V 15 ns, 20 ns, 25 ns, 55 ns x8, x16, x18; Ind1 CY7C09269/369 256Kb; 3.3 V 9 ns, 12 ns x16, x18; Ind1 CY7C4255/61/65/71 128Kb, 256Kb; 3.3, 5.0 V 67 MHz, 100 MHz x9, x18; Ind1 CY7C024/144 64Kb; 3.3, 5.0 V 15 ns, 20 ns, 25 ns, 55 ns x8, x16, x18; Ind1 CY7C09159/349 64Kb; 3.3 V 9 ns, 12 ns x9, x18; Comm2 CY7C421 4Kb; 5.0 V 15 ns, 20 ns x9; Ind1 CY7C13x 8Kb, 16Kb, 32Kb; 5.0 V 15 ns, 25 ns, 55 ns x8; Ind1 1 Industrial grade: -40ºC to +85ºC Commercial grade: 0ºC to +70ºC 3 Programmable bus width CY7C4201/11 2Kb, 4Kb; 3.3 V 67 MHz x9; Ind1 4 Document No. 001-89435 Rev. *G Production Sampling Development Concept CYFB denotes Video Frame Buffer products Status Availability 2 CYPRESS CONFIDENTIAL QQYY QQYY 71 Trackpad Module Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 72 Windows Trackpad Modules Chrome Trackpad Modules Modules for Embedded Systems Gen5 Windows PTP1 Module 5-Finger Detection/Communication PS2/I2C 60-Vpp2 Charger Armor3 Gen5 Chrome Module 5-Finger Detection/Communication I2C 60-Vpp2 Charger Armor3 Gen6 Trackpad Module 5-Finger Gesture4 I2C Max Size5: 120 x 75 mm Gen5 Windows Module NDA Required Contact Sales Gen6 Chrome Module Q215 5-Finger Detection/Communication I2C 35-Vpp2 Charger Armor3 Gen2 Module 2-Finger Gesture4 I2C Max Size5: 90 x 50 mm Windows Driver 5-Finger Gesture4 Windows XP/7/8/8.1 Compatible User Configuration GUI9 Chrome Driver 5-Finger Detection/Communication MT-B Compliant, Linux Wireless Modules Software Gen4 + KB6 + RF7 Module 5-Finger Gesture4 and KB6 Scan I2C Max Size5: 125 x 125 mm Gen4 + KB6 + BLE8 Module NDA Required Contact Sales Self Capacitance Mutual Capacitance Cypress Module Portfolio Q115 EZ-BLE Module Bluetooth 4.1 Certified FCC, CE, KC, TELEC,IC Certified I2C, SPI, UART, CapSense Size: 10 x 10 x 1.8 mm Production Sampling Development Concept frequency (2.4-GHz wireless) Status Low Energy, also known as Bluetooth Smart 9 Graphical user interface QQYY QQYY Availability 1 Microsoft 4 Gesture 7 Radio 2 Noise 5 Maximum 8 Bluetooth Precision Touchpad voltage peak to peak 3 System noise detection and reduction Document No. 001-89435 Rev. *G processing active sensing area 6 Keyboard CYPRESS CONFIDENTIAL 73 Gen5 Chrome Module Application Block Diagram Host Processor Chromebook PCs 2 I2C Clock/Data INT4 Gen5 Chrome Module Features CY8CTMA545 Mechanical Construction Maximum active sensing area of 125 mm x 70 mm Minimum of 1.3 mm total module thickness Clickpad1 and standard2 configurations Overlay assembly and lamination available I2C AHB-Lite5 Flash 116 Channel Engine Touch Sequencer 10-V Tx Pump Rx Channels Programmable Analog Multiplexer 36 Trackpad Sensor I/O: XY00-XY35 Trackpad Sensor Availability Contact Sales Production: 1 Trackpad 4 Interrupt 2 Trackpad 5 Advanced with integrated mechanical button with support for external mechanical button inputs 3 Noise voltage peak to peak Document No. 001-89435 Rev. *G SRAM 116 AHB-Lite5 Product Support On-site support for customer product introduction available Incoming/outgoing test equipment available to customers Datasheet: AHB-Lite5 ARM Cortex-M0 116 Advanced Processing 60-Vpp3 charger noise immunity (1-500 kHz, 9-mm finger) 32-bit ARM® Cortex™-M0 core for more processing power I2C communication interface Report rates up to 150 Hz Five-finger detection and communication Low-power, look-for-touch active mode Google-qualified multi-touch Cypress driver Compatible with Google Multi-touch Protocol B (MT-B) Collateral 116 AHB-Lite5 Now High-Performance Bus Lite CYPRESS CONFIDENTIAL 74 Gen6 Chrome Module Application Block Diagram Host Processor Chromebook PCs 2 I2C Clock/Data INT4 Gen6 Chrome Module Features CY8CTMA445A Mechanical Construction Maximum active sensing area of 120 mm x 75 mm Minimum of 1.3 mm total module thickness Clickpad1 and standard2 configurations Overlay assembly and lamination available I2C AHB-Lite5 Flash 116 Touch Sequencer 5-V Tx Pump Rx Channels Programmable Analog Multiplexer 36 Trackpad Sensor I/O: XY00-XY35 Trackpad Sensor Availability Contact Sales Sampling: Production: 1 Trackpad 4 Interrupt 2 Trackpad 5 Advanced with integrated mechanical button with support for external mechanical button inputs 3 Noise voltage peak to peak Document No. 001-89435 Rev. *G SRAM 116 AHB-Lite5 Product Support On-site support for customer product introduction available Incoming/outgoing test equipment available to customers Preliminary Datasheet: AHB-Lite5 ARM Cortex-M0 116 Advanced Processing 35-Vpp3 charger noise immunity (1-500 kHz, 9-mm finger) 32-bit ARM® Cortex™-M0 core for more processing power I2C communication interface Report rates up to 150 Hz Five-finger detection and communication Low-power, look-for-touch active mode Google-qualified multi-touch Cypress driver Compatible with Google Multi-touch Protocol B (MT-B) Collateral 116 AHB-Lite5 Q2 2015 Q3 2015 High-Performance Bus Lite CYPRESS CONFIDENTIAL 75 Gen5 Windows PTP1 Module Application Block Diagram Host Processor INT5 I2C/PTP1 Only Windows PCs CY8CTMA545 Mechanical Construction Maximum active sensing area of 125 mm x 70 mm Minimum of 1.3 mm total module thickness Clickpad2 and standard3 configurations Overlay assembly and lamination available PS2/I2C AHB-Lite6 116 AHB-Lite6 Flash AHB-Lite6 ARM Cortex-M0 SRAM 116 116 Advanced Processing 60-Vpp4 charger noise immunity (1-500 kHz, 9-mm finger) 32-bit ARM Cortex-M0 core for more processing power Dual bus interface PS2 and I2C/PTP1 Report rates of up to 150 Hz Enhanced palm rejection Five-finger detection and communication Low-power, look-for-touch active mode Windows driver support for XP/Vista/7/8/8.1 Product Support On-site support for customer product introduction available Incoming/outgoing test equipment available to customers AHB-Lite6 116 Channel Engine Touch Sequencer 10-V Tx Pump Rx Channels Programmable Analog Multiplexer 36 Trackpad Sensor I/O: XY00-XY35 Trackpad Sensor Collateral Availability Contact Sales Production: 1 Microsoft 4 2 Trackpad 5 Precision Touchpad with integrated mechanical button 3 Trackpad with support for external mechanical button inputs Document No. 001-89435 Rev. *G PS2 and I2C Clock/Data Gen5 Windows PTP1 Module Features Datasheet: 4 Now Noise voltage peak to peak Interrupt 6 Advanced High-Performance Bus Lite CYPRESS CONFIDENTIAL 76 Gen4 + KB1 + RF2 Module Wireless Trackpad + Keyboard Solution Applications Block Diagram External keyboard and trackpad Standalone trackpad Remote control and trackpad Tablet keyboard dock and trackpad Gen4 + KB1 + RF2 Module Features Antenna Mechanical Construction Maximum active sensing area of 125 mm x 125 mm Clickpad3 and standard4 configurations Overlay assembly and lamination available Advanced Processing 32-bit ARM Cortex-M0 core for more processing power Five-finger detection and communication Software-free solution allowing fast time-to-market Embedded gesture detection Six configurable power modes 2.4-GHz wireless communication Cypress PSoC4A supporting keyboard scan Optional LED control Product Support Simplification of OEM/ODM supply chains Incoming/outgoing test equipment available to customers Collateral Datasheet: WUSB-NX PSoC4 4 30 Keyboard GPIO: XY00-XY29 Keyboard Matrix I2C 2 INT5 Mechanical Buttons Gen4 Trackpad Controller 65 GPIO Trackpad Sensor I/O: XY00-XY64 LEDs GPIO Trackpad Sensor Availability Contact Sales Production: 1 Keyboard 4 Trackpad 2 Radio 5 Interrupt frequency (2.4-GHz wireless) 3 Trackpad with integrated mechanical button Document No. 001-89435 Rev. *G SPI Now with support for external mechanical button inputs CYPRESS CONFIDENTIAL 77 EZ-BLE Bluetooth Low Energy Module using PRoC BLE Applications Block Diagram BLE1 connectivity Medical Industrial PC Accessories Toys Smartphone Accessories Power/ Ground 4 CYBLE-022001-00 32.768 kHz Crystal SWD8/ GPIO 14 2 PRoC BLE Features 24 MHz Crystal Qualification and Certification Bluetooth SIG certified QDID2 FCC3, CE4, KC5, TELEC6 and IC7 Small Footprint 10 mm x 10 mm X 1.8 mm, 21-pad LGA (including shield) Bluetooth Smart connectivity with Bluetooth 4.1 2.4-GHz BLE radio and baseband -91-dBm Rx sensitivity, +3-dBm Tx output power Power Modes 1.3-µA Deep-Sleep, 150-nA Hibernate, 60-nA Stop Highly Integrated Solution 2 crystals, chip antenna, passives, shield Adapter board interface to CY8CKIT-042-BLE Pioneer kit Enables testing of CapSense, buttons, GPIOs, OTA XRES SPI/ I2C/ UART/ CapSense/ ADC/ PWM Chip Antenna Collateral EZ-BLE Module Datasheet: PRoC BLE Datasheet: Getting Started Application Note: PSoC Creator: PSoC Programmer: CySmart Windows Host Emulation Tool: CySmart iOS and Android apps: Coming February Click here February Click here Click here Click here Click here Availability Sampling: Production: Mar 2015 Q2 2015 1 Bluetooth 4 Conformité 7 Industry 2 Bluetooth 5 Korea 8 Low Energy, also known as Bluetooth Smart Special Interest Group Qualification Design ID 3 Federal Communications Commission Document No. 001-89435 Rev. *G Européenne (Europe) Certification 6 Telecom Engineering Center (Japan) CYPRESS CONFIDENTIAL Canada Serial wire debug communication protocol 78 Aerospace Memory Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 79 Aerospace Memory Portfolio Radiation Hardened | Latch-up Immune | QML-V1 Certified Fast Async SRAM 128 Mb - 144 Mb Non-ECC2 ECC2 Sync SRAM Nonvolatile SRAM QDR®-II+ Parallel I/O FRAM Serial I/O Parallel I/O CYRS15x102 2Mb; 2.0-3.6 V 40 MHz; SPI CYRS15x102 2Mb; 2.0-3.6 V 60 ns; x16 CYRS264x 144Mb; 1.8 V; 450 MHz x18, x36; Burst 2,4 CYRS109x 128Mb; 1.8-5.0 V 12 ns; x8, x16, x32 16 Mb – 72 Mb CYRS154x 72Mb; 1.8 V; 250 MHz x18, x36; Burst 2,4 CYRS108x 64Mb; 1.8-5.0 V 12 ns; x8, x16, x32 CYRS14x164 64Mb; 1.8-5.0 V 35 ns; x16, x32 NEW CYRS106x 16Mb; 1.8-5.0 V 10 ns; x8, x16, x32 CYRS14x116 16Mb; 1.8-5.0 V 35 ns; x16, x32 Q316 2 Mb – 4 Mb CYRS104x 4Mb; 3.3 V 12 ns; x8 1 2 Qualified Manufacturers List Level V, per military specification MIL-PRF-38535 Error-correcting code Production Sampling Development Concept Status Availability Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL QQYY QQYY 80 72Mb QDR®-II+ SRAM with RadStop™1 Block Diagram Applications Payload processing Reconfigurable computing platforms Address Port x21,x22 Features QDR-II+ CQ K CQ Write Data Port x18, x36 Read Data Port (HSTL) Data Clocks Address Interface K Write Data Port (HSTL) Max frequency of operation/throughput: 250 MHz/36 Gb/s Burst sizes: 2, 4 Bus-width configurations: x18, x36 Military temperature grade: −55ºC to +125ºC Two independent unidirectional data ports for read and write enable concurrent transactions Maximum throughput with double data rate (DDR) data ports Output impedance matching input (ZQ): Matches the device outputs to system data bus impedance Bit-interleaving to eliminate multi-bit errors I/O signaling standards: 1.5-1.8 V (HSTL) Controller available for Xilinx and Microsemi FPGAs Total ionizing dose: 300 Krad Heavy-ION SEL2: 120 LET3 MeV-cm sq/mg Heavy-ION SEU4: 1.34E-07 (Geosynchronous) Error/Bit-day QML-V5 qualified (DSCC6 part number: 5962F11201/202VXA) SRAM Array ZQ Output Impedance Matching Control Logic 7 Control Availability Datasheets : 72-Mbit SRAMs w/ RadStop™ Technology Request FPGA controller via email: [email protected] Non-space-qualified prototypes (CYPT154x): QML-V5 space-qualified devices (CYRS154x): 4 2 proprietary design and process technology that increases radiation-resistance Single-event latch-up 3 Linear energy transfer 5 Document No. 001-89435 Rev. *G QVLD Data Valid Read Data Port x18, x36 Boundary Scan Collateral 1 Cypress’s Echo Clocks JTAG Interface Now Now Single-event upset Qualified Manufacturers List Level V, per military specification MIL-PRF-38535 6 Defense Supply Center, Columbus, is an inventory control point of the Defense Logistics Agency CYPRESS CONFIDENTIAL 81 4Mb Fast SRAM with RadStop™1 Block Diagram Applications Payload processing Sensors and switches Features Fast SRAM Access time: 10 ns (85ºC), 12 ns (125ºC) Bus-width configuration: x8 Operating voltage: 3.3 V Military temperature grade: −55ºC to +125ºC Bit-interleaving to eliminate multi-bit errors Package: 36-pin ceramic flat pack (CFP) Total ionizing dose: 300 Krad Heavy-ION SEL2: 120 LET3 MeV-cm sq/mg Heavy-ION SEU4: 5.0E-08 (Geosynchronous) Error/Bit-day QML-V5 qualified (DSCC6 part number: 5962F11235VXA) Address Port x18 Address Decoder SRAM Array Sense Amps OE x8 WE Collateral Availability Cypress Datasheet: 4-Mbit SRAM w/ RadStop™ Technology DSCC Datasheet: 4-Mbit SRAM w/ RadStop™ Technology Non-space-qualified prototypes (CYPT1049): QML-V5 space-qualified devices (CYRS1049): 1 Proprietary 4 2 5 Document No. 001-89435 Rev. *G Data Port Control Logic CE Cypress design and process technology that increases radiation-resistance Single-event latch-up 3 Linear energy transfer I/O MUX Now Now Single-event upset Qualified Manufacturers List Level V, per military specification MIL-PRF-38535 6 Defense Supply Center, Columbus, is an inventory control point of the Defense Logistics Agency CYPRESS CONFIDENTIAL 82 Automotive Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 83 Automotive TrueTouch® Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 84 Automotive Portfolio: TrueTouch® Gen4 CY8CTMA884 60 I/O, 10 F1, 65-Hz RR2 Gestures, Mutual-Capacitance3 Grades: A4 and E5 CY8CTMA616 50 I/O, 10 F1, 65-Hz RR2 Gestures, Mutual-Capacitance3 Grades: A4 and E5 3″-8″ Screens >9″ Screens Gen3 6″-9″ Screens Gen1 CY8CTMG120 43 I/O, 1 or 2 F1, 50-Hz RR2 Gestures, Self-Capacitance12 Grade: A4 CY8CTMA340 32 I/O, 4 F1, 60-Hz RR2 DualSense7, H2O8 CY8CTMA120 32 I/O, 10 F1, 50-Hz RR2 Mutual-Capacitance3 Grade: A4 CY8CTMA140 32 I/O, 4 F1, 60-Hz RR2 Mutual-Capacitance3 1 Number of finger locations reported rate 3 The capacitance of the intersection between a row or column of a touchscreen sensor 4 AEC-Q100: -40ºC to +85ºC 5 AEC-Q100: -40ºC to +125ºC 6 AutoArmor™: Enables compliance with chip-level emission, immunity and system-level specifications 2 Refresh Document No. 001-89435 Rev. *G Gen5 NEW CY8CTMA1036 65 I/O, 10 F1, 80-Hz RR2, AA6 Gestures, DualSense™7 Glove Touch, H2O8 Grades: A4 and S9 NEW CY8CTMA768 56 I/O, 10 F1, 80-Hz RR2, AA6 Gestures, DualSense7 Glove Touch, H2O8 Grades: A4 and S9 CYTMA568 54 I/O, 10 F1, AA6 Gestures, DualSense7, In-Cell10 AMS11, Glove Touch, H2O8 Contact Sales CY8CTMA461 48/43 I/O13, 10 F1, AA6 DualSense7, Thick Overlay Glove Touch, H2O8 Contact Sales CYTMA545 36 I/O, 10 F1, 120-Hz RR2 DualSense7, SLIM14 AMS11, Glove Touch, H2O8, Hover CY8CTMA460 48/43 I/O15, 10 F1, 100-Hz RR2, AA6 Gestures, DualSense7 Glove Touch, H2O8 Grades: A4 and S9 CYTMA445A 36 I/O, 10 F1, 120-Hz RR2 DualSense7, SLIM14, 35-Vpp CA16 AMS11, Glove Touch, H2O8 Face Detect NEW 7 14 Low-cost 8 15 43 Self-capacitance + mutual-capacitance Waterproofing and wet-finger tracking 9 AEC-Q100: -40ºC to +105ºC 10 A type of sensor stack-up in which the touch sensor is inside the LCD module under the color-filter glass 11 Automatic Mode Switching 12 The capacitance of a row or column in a touchscreen sensor 13 43 I/Os: 56-QFN, 48 I/Os: 100-TQFP CYPRESS CONFIDENTIAL Single-Layer Independent Multi-Touch sensor I/Os: 56-QFN Development, 48 I/Os: 100-TQFP Production 16 Charger Armor™: Cypress proprietary charger noise mitigation technology Production Sampling Development Concept Industrial Automotive QQYY QQYY Availability 85 Automotive Portfolio: TrueTouch® Software1 Software MPN PSoC Designer™ TrueTouch® Host Emulator2 Current Version 5.4 CP1 3.3 3.4 1.6.5 CY8CTMA616 Production Production CY8CTMA884 Production Legacy Driver Rev4-2M-28 Production CY8CTMA460 Production CY8CTMA768 Production CY8CTMA1036 Production CY8CTMA461 Q1 2015 Q2 2015 Q2 2015 CYTMA568 Q3 2015 3.4 Production Q3 2015 Gen 1 Gen 3 ® CY8CTMA120 Production CY8CTMG120 Production Gen 4 Gen 5 TrueTouch Driver for Android3 Manufacturing Test Kit4 Production Production 2.4 Production Production Production Contact sales for the latest TrueTouch software, drivers and tools 1 PSoC Designer, TTHE and MTK releases are backward compatible. The latest version is recommended for new designs. Host Emulator (TTHE) is a front-end tool used to configure, tune, debug and demonstrate TrueTouch devices 3 TrueTouch Driver for Android (TTDA) is the driver for Android that translates touch information into Linux/Android events 4 TrueTouch Manufacturing Test Kit (MTK) enables customers and ITO partners to test touch panels that use Cypress TrueTouch controllers through the manufacturing flow 2 TrueTouch Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 86 CY8CTMA460/768/1036 Automotive TrueTouch® Gen4 Family Applications Block Diagram Touchscreens Trackpads Host Processor Features CY8CTMA 460/768/1036 Advanced User Interface Waterproofing: Works with water droplets, condensation, sweat and wet-finger tracking Glove Touch: Tracks 10 fingers with 1-mm gloves Precise touch tracking: 0.8-mm accuracy and 0.6-mm linearity Proprietary Analog Front End True 10-V Tx-Boost™ with four multiphase Tx lines, providing equivalent signal-to-noise ratio to 20-V Tx lines DualSense™: Self- and mutual-capacitance analog front end (U.S. patents 8,358,142; 8,319,505; and 8,067,948) System Solutions Supports thin ITO1 stackups and metal mesh sensors AutoArmor™ enables compliance with chip-level emission (IEC 61967), immunity (IEC 62132) and system-level (CISPR 25) specifications Android driver support Manufacturing test kits for production testing Packages 100-pin TQFP, 56-pin QFN (TMA460 only) 32 Flash 10-V Tx Pump 32 SRAM Touch Sequencer Rx Channels Programmable Analog Multiplexer 65 Touchscreen Sensor I/O: XY00-XY64 Touchscreen Sensor Datasheets, Design Guides and Evaluation Kit: Contact Sales or [email protected] Sampling: Production: Document No. 001-89435 Rev. *G ARM® Cortex™ CPU 32 Availability tin oxide I2C/SPI 32 Collateral 1 Indium 1 - I2 C 2 - Serial Peripheral Interface (SPI) INT2 56-pin QFN Automotive ES: Q1 2015 100-pin TQFP: Now 56-pin QFN: Q2 2015 2 Interrupt CYPRESS CONFIDENTIAL 87 Automotive CapSense® Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 88 Entry Value Performance Automotive Portfolio: CapSense® CapSense Express™ CapSense Plus™ PSoC® Configurable1 Programmable2 Programmable System-on-Chip CY8CMBR3106S 11 Buttons, 2 Sliders SmartSense_EMCplus™3 Proximity, Water Tolerance Grades: A4 and S5 CY8CMBR3116 16 Buttons, 8 LEDs SmartSense_EMCplus3 Proximity, Water Tolerance Grades: A4 and S5 CY8C20xx7/S 31 Buttons, 6 Sliders 16, 32KB Flash; 2KB SRAM Proximity, Water Tolerance Glove, Stylus Support CY8CMBR3108 8 Buttons, 4 LEDs Proximity, Water Tolerance SmartSense_EMCplus™3 CY8CMBR3110 10 Buttons, 5 LEDs SmartSense_EMCplus3 Proximity, Water Tolerance Grades: A4 and S5 CY8CMBR3102 2 Buttons, Proximity SmartSense_EMCplus3 CY8CMBR2110 10 Buttons, 10 LEDs SmartSense™ Auto-tuning CY8CMBR310XLP 1-4 Buttons, Low Power Contact Sales CY8CMBR2016 16 Buttons SmartSense Auto-tuning CY8CMBR2044 4 Buttons, 4 LEDs SmartSense Auto-tuning CY8CMBR2010 10 Buttons, 10 LEDs SmartSense Auto-tuning CY8C24x94 43 Buttons, 8 Sliders 16KB Flash, 1KB SRAM Grade: A4 CY8CMBR3002 2 Buttons, 2 LEDs SmartSense_EMCplus3 CY8C201xx 10 Buttons, 5 LEDs 2 Sliders CY8C20234 10 Buttons, 2 Sliders 8KB Flash, 512Byte SRAM Grade: A4 CY8C4246/7-M 51 Buttons, 10 Sliders 64, 128KB Flash Proximity, Water Tolerance Contact Sales CY8C36xx/38xx 62 Buttons, 12 Sliders 32, 64KB Flash Proximity, Water Tolerance Grades: A4 and E6 CY8C20236A 10 Buttons, 2 Sliders 8KB Flash, 1KB SRAM SmartSense Auto-tuning Grade: A4 CY8C21x34 20 Buttons, 4 Sliders 8KB Flash, 512Byte SRAM Proximity, Water Tolerance Grades: A4 and E6 CY8C20xx6H 25 Buttons, 5 Sliders 8,16KB Flash; 1,2KB SRAM SmartSense Auto-tuning Haptics CY8C41xx/42xx 24 Buttons, 4 Sliders 16, 32KB Flash Proximity, Water Tolerance Grades: A4 and S5 CY8C32xx/34xx 62 Buttons, 12 Sliders 16-64KB Flash Proximity, Water Tolerance Grades: A4 and E6 CY8C21x12 20 Buttons, 4 Sliders 8KB Flash, 512Byte SRAM Proximity, Water Tolerance Grades: A4 and E6 CY8C2xx45 36 Buttons, 7 Sliders 16KB Flash, 1KB SRAM Grades: A4 and E6 Q115 CY8C40xx 16 Buttons, 3 Sliders 16KB Flash, 2KB SRAM Proximity, Water Tolerance Grades: A4 and S5 NEW Production Sampling Development Concept 1 Standard products are configured for target applications with a graphical user interface 2 Microcontroller-based products can be freely programmed to implement additional functions 3 SmartSense Electromagnetic Compatible = SmartSense Auto-tuning + high noise immunity Document No. 001-89435 Rev. *G 4 AEC-Q100: -40ºC to +85ºC 5 AEC-Q100: -40ºC to +105ºC 6 AEC-Q100: -40ºC to +125ºC CYPRESS CONFIDENTIAL Industrial Automotive Availability QQYY QQYY 89 Automotive Portfolio: CapSense® Software1 Software Current Version PSoC® Creator™2 PSoC Designer™ 3.1 PSoC 1 3 PSoC Programmer4 EZ-Click™ 5.4 3.22 2.0 Production Production PSoC 3 Production Production PSoC 4 Production Production CapSense Plus™ 5 Production CapSense Express™ Production Download the latest PSoC software version here 1 All software and tool releases are backward compatible. The latest versions are recommended for new designs Creator is an Integrated Design Environment (IDE) that allows concurrent hardware and firmware design of PSoC 3 and PSoC 4 systems 3 PSoC Designer is an IDE that enables firmware design using a library of precharacterized peripherals for PSoC 1 systems 4 PSoC Programmer can be used with PSoC Designer and PSoC Creator to program and debug any design onto a PSoC device 5 EZ-Click is a Windows® GUI-based tool that enables development of CapSense MBR solutions. It allows you to set up sensor configuration, apply global system properties, monitor real-time sensor output, and run production-line system diagnostics 2 PSoC Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 90 Automotive CapSense Packages Package Pins QFN 24 SOIC 56 16 PSoC 1 SSOP 20 28 48 1 PSoC 3 PSoC 4 1 48-SSOP TQFP 100 PSoC 3 concept only Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 91 Automotive PSoC® Roadmap Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 92 Automotive Portfolio: PSoC® 1 M8C Core | 24 MHz PSoC MCU Programmable Digital Intelligent Analog Performance Analog Analog: 2x CMP1 Analog: 1x/2x CMP1, 4xSC/CT PAB3 Interfaces: I2C, SPI, UART Analog: 2x/4x CMP1, 6xSC/CT PAB3, PGA4 Interfaces: I2C, SPI, UART, USB2 Analog: 4x CMP1, 12x/16x SC/CT PAB3, PGA4 Interfaces: I2C, SPI, UART, USB2 Interfaces: I2C, SPI, USB2 CY8C29x66 32K/2K5, 44 GPIOs6 1x14-bit Del-Sig ADC7 Grades: A8 and E9 CY8C27x43 32K/2K5, 44 GPIOs6 CapSense, 1x14-bit Del-Sig ADC7 CY8C24894 16K/1K5, 56 GPIOs6 CapSense, 2x14-bit SAR ADC7 Grade: A8 CY8C28xxx 16K/1K5, 44 GPIOs6 CapSense, 4x14-bit Del-Sig ADC7 Performance CY8C2xx45 16K/1K5, 38 GPIOs6 CapSense, 1x10-bit SAR ADC7 Grades: A8 and E9 CY8C21x34 8K/0.5K5, 28 GPIOs6 CapSense, 1x10-bit ADC7 Grades: A8 and E9 CY8C24x23 4K/0.25K5, 24 GPIOs6 CapSense, 1x14-bit Del-Sig ADC7 Grades: A8 and E9 CY8C23x33 8K/0.25K5, 26 GPIOs6 CapSense, 1x 8-bit SAR ADC7 CY8C24x93 32K/2K5, 36 GPIOs6 1x10-bit ADC7 CY8C21x23 4K/0.25K5, 16 GPIOs6 1x10-bit ADC7 Integration 1 Comparator 6 General-purpose 2 Full-Speed 7 Analog-to-digital USB 3 Switched capacitor/continuous time programmable analog block 4 Programmable gain amplifier 5 Flash KB/SRAM KB Document No. 001-89435 Rev. *G input/output pins converter: Includes incremental, successive approximation register (SAR) or Delta-Sigma (Del-Sig) ADCs 8 AEC-Q100: -40ºC to +85ºC 9 AEC-Q100: -40ºC to +125ºC CYPRESS CONFIDENTIAL Production Sampling Development Concept Industrial Automotive Availability QQYY QQYY 93 Automotive Portfolio: PSoC® 3 8051 | CapSense® | DMA | LCD | RTC | 4x Timer/Counter/PWM Intelligent Analog PSoC 3400 Performance Analog PSoC 3600 Precision Analog PSoC 3800 Analog: Del-Sig ADC1, 1x DAC2, 2x CMP3, 0.9% Vref Analog: ADC1, 2x DAC2, 4x CMP3, 2x Opamps, 2x SC/CT PAB5, 0.9% Vref Interfaces: FF4 I2C Interfaces:FF4 I2C Analog: ADC1, 2x/4x DAC2, 0x/2x/4x CMP3, 0x/2x/4x Opamps, 0x/2x/4x SC/CT PAB5, 0.1% Vref Interfaces: USB6, FF4 I2C Analog: ADC1, 2x/4x DAC2, 0x/2x/4x CMP3, 0x/2x/4x Opamps, 0x/2x/4x SC/CT PAB5, 0.1% Vref Interfaces: USB6, FF4 I2C CY8C3666 67 MHz, 64K/8K/2K7 0x/1x DFB, 12-bit ΔƩ ADC1 20x/24x UDB8, CAN9 Grades: A10 and E11 CY8C3866 67 MHz, 64K/8K/2K7 DFB, 20-bit ΔƩ ADC1 20x/24x UDB8, CAN9 Grades: A10 and E11 CY8C3665 67 MHz, 32K/4K/1K7 0x/1x DFB12, 12-bit ΔƩ ADC1 16x/20x UDB8 Grades: A10 and E11 CY8C3865 67 MHz, 32K/4-8K/1K7 0x/1x DFB12, 20-bit ΔƩ ADC1 16x/20x UDB8 Grades: A10 and E11 Performance Programmable Digital PSoC 3200 CY8C3246 50 MHz, 64K/8K/2K7 12-bit ΔƩ ADC1 24x UDB8, USB6 Grades: A10 and E11 CY8C3446 50 MHz, 64K/8K/2K7 12-bit ΔƩ ADC1 24x UDB8, USB6, CAN9 Grades: A10 and E11 CY8C3245 50 MHz, 32K/4K/1K7 12-bit ΔƩ ADC1 20x UDB8, USB6 Grades: A10 and E11 CY8C3445 50 MHz, 32K/4K/1K7 12-bit ΔƩ ADC1 20x UDB8, USB6 Grades: A10 and E11 CY8C3244 50 MHz, 16K/2K/0.5K7 12-bit ΔƩ ADC1 16x UDB8 Grades: A10 and E11 CY8C3444 50 MHz, 16K/2K/0.5K7 12-bit ΔƩ ADC1 16x UDB8 Grades: A10 and E11 Integration 1 Delta-Sigma analog-to-digital converter 2 Digital-to-analog converter 3 Comparator 4 Fixed function Document No. 001-89435 Rev. *G 5 Switched 8 capacitor/continuous time programmable analog block 6 Full-Speed USB 7 Flash KB/SRAM KB/EEPROM KB Universal digital block 9 Controller area network 10 AEC-Q100: -40ºC to +85ºC 11 AEC-Q100: -40ºC to +125ºC 10 CYPRESS CONFIDENTIAL 12 Digital filter block Production Sampling Development Concept Industrial Automotive Availability QQYY QQYY 94 Automotive Portfolio: PSoC® 4 ARM® Cortex™-M0 | CapSense® | Timer/Counter/PWM PSoC MCU PSoC 4000 Intelligent Analog PSoC 4100 Programmable Digital PSoC 4200 Programmable Analog PSoC 4400 Analog: CMP1, IDAC2 Interfaces: I2C Analog: CMP1, IDAC2, ADC3, Op amp Interfaces: SCB4 Analog: CMP1, IDAC2, ADC3, Op amp Interfaces: SCB4 Concept Only Contact Sales CY8C4248-L 48 MHz, 256K/32K5 UDB7, CAN10, USB11 Contact Sales CY8C4248-BL 48 MHz, 256K/32K5 BLE6, UDB7 Contact Sales CY8C4247-M 48 MHz, 128K/16K5 UDB7, CAN10 Grades: A8 and S9 Contact Sales CY8C4247-L 48 MHz, 128K/16K5 UDB7, CAN10, USB11 Contact Sales CY8C4247-BL 48 MHz, 128K/16K5 BLE6, UDB7 CY8C4246-M 48 MHz, 64K/8K5 UDB7 Grades: A8 and S9 Contact Sales CY8C4246-L 48 MHz, 64K/8K5 UDB7, USB11 Contact Sales CY8C4128-BL 24 MHz, 256K/32K5 BLE6 Performance CY8C4127-M 24 MHz, 128K/16K5 Grades: A8 and S9 Contact Sales CY8C4127-BL 24 MHz, 128K/16K5 BLE6 CY8C4126-M 24 MHz, 64K/8K5 Grades: A8 and S9 Contact Sales NEW NEW CY8C4245 48 MHz, 32K/4K5 UDB7 Grades: A8 and S9 CY8C4125 24 MHz, 32K/4K5 Grades: A8 and S9 NEW Q414 NEW CY8C4014 16 MHz, 16K/2K5 Grades: A8 and S9 CY8C44x6 48 MHz, 64K/16K5 Concept Only Contact Sales CY8C44x5 48 MHz, 32K/8K5 Concept Only Contact Sales NEW CY8C4244 48 MHz, 16K/4K5 UDB7 Grades: A8 and S9 CY8C4124 24 MHz, 16K/4K5 Grades: A8 and S9 CY8C4013 16 MHz, 8K/2K5 Integration 1 Comparator 2 Current-output digital-to-analog converter 3 Analog-to-digital converter 4 Serial communication block programmable as I 2C/SPI/UART/LIN slave Document No. 001-89435 Rev. *G 5 Flash KB/SRAM KB 6 Bluetooth Low Energy 7 Universal digital block 8 AEC-Q100: -40ºC to +85ºC 9 AEC-Q100: -40ºC to +105ºC Industrial area network Automotive 11 Full-Speed USB Availability Production Sampling Development Concept 10 Controller CYPRESS CONFIDENTIAL QQYY QQYY 95 Automotive Portfolio: PSoC® Software1 Software Current Version PSoC Creator™2 PSoC Designer™ 3.1 PSoC 1 3 PSoC Programmer4 EZ-Click™ 5.4 3.22 2.0 Production Production PSoC 3 Production Production PSoC 4 Production Production 5 Download the latest PSoC software version here 1 All software and tool releases are backward compatible. The latest versions are recommended for new designs Creator is an Integrated Design Environment (IDE) that allows concurrent hardware and firmware design of PSoC 3 and PSoC 4 systems 3 PSoC Designer is an IDE that enables firmware design using a library of precharacterized peripherals for PSoC 1 systems 4 PSoC Programmer can be used with PSoC Designer and PSoC Creator to program and debug any design onto a PSoC device 5 EZ-Click is a Windows® GUI-based tool that enables development of CapSense MBR solutions. It allows you to set up sensor configuration, apply global system properties, monitor real-time sensor output, and run production-line system diagnostics 2 PSoC Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 96 Automotive PSoC Packages Package Pins QFN 24 SOIC 56 16 PSoC 1 SSOP 20 28 48 1 PSoC 3 PSoC 4 1 48-SSOP TQFP 100 PSoC 3 concept only Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 97 Automotive Portfolio: Asynchronous SRAM 32Mb-128Mb Non-ECC3 ECC3 CY7C107x 32Mb; 3.3 V 12 ns; x8, x16 2Mb-16Mb Non-ECC3 ECC3 CY6218x 64Mb; 2.5, 3.0 V 55 ns; x8, x16 Other densities Contact Sales ECC3 CY6217x 32Mb; 2.5, 3.0, 5.0 V 55 ns; x8, x16 CY7C106x 16Mb; 1.8, 3.3 V 10 ns; x8, x16, x32 64Kb-1Mb PowerSnooze™2 SRAM Low-Power SRAM (MoBL®1) Fast SRAM NEW CY7C106x 16Mb; 1.8-5.0 V 10 ns; x8, x16, x32 Grade: E5 CY6216x 16Mb; 3.0 V 45 ns; x8, x16 Grade: A6 NEW CY7C105x 8Mb; 1.8-5.0 V 10 ns; x8, x16, x32 Grade: E5 CY6215x 8Mb; 3.0, 5.0 V 45 ns; x16 Grades: A6 and E5 NEW CY7C104x 4Mb; 1.8-5.0 V 10 ns; x8, x16 Grade: E5 CY6214x 4Mb; 3.0, 5.0 V 45 ns; x8, x16 Grades: A6 and E5 NEW CY7C101x 2Mb; 1.8-5.0 V 10 ns; x8, x16 Grade: E5 CY6213x 2Mb; 3.0 V 45 ns; x8, x16 Grades: A6 and E5 CY7C105x 8Mb; 3.3 V 10 ns; x8, x16 CY7C1012 12Mb; 3.3 V 10 ns; x24 CY7C104x 4Mb; 3.3, 5.0 V 10 ns; x8, x16 Grades: A6 and E5 CY7C1034 6Mb; 3.3 V 10 ns; x24 CY7C1011 2Mb; 3.3 V 10 ns; x16 Grades: A6 and E5 CY7C1024 3Mb; 3.3 V 10 ns; x24 CY7C1020 512Kb; 2.6, 3.3 V 15 ns; x16 Grade: E5 CY7C1019/21 1Mb; 2.6, 3.3, 5.0 V 10 ns; x8, x16 Grades: A6 and E5 CY6212x 1Mb; 3.0, 5.0 V 45 ns; x8, x16 Grades: A6 and E5 CY7C185 64Kb; 5.0 V 15 ns; x8 CY7C199 256Kb; 5.0 V 12 ns; x8 Grades: A6 and E5 CY62256 256Kb; 5.0 V 55 ns; x8 Grades: A6 and E5 NEW NEW CY6216x 16Mb; 1.8-5.0 V 45 ns; x8, x16, x32 Grade: E5 CY6214x 4Mb; 1.8-5.0 V 45 ns; x8, x16 Grade: E5 NEW CY7S106x 16Mb; 1.8-5.0 V 10 ns; x8, x16, x32 Grade: E5 NEW CY7S105x 8Mb; 1.8-5.0 V 10 ns; x8, x16, x32 Grade: E5 NEW CY7S104x 4Mb; 1.8-5.0 V 10 ns; x8, x16 Grade: E5 NEW CY7S101x 2Mb; 1.8-5.0 V 10 ns; x8, x16 Grade: E5 Production Sampling Development Concept 1 More 3 Error-correcting 5 AEC-Q100: 2 Fast Battery Life™ SRAM with low-power sleep mode 4 Serial 6 AEC-Q100: Document No. 001-89435 Rev. *G code peripheral interface -40ºC to +125ºC -40ºC to +85ºC CYPRESS CONFIDENTIAL Industrial Automotive Availability QQYY QQYY 98 Fast SRAM with ECC Applications Family Table Infotainment systems Driver assistance Driver information Powertrain Telematics Density MPN Access Time 4Mb 8Mb 16Mb CY7C104x CY7C105x CY7C106x 10 ns 10 ns 10 ns Supply Current (Max. at 85ºC) 45 mA 60 mA 110 mA Block Diagram Features Bus-width configurations: x8, x16, x32 Wide operating voltage range: 1.65-5.5 V Available in automotive temperature (A1 and E2) grades Industry-standard, RoHS-compliant packages Error-correcting code (ECC) to detect/correct single-bit errors Bit-interleaving to avoid multi-bit errors Error-indication (ERR) pin to indicate single-bit errors Packages: 48-pin VFBGA, 48-pin TSOP1 Fast SRAM with ECC SRAM Array 18-23 Address ECC Encoder Input Buffer 8, 16, 32 Data ERR I/O Mux Address Decoder Sense Amps SRAM Array ECC Decoder Control Logic CE Collateral Preliminary Datasheet: 1 AEC-Q100: -40ºC to +85ºC OE WE BHE3 BLE4 Availability Contact Sales 2 AEC-Q100: Document No. 001-89435 Rev. *G -40ºC to +125ºC Contact Sales 3 Byte high enable CYPRESS CONFIDENTIAL 4 Byte low enable 99 Automotive Asynchronous SRAM Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 100 1 ® MoBL SRAM with ECC Applications Family Table Infotainment systems Telematics Features Density MPN 4Mb 8Mb 16Mb 32Mb 64Mb CY6214x CY6215x CY6216x CY6217x CY6218x Standby Current (Max. at 85ºC) 8 µA 9 µA 16 µA 58 µA 58 µA Standby Current (Typ. at 25ºC) 2.5 µA 3.0 µA 4.6 µA 9.0 µA 9.0 µA Block Diagram Access time: 45 ns for 16Mb Standby current: 16 µA for 16Mb Multiple bus-width configurations: x8, x16 and x32 Wide operating voltage range: 1.65-5.5 V Available in automotive temperature (A2 and E3) grades Industry-standard, RoHS-compliant packages Error-correcting code (ECC) to detect/correct single-bit errors Bit-interleaving to avoid multi-bit errors Error-indication (ERR) pin to indicate single-bit errors Packages: 48-pin VFBGA, 48-pin TSOP1 MoBL®1 SRAM with ECC SRAM Array 18-23 Address Address Decoder ECC Encoder Input Buffer 8, 16, 32 Data ERR I/O Mux SRAM Array Sense Amps ECC Decoder Control Logic CE Collateral Battery Life™ WE BHE4 BLE5 Availability Preliminary Datasheet: 1 More OE Contact Sales 2 AEC-Q100: Document No. 001-89435 Rev. *G -40ºC to +85ºC Contact Sales 3 AEC-Q100: -40ºC to +125ºC 4 Byte high enable CYPRESS CONFIDENTIAL 5 Byte low enable 101 Fast SRAM with PowerSnooze™ Applications Family Table Infotainment systems Driver assistance Driver information Powertrain Telematics Features Density MPN Access Time 4Mb 8Mb 16Mb CY7S104x CY7S105x CY7S106x 10 ns 10 ns 10 ns Block Diagram Access time: 10 ns or 12 ns (see Family Table) PowerSnooze™: Additional power-saving (deep-sleep) mode Deep-sleep current: 23 µA for 16Mb (see Family Table) Multiple bus-width configurations: x8, x16 and x32 Wide operating voltage range: 1.65-5.5 V Available in automotive temperature (A1 and E2) grades Industry-standard, RoHS-compliant packages Error-correcting code (ECC) to detect/correct single-bit errors Bit-interleaving to avoid multi-bit errors Packages: 48-pin VFBGA, 48-pin TSOP1 Fast SRAM with PowerSnooze™ ECC Encoder Collateral 1 AEC-Q100: Input Buffer 20 Address Address Decoder SRAM Array Power Management Block (Enables PowerSnooze) DS3 Preliminary Datasheet: Deep Sleep Current (Max. at 85ºC) 12 µA 22 µA 22 µA I/O Mux Sense Amps 8, 16, 32 Data ERR ECC Decoder Control Logic CE OE WE BHE4 BLE5 Availability Contact Sales -40ºC to +85ºC Document No. 001-89435 Rev. *G 2 AEC-Q100: -40ºC to +125ºC Contact Sales 3 Deep-sleep CYPRESS CONFIDENTIAL 4 Byte high enable 5 Byte low enable 102 Automotive Synchronous SRAM Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 103 Automotive Portfolio: Synchronous SRAM High Random Transaction Rate (RTR)1 | Low Latency | High Bandwidth Standard Sync and NoBL™ with ECC2 QDR® -II/ DDR-II QDR-II+/ DDR-II+ QDR-II+X/ DDR-II+X QDR-IV Max RTR1: 250 MT/s Max BW: 18 Gbps Latency: 1 Cycle Pipeline and Flow-through Modes Max RTR1: 250 MT/s Max BW: 18 Gbps Latency: 1 Cycle Pipeline and Flow-through Modes Max RTR1: 666 MT/s Max BW: 47.9 Gbps Latency: 1.5 Cycles CIO3 and SIO4 Max RTR1: 666 MT/s Max BW: 79.2 Gbps Latency: 2 or 2.5 Cycles CIO3and SIO4, ODT5 Max RTR1: 900 MT/s Max BW: 91.1 Gbps Latency: 2.5 Cycles SIO4, ODT5 Max RTR1: 2.1 GT/s Max BW: 153.5 Gbps Latency: 5 or 8 Cycles Dual-Port Bidirectional ODT5 CY7C161/2xKV18 144Mb; 250-333 MHz 1.8 V; x9, x18, x36 Burst 2, 4 CY7Cx4/5/6/7xKV18 144Mb; 300-550 MHz 1.8 V; x18, x36 Burst 2, 4 Density Standard Sync and NoBL™ CY7C41xKV13 144Mb; 667-1066 MHz 1.3 V; x18, x36 Burst 2 CY7C147/8xB 72Mb; 133-250 MHz 2.5, 3.3 V; x18, x36 72Mb with ECC2 Contact Sales CY7C151/2xKV18 72Mb; 250-333 MHz 1.8 V; x9, x18, x36 Burst 2, 4 CY7Cx54/5/6/7KV18 72Mb; 250-550 MHz 1.8 V; x18, x36 RH6; Burst 2, 4 CY7C156/7xXV18 72Mb; 366-633 MHz 1.8 V; x18, x36 Burst 2, 4 CY7C144/6xA 36Mb; 133-250 MHz 2.5, 3.3 V; x36, x72 36Mb with ECC2 Contact Sales CY7C141/2xKV18 36Mb; 250-333 MHz 1.8 V; x8, x9, x18, x36 Burst 2, 4 CY7Cx24/5/6/7xKV18 36Mb; 400-550 MHz 1.8 V; x18, x36 Burst 2, 4 CY7C126/7x 36Mb; 366-633 MHz 1.8 V; x18, x36 Burst 2, 4 CY7C137/8xD 18Mb; 100-250 MHz 3.3 V; x18, x32, x36 18Mb with ECC2 Contact Sales CY7C131/2/9xKV18 18Mb; 250-333 MHz 1.8 V; x8, x18, x36 Burst 2, 4 CY7Cx14/5/6/7xKV18 18Mb; 400-550 MHz 1.8 V; x18, x36 Burst 2, 4 NEW CY7C136xC 9Mb; 100 MHz 3.3 V; x18, x36 Grade: E7 NEW CY7C134xxG 4Mb; 100 MHz 3.3 V; x36 Grade: E7 CY7C1911xKV18 18Mb; 250-333 MHz 1.8 V; x9 Burst 2, 4 Random Transaction Rate 1 Rate of truly random accesses to memory, expressed in transactions per second (MT/s, GT/s) Document No. 001-89435 Rev. *G CY7C40xKV13 72Mb; 667-1066 MHz 1.3 V; x18, x36 Burst 2 2 Error-correcting 3 Common 4 Separate I/O I/O code 5 On-die termination; parts are CY7C2x 6 Radiation hardened, military grade 7 AEC-Q100: -40ºC to +125ºC CYPRESS CONFIDENTIAL Production Sampling Development Concept Industrial Automotive Availability QQYY QQYY 104 Automotive Nonvolatile RAM Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 105 Automotive Portfolio: F-RAM Low Power | High Endurance FM25H20/V20 2Mb; H20: 2.7-3.6 V V20: 2.0-3.6 V 40 MHz SPI NEW CY15B102Q 2Mb; 2.0-3.6 V 25 MHz SPI Grade: E1 4Kb-256Kb 512Kb-8Mb SPI F-RAM Processor Companion I2C F-RAM Wireless Memory Parallel F-RAM FM22L16/LD16 4Mb; 2.7-3.6 V 55 ns; x8 CY15B104Q 4Mb; 2.0-3.6 V 40 MHz SPI FM25V10/VN10 1Mb; 2.0-3.6 V 40 MHz SPI Grade: A2 FM24V10/VN10 1Mb; 2.0-3.6 V 3.4 MHz I2C NEW FM25V05 512Kb; 2.0-3.6 V 40 MHz SPI Grade: A2 FM24V05 512Kb; 2.0-3.6 V 3.4 MHz I2C FM25V02/W256 256Kb; V02: 2.0-3.6 V W256: 2.7-5.5 V 40 MHz SPI; Grade: A2 FM24V02/W256 256Kb; V02: 2.0-3.6 V W256: 2.7-5.5 V 3.4 MHz I2C; Grade: A2 FM33256 256Kb; 3.3 V; 16 MHz SPI Ind1; RTC3; Power Fail Watchdog; Counter FM25V01 128Kb; 2.0-3.6 V 40 MHz SPI Grade: A2 FM24V01 128Kb; 2.0-3.6 V 3.4 MHz I2C Grade: A2 FM31256/31(L)278 256Kb; 3.3, 5.0 V; 1 MHz I2C; Ind1; RTC3; Power Fail; Watchdog; Counter FM25640/CL64 64Kb; 3.3, 5.0 V 20 MHz SPI Grade: E3 FM24C64/CL64 64Kb; 3.3, 5.0 V 1 MHz I2C Grade: E1 FM3164/31(L)276 64Kb; 3.3, 5.0 V; 1 MHz I2C; Ind1; RTC3; Power Fail; Watchdog; Counter FM25C160/L16 16Kb; 3.3, 5.0 V 20 MHz SPI Grade: E1 FM24C16/CL16 16Kb; 3.3, 5.0 V 1 MHz I2C FM25040/L04 4Kb; 3.3, 5.0 V 20 MHz SPI Grade: E1 FM24C04/CL04 4Kb; 3.3, 5.0 V 1 MHz I2C Wireless Memory Contact Sales NEW CY15B101N 1Mb; 2.0-3.6 V 60 ns; x16 Grade: A2 CY15B102N 2Mb; 2.0-3.6 V 60 ns; x16 Grade: A2 FM28V020 256Kb; 2.0-3.6 V 70 ns; x8 FM18W08 256Kb; 2.7-5.5 V 70 ns; x8 FM1808B 256Kb; 5.0 V 70 ns; x8 FM16W08 64Kb; 2.7-5.5 V 70 ns; x8 Production Sampling Development Concept −40ºC to +125ºC 2 AEC-Q100 −40ºC to +85ºC 3 Real-time clock 1 AEC-Q100 Document No. 001-89435 Rev. *G FM28V202A 2Mb; 2.0-3.6 V 60 ns; x16 FM28V102A 1Mb; 2.0-3.6 V 60 ns; x16 Industrial Automotive Availability CYPRESS CONFIDENTIAL QQYY QQYY 106 Automotive USB Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 107 Automotive Portfolio: USB Hub Bridge FX3: CYUSB301x 32-Bit Bus to USB 3.0 ARM9, 512KB RAM HX3: CYUSB33xx 4 Ports, Shared Link™1 BC 1.22, Ghost Charge™3 Grades: A4 and S5 USB 3.0 Device Host Storage Type-C CX3: CYUSB306x CSI-26 to USB 3.0 4 CSI-26 Lanes, 1 Gbps/Lane FX3S™: CYUSB303x 16-Bit Bus to USB 3.0 RAID7, Dual SDXC8/eMMC9 Grades: A4 and S5 Type-C Port Controller Contact Sales Display TX Bridge Contact Sales SD3: CYUSB302x SDXC8/eMMC9 to USB 3.0 RAID7 Type-C Cable Controller Contact Sales USB 2.0 Gigabit Ethernet Bridge Contact Sales FX2LP: CY7C6801x/53 16-Bit Bus to USB 2.0 8051, 16KB RAM HX2VL: CY7C656x4 4 Ports 4 Transaction Translators TX2UL: CY7C68003 ULPI10 PHY 13, 19.2, 24, 26 MHz HX2LP: CY7C656x1 4 Ports, 1 Transaction Translator Bay™: CYWB016xBB HS USB OTG Dual SDXC7/eMMC9 Astoria™: CYWB022xABS 16-Bit Bus to USB 2.0 8051, Dual SD/eMMC9 NX2LP: CY7C6803x NAND Flash to USB 2.0 8051, 15KB RAM Type-C product applies to any USB speed USB 1.1 AT2LP: CY7C683xx PATA11 to USB 2.0 8051 enCoRe™ II: CY7C638xx M8C MCU, 20 GPIOs SPI, 8KB Flash USB-Serial: CY7C6521x UART/SPI/I2C to USB 2 Channels, CapSense® SL811HS FS USB Host/Device 256Byte RAM enCoRe III: CY7C64215 M8C MCU, 50 GPIOs, ADC I2C/SPI, 16KB Flash USB-to-UART: CY7C65213 3 Mbps, 8 GPIOs EZ-Host: CY7C67300 4 Ports, FS USB OTG 32 GPIOs Grade: A5 enCoRe V: CY7C643xx M8C MCU, 36 GPIOs, ADC I2C/SPI, 32KB Flash USB-to-UART: CY7C64225 230 Kbps EZ-OTG™: CY7C67200 2 Ports, FS USB OTG 25 GPIOs 1 Simultaneous USB 2.0 and USB z3.0 traffic on the same port 2 Battery Charging specification v1.2 3 Enables USB charging without host connection Document No. 001-89435 Rev. *G 4 AEC-Q100: 8 5 AEC-Q100: 9 -40ºC to +85ºC -40ºC to +105ºC 6 Camera Serial Interface v2.0 7 Redundant array of independent disks SD extended capacity Embedded MultiMedia Card 10 UTMI low-pin interface 11 Parallel ATA CYPRESS CONFIDENTIAL Production Sampling Development Concept Industrial Automotive Availability QQYY QQYY 108 Automotive Timing Solutions Document No. 001-89435 Rev. *G CYPRESS CONFIDENTIAL 109 Automotive Portfolio: Timing Solutions High Performance Clock Generators EMI Reduction Non-EMI Reduction 4-PLL Clock Generator Contact Sales Programmable XO/VCXO Contact Sales 2-PLL Clock Generator Contact Sales CY2Xx (FleXO™) Max. Frequency: 690 MHz 1 Output; Frequency Margining 0.6-ps RMS Jitter1 Application Specific Standard Performance NEW NEW Clock Buffers Zero Delay Buffer (ZDB) Non-Zero Delay Buffer (NZDB) CY2DLx/DMx/DPx/CPx Max. Frequency: 1.5 GHz 2-10 Outputs; LVDS, LVPECL, CML 0.05-ps RMS Jitter1 CY2239x Max. Frequency: 166 MHz 6 Outputs, 3 PLL, I2C, Freq Select 400-ps CCJ2; Grades: A3 and E4 CY254x/CY251x Max. Frequency: 166 MHz 3-9 Outputs; 1-4 PLL; I2C 100-ps CCJ2 CY229x/CY2238x Max. Frequency: 200 MHz 3-6 Outputs, 3-4 PLL, I2C, Freq Select 400-ps CCJ2 CY22800/801 Max. Frequency: 166 MHz 3 Outputs; 1 PLL 250-ps CCJ2 CY22050/150 Max. Frequency: 200 MHz 3-6 Outputs; 1 PLL 250-ps CCJ2 CY230x/EP0x Max. Frequency: 220 MHz 5-9 Outputs; LVCMOS 22-ps CCJ2; Grade: A3 PCIe 3.0 Clock Generator Contact Sales CY23FS04/08 Max. Frequency: 200 MHz 4-8 Outputs; Fail Safe5 200-ps CCJ2 CY24293A Max. Frequency: 200 MHz 2 outputs; 1 PLL; PCIe 1.1 75-ps CCJ2; Grade: A3 CY23S02/05/08/09/FP12 Max. Frequency: 200 MHz 2-12 Outputs; Spread Aware 200-ps CCJ2 CY2429x Max. Frequency: 200 MHz 2-4 Outputs; PCIe 1.1 75-ps CCJ2 CY7B99x (RoboClock™) Max. Frequency: 200 MHz 8-18 Outputs; Configurable Skew 50-ps CCJ2 CY230xNZ Max. Frequency: 133 MHz 4-18 Outputs; LVCMOS 250-ps CCJ2 Production Sampling Development Concept 1 Integrated phase noise across 12-kHz to 20-MHz offset 2 Cycle-to-cycle jitter 3 AEC-Q100: -40ºC to +85ºC Document No. 001-89435 Rev. *G 4 AEC-Q100: -40ºC to +125ºC 5 Automatic clock switching on failure of a clock source CYPRESS CONFIDENTIAL Industrial Automotive Availability QQYY QQYY 110