AD ADD5211ACPZ-RL Four-string, white led driver for lcd backlight application Datasheet

Four-String, White LED Driver
for LCD Backlight Applications
ADD5211
Preliminary Technical Data
FEATURES
GENERAL DESCRIPTION
White LED driver based on an inductive boost controller
Wide input voltage range: 4.5 V to 40 V
Adaptive output voltage to minimize power dissipation
Adjustable operating frequency: 200 kHz to 1.2 MHz
Programmable UVLO
Programmable soft start time for boost converter
Programmable external MOSFET switching rising/falling time
Drives up to 4 LED current sinks with internal MOSFETs
Brightness control with PWM input
Adjustable LED current: 40 mA up to 200 mA
Headroom control to maximize efficiency
LED dimming frequency: up to 25 kHz
1000:1 PWM dimming at 300 Hz
Open drain fault indicator
LED open and LED short fault protection
Thermal shutdown
Undervoltage lockout
24-lead, 4 mm × 4 mm LFCSP
The ADD5211 is a 4 channel, white LED driver for backlight
applications based on high efficiency, current mode, step-up
converter technology. The boost controller drives an external
MOSFET switch for step-up regulation from an input voltage of
4.5 V to 40 V and a pin adjustable operating frequency between
200 kHz and 1.2 MHz. An adjustable UVLO function is
implemented to reduce input current during power-off.
The ADD5211 contains four regulated current sinks for uniform
brightness intensity. Each current sinks can be driven from 40
mA up to 200 mA and the LED driving current is pin adjustable
by an external resistor. The ADD5211 with an input PWM
interface drives up to four parallel strings of multiple series
connected LEDs with ±1.5% current matching between strings.
Additional features include fault indicator output LED short
protection, LED open protection, boost output short protection,
overvoltage protection, cycle-by-cycle current limit, and
thermal shutdown for both the IC and LED array. The
programmable soft start is implemented to reduce inrush
current during startup.
APPLICATIONS
LCD monitor and TV LED backlights
Industrial lighting
TYPICAL APPLICATION
VIN
+
UVLO
VIN GATE_P GATE_N
CS
VDR
RAMP
OFF ON
EN
PGND
PWM
ADD5211
OVP
FAULT
VDD
FB4
FB3
FB2
LSD
FB1
ISET
COMP
SS
10555-001
AGND FREQ
LGND
Figure 1.
Rev. PrA
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADD5211
Preliminary Technical Data
DETAILED FUNCTIONAL BLOCK DIAGRAM
VDR
OVP
BOOST CONTROL
R
PWM
COMP
FB_REF
FB_MIN
S
ERROR
AMP
COMP
GATE_P
Q
gm
SWITCH
DRIVER
R
GATE_N
PGND
START-UP
OSC
FREQ
SOFT START
SS
CURRENT SENSE
CS
RAMP
DREF
DCOMP
+
OVP REF
RAMP
+
OVP
ADD5211
OVP
BOOST
SCP REF
SCP
×10
OVP
POR
FAULT
DETECTOR
FAULT
LSD
POR
OPEN
STRING
DETECTOR
THERMAL
SHUTDOWN
SHORT
STRING
DETECTOR
UNUSED
STRING
DETECTOR
LINEAR
REGULATOR
VDR
VIN
DEVICE
ENABLE
FB_MIN
EN
STRING
VOLTAGE
DETECTOR
BANDGAP
REFERENCE
500kΩ
AGND
CURRENT SOURCE1
FB1
AGND
UVLO
DETECTOR
UVLO
VOLTAGE
REFERENCE
CURRENT SOURCE2
FB2
VDD
CURRENT SOURCE3
POR
CONTROL LOGIC
PWM
500kΩ
FB3
VDD
BOOST CONTROL
START-UP
DIMMING CONTROL
CURRENT SOURCE
FB4
AGND
BOOST
SHORT
REF
DIMMING CONTROL
LGND
10555-002
THERMAL
SHUTDOWN
ISET
Figure 2.
Rev. PrA | Page 2 of 6
Preliminary Technical Data
ADD5211
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
THERMAL RESISTANCE
Table 1.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Parameter
VIN, UVLO
FB1, FB2, FB3, FB4
EN
PWM, FAULT
VDR, GATE_N, GATE_P
VDD, LSD , OVP, CS, RAMP, SS
FREQ, ISET, COMP
AGND, PGND, LGND
Maximum Junction Temperature (TJ max)
Operating Temperature Range (TA)
Storage Temperature Range (TS)
Reflow Peak Temperature (20 sec to 40 sec)
Rating
−0.3 V to +45 V
−0.3 V to +55 V
−0.3 V to +20 V
−0.3 V to +10 V
−0.3 V to +7 V
−0.3 V to +3.7 V
−0.3 V to +3.5 V
−0.3 V to +0.3 V
150°C
−25°C to +85°C
−65°C to +150°C
260°C
Table 2. Thermal Resistance
Package Type
24-Lead LFCSP
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. PrA | Page 3 of 6
θJA
40.5
θJC
3.8
Unit
°C/W
ADD5211
Preliminary Technical Data
VDR 1
18 OVP
UVLO 2
17 FB4
VIN 3
ADD5211
EN 4
TOP VIEW
LSD 12
VDD 11
ISET 10
14 FB2
13 FB1
FREQ 9
PWM 5
SS 7
Mnemonic
10
ISET
11
VDD
12
LSD
13
FB1
14
FB2
15
16
LGND
FB3
17
FB4
18
OVP
19
20
21
PGND
RAMP
CS
22
23
24
GATE_N
GATE_P
AGND
EP
16 FB3
FAULT 6
COMP 8
Pin
No.
15 LGND
NOTES
1. CONNECT THE EXPOSED PADDLE TO GROUND.
10555-003
20 RAMP
19 PGND
22 GATE_N
21 CS
24 AGND
23 GATE_P
PIN CONFIGURATION AND FUNCTION
DESCRIPTIONS
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin
No.
1
Mnemonic
VDR
2
UVLO
3
VIN
4
EN
5
6
7
8
PWM
FAULT
SS
COMP
9
FREQ
Description
Switching MOSFET Gate Driver Supply Pin.
Bypass VDR to AGND with a 1 µF bypass
capacitor.
Input Undervoltage Lockout. Set the startup and shutdown input voltage level by
connecting this pin to the input voltage
through a voltage divide resistor.
Supply Input Pin. Bypass VIN to AGND with
a 1 µF bypass capacitor.
Shutdown Control Pin for PWM Input
Operation Mode.
PWM Signal Input.
Open Drain Fault Output.
Soft Start Pin.
Compensation for the Boost Converter. Two
capacitors and a resistor are connected in
series between ground and this pin for
stable operation.
Frequency Select. A resistor from this pin to
Rev. PrA | Page 4 of 6
Description
ground sets the boost switching frequency
from 200 kHz to 1.2 MHz.
Full-Scale LED Current Set. A resistor from
this pin to ground sets the LED current up
to 200 mA.
Internal Linear Regulator Output. This
regulator provides power to the ADD5211.
Bypass VDD to AGND with a 1 µF bypass
capacitor.
LED Short Voltage Level Setting Pin. To
disable LED short protection, connect this
pin to VDD.
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB1 to LGND.
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB2 to LGND.
LED Current Sink Ground.
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB3 to LGND.
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB4 to LGND.
Overvoltage Protection. The boost
converter output is connected to this pin
with voltage divide resistors.
Power Ground.
Ramp Compensation Pin.
Current Sense Input. Allows the current
sensing to control the boost and to limit the
switching current.
Switching MOSFET Gate Low Driving Pin.
Switching MOSFET Gate High Driving Pin.
Analog Ground.
Exposed Paddle. Connect the exposed
paddle to ground.
Preliminary Technical Data
ADD5211
TYPICAL APPLICATIONS CIRCUITS
L1
33µH
18V ~ 36V
+ CIN
20µF
RUVLO1
100kΩ
UVLO
MOSFET1
FDD86012LZ
VIN GATE_P GATE_N
CS
VDR
CBYPASS2
1µF
RRAMP
6.8kΩ
RAMP
RCS
0.1Ω
EN
OFF ON
PGND
PWM
VCC_RECEIVER
RPULL_UP
10kΩ
ADD5211
ROVP1
560kΩ
OVP
ROVP2
16kΩ
FAULT
VDD
RLSD1
24kΩ
22 LEDs/CH, 100mA/CH
COUT
10µF
RON
20Ω
CIN2
0.1µF
RUVLO2
7.5kΩ
D1
S310
FB4
CBYPASS1
1µF
FB3
FB2
LSD
RLSD2
4.7kΩ
FB1
ISET
LGND
AGND FREQ
RFREQ
47kΩ
COMP
RC
68Ω
CC
2.2µF
SS
CSS
30nF
CC2
OPEN
10555-022
RSET
15kΩ
Figure 4. Typical Four-String Application Circuit
L1
33µH
18V ~ 36V
+ CIN
20µF
RUVLO1
100kΩ
CBYPASS2
1µF
UVLO
VDR
MOSFET1
FDD86012LZ
VIN GATE_P GATE_N
CS
RAMP
OFF ON
RRAMP
6.8kΩ
EN
PGND
PWM
VCC_RECEIVER
RPULL_UP
10kΩ
ADD5211
ROVP1
560kΩ
ROVP2
16kΩ
FAULT
FB4
CBYPASS1
1µF
FB3
FB2
LSD
RLSD2
4.7kΩ
RCS
0.1Ω
OVP
VDD
RLSD1
24kΩ
22 LEDs/CH, 100mA/CH
COUT
10µF
RON
20Ω
CIN2
0.1µF
RUVLO2
7.5kΩ
D1
S310
FB1
ISET
AGND FREQ
RFREQ
47kΩ
COMP
RC
68Ω
CC
2.2µF
SS
CC2
OPEN
CSS
30nF
10555-023
RSET
15kΩ
LGND
Figure 5. Typical Two-String Application Circuit
Rev. PrA | Page 5 of 6
ADD5211
Preliminary Technical Data
OUTLINE DIMENSIONS
PIN 1
INDICATOR
4.10
4.00 SQ
3.90
0.30
0.25
0.18
0.50
BSC
PIN 1
INDICATOR
24
19
18
1
2.65
2.50 SQ
2.45
EXPOSED
PAD
TOP VIEW
0.80
0.75
0.70
0.50
0.40
0.30
13
12
0.25 MIN
BOTTOM VIEW
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SEATING
PLANE
6
7
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-WGGD.
112108-A
0.20 REF
Figure 6. 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-24-7)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADD5211ACPZ-R7
ADD5211ACPZ-RL
1
Temperature Range
−25°C to +85°C
−25°C to +85°C
Package Description
24-Lead LFCSP_WQ, 7” Tape and Reel
24-Lead LFCSP_WQ, 13” Tape and Reel
Z = RoHS Compliant Part.
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10555-0-2/13(PrA)
Rev. PrA | Page 6 of 6
Package Option
CP-24-7
CP-24-7
Similar pages