ALSC ASM3P2180A-08TR Peak reducing emi solution Datasheet

September 2004
ASM3P2180A
rev 1.0
Peak Reducing EMI Solution
typical narrow band signal produced by
oscillators and most clock generators. Lowering
EMI by increasing a signal’s bandwidth is called
spread spectrum clock generation.
Features
• Generates an EMI optimized clocking
signal at the output.
• Selectable output frequency range.
• Single 1.25% or 2.4% down spread
output.
• Integrated loop filter components.
• Operates with a 3.3V supply.
• Low-power CMOS design.
• Available in 8-pin SOIC and 8-pin
TSSOP packages.
The ASM3P2180A uses the most efficient and
optimized modulation profile approved by the
FCC and is implemented by using a proprietary
all-digital method.
Applications
The ASM3P2180A is targeted towards notebook
LCD displays, other displays using an LVDS
interface, PC peripheral devices and embedded
systems.
Product Description
The ASM3P2180A is a versatile Spread
Spectrum frequency modulator designed
specifically for a wide range of clock
frequencies.
The
ASM3P2180A
reduces
electromagnetic interference (EMI) at the clock
source, allowing system wide reduction of EMI
of down stream clock and data dependent
signals. The ASM3P2180A allows significant
system cost savings by reducing the number of
circuit board layers and shielding that are
traditionally required to pass EMI regulations.
Key Specifications
Description
Supply voltages
Frequency
range
VDD = 3.3V ± 5%
FS1=0
FS1=1
Cycle-to-cycle jitter
Selectable spread percentage
The ASM3P2180A modulates the output of a
single PLL in order to “spread” the bandwidth of
a synthesized clock, thereby decreasing the
peak amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
Specification
Output duty cycle
Output rise and fall time
6 MHz ≤ Fin ≤10 MHz
18 MHz ≤ Fin ≤ 30 MHz
325 pS (max)
-1.25% or –2.4%
45/55% (worst case)
5ns (maximum)
Simplified Block Diagram
3.3V
X1
ASM3P2180A
X2
Spread spectrum output
(EMI suppressed)
Alliance Semiconductor
2595, Augustine Drive • Santa Clara • CA 95054 • Tel 408 855 4900 • Fax 408 855 4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
September 2004
ASM3P2180A
rev 1.0
Pin Diagram
CLKIN / X1
1
NC / X2
2
8
NC
7
FS1
ASM3P2180A
GND
3
6
VDD
SS%
4
5
CLKOUT
Modulation Width Selection
SS%
Output
0
FIN ≥ FOUT ≥ FIN – 1.25%
1
FIN ≥ FOUT ≥ FIN – 2.4%
Frequency Range Selection
FS1
Modulation Rate
0
6 ≤ FIN ≤10
1
18 ≤ FIN ≤ 30
Pin Description
Pin#
Pin Name
Type
Description
1
CLKIN / X1
I
2
NC / X2
O
3
GND
P
Ground to entire chip.
4
SS%
I
Modulation width selection. When spread spectrum feature is turned
on, this pin is used to select the amount of variation and peak EMI
reduction that is desired on the output signal. Internal pull-up resistor.
5
CLKOUT
O
Output modulated frequency. Copy of the un-modulated input clock.
6
VDD
P
Power supply for the entire chip (3.3V).
7
FS1
I
Frequency selection bit 1. This pin selects the frequency range of
operation. (Refer to the Frequency Range Selection Table). This pin
has an internal pull-up resistor.
8
NC
-
No connect.
Crystal connection or external reference frequency input. This pin has
dual functions. It can be connected to either an external crystal or an
external reference clock.
Crystal connection. Connection for an external crystal. If using an
external reference, this pin must be left unconnected.
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
2 of 7
September 2004
ASM3P2180A
rev 1.0
Absolute Maximum Ratings
Symbol
VDD, VIN
Parameter
Voltage on any pin with respect to GND
Rating
Unit
-0.5 to + 7.0
V
TSTG
Storage temperature
-65 to +125
°C
TA
Operating temperature
0 to 70
°C
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
GND – 0.3
-
0.8
V
2.0
-
VDD + 0.3
V
-
-
-27
µA
VIL
Input low voltage
VIH
IIH
Input high voltage
Input low current (pull-up resistors on inputs SS%,
FS1)
Input high current
-
-
18
µA
IXOL
XOUT output low current (@ 0.4V, VDD = 3.3V)
-
3
-
mA
IXOH
XOUT output high current (@2.5V, VDD = 3.3V)
-
4
-
mA
VOL
Output low voltage (VDD = 3.3V, IOL = 4mA)
-
-
0.4
V
VOH
Output high voltage (VDD = 3.3V, IOH = 4mA)
Dynamic supply current normal mode
(3.3V and 10pF loading)
Static supply current standby mode
2.5
-
-
V
8
21
35
mA
-
0.8
-
µA
Operating voltage
Power up time
(first locked clock cycle after power up)
Clock output impedance
2.8
3.3
3.7
V
-
0.18
-
mS
-
50
-
Ω
IIL
ICC
IDD
VDD
tON
ZOUT
AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
CLKIN
Input frequency
6
-
30
MHz
CLKOUT
Output frequency
6
-
30
MHz
tLH*
Output rise time (measured at 0.8V to 2.0V)
1.2
1.3
1.4
nS
tHL*
Output fall time (measured at 2.0V to 0.8V)
0.8
0.9
1.0
nS
tJC
Jitter (cycle to cycle)
-
-
325
pS
45
50
55
%
tD
Output duty cycle
*tLH and tHL are measured into a capacitive load of 15pF
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
3 of 7
September 2004
ASM3P2180A
rev 1.0
Package Information:
8-Pin SOIC Package
H
E
D
A2
A
C
A1
D
θ
e
L
B
Symbol Dimensions in inches
Dimensions in millimeters
Min
Max
Min
Max
A
0.057
0.071
1.45
1.80
A1
0.004
0.010
0.10
0.25
A2
0.053
0.069
1.35
1.75
B
0.012
0.020
0.31
0.51
C
0.004
0.01
0.10
0.25
D
0.186
0.202
4.72
5.12
E
0.148
0.164
3.75
4.15
e
0.050 BSC
1.27 BSC
H
0.224
0.248
5.70
6.30
L
0.012
0.028
0.30
0.70
0°
8°
0°
8°
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
4 of 7
September 2004
ASM3P2180A
rev 1.0
8-Pin TSSOP Package
H
E
D
A2
A
C
θ
e
A1
L
B
Symbol
Dimensions
in inches
Min
Max
Dimensions
in millimeters
Min
Max
A
0.047
A1
0.002
0.006
0.05
0.15
A2
0.031
0.041
0.80
1.05
B
0.007
0.012
0.19
0.30
C
0.004
0.008
0.09
0.20
D
0.114
0.122
2.90
3.10
E
0.169
0.177
4.30
4.50
e
1.10
0.026 BSC
0.65 BSC
H
0.244
0.260
6.20
6.60
L
0.018
0.030
0.45
0.75
θ
0°
8°
0°
8°
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
5 of 7
September 2004
ASM3P2180A
rev 1.0
Ordering Codes
Quantity
per reel
Ordering Number
Marking
Package Type
ASM3P2180A-08ST
ASM3P2180A
8-pin SOIC, tube
ASM3P2180A-08SR
ASM3P2180A
8-pin SOIC, tape and reel
ASM3P2180A-08TT
ASM3P2180A
8-pin TSSOP, tube
ASM3P2180A-08TR
ASM3P2180A
8-pin TSSOP, tape and reel
Temperature
0° C to 70°C
2500
0° C to 70°C
0° C to 70°C
2500
0° C to 70°C
Ordering Information
A S M 3 P 2 1 8 0 A - 0 8 S T
OR - SOT23/T/R
TT – TSSOP, TUBE
TR - TSSOP, T/R
VT – TVSOP, TUBE
VR – TVSOP, T/R
ST – SOIC, TUBE
SR - SOIC, T/R
QR – QFN, T/R
QT - QFN, TUBE
BT - BGA, TUBE
BR – BGA, T/R
PIN COUNT
PART NUMBER
X = Automotive
I = Industrial
P or n/c = Commercial
1 – reserved
6 – power management
2 - Non PLL based
7 – power management
3 – EMI Reduction
8 – power management
4 – DDR support products
9 – Hi performance
5 – STD Zero Delay Buffer
0 - reserved
Alliance Semiconductor Mixed Signal Product
Licensed under US patent Nos 5,488,627 and 5,631,920.
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
6 of 7
September 2004
ASM3P2180A
rev 1.0
Alliance Semiconductor Corporation
2595, Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Fax: 408-855-4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Part Number: ASM3P2180A
Document Version: v1.0
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
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companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance
assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best
data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice.
If the product described herein is under development, significant changes to these specifications are possible. The information in
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Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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