FDD6680A N-Channel, Logic Level, PowerTrench MOSFET General Description Features This N-Channel Logic level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. • RDS(ON) = 0.0130 Ω @ VGS = 4.5 V. Applications • • 56 A, 30 V. RDS(ON) = 0.0095 Ω @ VGS = 10 V • Low gate charge ( 23nC typical ). • Fast switching speed. • High performance trench technology for extremely low RDS(ON). DC/DC converter Motor drives D D G G S TO-252 Absolute Maximum Ratings Symbol S TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 30 V VGSS Gate-Source Voltage ±20 V ID Maximum Drain Current - Continuous (Note 1) 56 A (Note 1a) 14 Maximum Drain Current - Pulsed 100 Maximum Power Dissipation @ T C = 25oC PD T A = 25oC T A = 25oC T J, T stg (Note 1) 60 (Note 1a) 2.8 (Note 1b) W 1.3 -55 to +150 °C (Note 1) 2.1 °C/W (Note 1b) 96 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJC Thermal Resistance, Junction-to-Case RθJA Thermal Resistance, Junction-to-Ambient Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDD6680A FDD6680A 13’’ 16mm 2500 2000 Fairchild Semiconductor Corporation FDD6680A, Rev. C FDD6680A February 2000 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 200 mJ 56 A Drain-Source Avalanche Ratings (Note 1) W DSS IAR Single Pulse Drain-Source VDD = 15 V, ID = 56 A Avalanche Energy Maximum Drain-Source Avalanche Current Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID =250µA,Referenced to 25°C VDS = 24 V, VGS = 0 V 1 µA IGSSF Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 20 V, VDS = 0 V 100 nA VGS = -20 V, VDS = 0 V -100 nA IGSSR On Characteristics 30 V 23 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance ID =250µA,Referenced to 25°C -4 0.008 0.012 0.010 ID(on) On-State Drain Current VGS = 10 V, ID = 14 A VGS = 10 V,ID =14 A,TJ=125°C VGS = 4.5 V, ID = 12 A VGS = 5 V, VDS = 5 V gFS Forward Transconductance VDS = 10 V, ID = 14 A 41 VDS = 15 V, VGS = 0 V, f = 1.0 MHz 2180 pF 500 pF 255 pF 1 1.5 3 V mV/°C 0.0095 0.0160 0.0130 50 Ω A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge (Note 2) VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω VDS = 15 V, ID = 14 A, VGS = 5 V, 13 24 14 26 ns ns 43 70 ns 15 27 ns 23 33 nC 7 nC 11 nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.3 A (Note 2) 0.72 2.3 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the drain tab. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA= 45oC/W when mounted b) RθJA= 96oC/W on a minimum on a 1in2 pad of 2oz copper. mounting pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDD6680A, Rev. C FDD6680A Electrical Characteristics FDD6680A Typical Characteristics 2.2 4.5V 3.5V 40 VGS = 10V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID, DRAIN-SOURCE CURRENT (A) 50 3.0V 30 20 2.5V 10 0 0 1 2 2 VGS = 3.0V 1.8 1.6 3.5V 1.4 4.0V 4.5V 1.2 6.0V 1 10V 0.8 3 0 10 VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. 40 0.03 ID = 7 A ID = 14A VGS = 10V RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 30 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 1.4 1.2 1 0.8 0.6 0.025 0.02 o 0.015 TA = 125 C 0.01 o TA = 25 C 0.005 0 -50 -25 0 25 50 75 100 125 150 2 4 o 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VDS = 5V o IS, REVERSE DRAIN CURRENT (A) 50 ID, DRAIN CURRENT (A) 20 ID, DRAIN CURRENT (A) o TA = -55 C 25 C o 125 C 40 30 20 10 0 VGS = 0V 10 o TA = 125 C 1 o 25 C 0.1 o -55 C 0.01 0.001 0.0001 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDD6680A, Rev. C (continued) 10 VGS, GATE-SOURCE VOLTAGE (V) FDD6680A Typical Characteristics 3500 VDS = 5V ID = 14A 10V f = 1MHz VGS = 0 V 3000 15V CAPACITANCE (pF) 8 6 4 2500 CISS 2000 1500 1000 2 500 0 COSS CRSS 0 0 10 20 30 40 50 0 5 Qg, GATE CHARGE (nC) 20 25 30 200 P(pk), PEAK TRANSIENT POWER (W) 1000 RDS(ON) LIMIT 100 100µs 1ms 10ms 100ms 10 1s 10s 1 DC VGS = 10V SINGLE PULSE o RθJA = 96 C/W 0.1 TA = 25oC 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 96 °C/W TA = 25°C 150 100 50 0 0.001 0.01 0.1 1 10 100 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 15 Figure 8. Capacitance Characteristics. Figure 7. Gate-Charge Characteristics. ID, DRAIN CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA 0.2 0.1 RθJA = 96 °C/W 0.1 0.05 P(pk) 0.02 0.01 t1 0.01 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient themal response will change depending on the circuit board design. FDD6680A, Rev. C TO-252 Tape and Reel Data and Package Dimensions D-PAK (TO-252) Packaging Configuration: Figure 1.0 Packaging Description: TO-252 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). This and some other options are further described in the Packaging Information table. EL ECT ROST AT IC SEN SIT IVE DEVICES DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms Antistatic Cover Tape ESD Label These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. Static Dissipative Embossed Carrier Tape F63TNR Label FZ9935 FDD 6680 FZ9935 FDD 6680 FZ9935 FDD 6680 FZ9935 FDD 6680 D-PAK (TO-252) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Standard (no flow code) TNR D-PAK (TO-252) Unit Orientation 2,500 13" Dia Reel Size Box Dimension (mm) 359x359x57 Max qty per Box 5,000 Weight per unit (gm) 0.300 Weight per Reel(kg) 1.200 359mm x 359mm x 57mm Standard Intermediate box ESD Label Note/Comments F63TNR Label sample F63TNR Label LOT: CBVK741B019 QTY: 2500 FSID: FDD6680 SPEC: D/C1: Z9942 D/C2: QTY1: QTY2: SPEC REV: CPN: N/F: F (F63TNR)3 TO-252 (D-PAK) Tape Leader and Trailer Configuration: Figure 2.0 Carrier Tape Cover Tape Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets July 1999, Rev. A TO-252 Tape and Reel Data and Package Dimensions D-PAK (TO-252) Embossed Carrier Tape Configuration: Figure 3.0 P0 D0 T E1 F K0 Wc W E2 B0 Tc A0 D1 P1 User Direction of Feed Dimensions are in millimeter Pkg type TO252 (24mm) A0 B0 6.90 +/-0.10 10.50 +/-0.10 W 16.0 +/-0.3 D0 D1 E1 E2 1.55 +/-0.05 1.5 +/-0.10 1.75 +/-0.10 F 14.25 min 7.50 +/-0.10 P1 P0 8.0 +/-0.1 4.0 +/-0.1 K0 2.65 +/-0.10 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). T Wc 0.30 +/-0.05 0.06 +/-0.02 0.9mm maximum 10 deg maximum Typical component cavity center line B0 13.0 +/-0.3 Tc 0.9mm maximum 10 deg maximum component rotation Typical component center line Sketch A (Side or Front Sectional View) A0 Component Rotation Sketch C (Top View) Component lateral movement Sketch B (Top View) D-PAK (TO-252) Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max B Min Dim C Dim A max Dim D min Dim N DETAIL AA See detail AA W3 13" Diameter Option W2 max Measured at Hub Dimensions are in inches and millimeters Tape Size 164mm Reel Option 13" Dia Dim A Dim B 13.00 330 0.059 1.5 Dim C 512 +0.020/-0.008 13 +0.5/-0.2 Dim D 0.795 20.2 Dim N 4.00 100 Dim W1 0.646 +0.078/-0.000 16.4 +2/0 Dim W2 0.882 22.4 Dim W3 (LSL-USL) 0.626 – 0.764 15.9 – 19.4 July 1999, Rev. A TO-252 Tape and Reel Data and Package Dimensions TO-252 (FS PKG Code AA) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.300 September 1999, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISOPLANAR™ MICROWIRE™ POP™ PowerTrench QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. D