FAN3850T Microphone Pre-Amplifier with Temperature Compensation and Digital Output Description Features Optimized for Mobile Handset and Notebook PC Microphone Applications Accepts Input from Electret Condenser Microphones Low Input Capacitance, High PSR, 20kHz Pre-Amplifier Low-Power, 1.5µA Sleep Mode Pulse Density Modulation (PDM) Output Standard 5-Wire Digital Interface Amplifier Gain: 15.7dB Negative Temperature Coefficient to Compensate for ECM Positive Temperature Coefficient The FAN3850T integrates a pre-amplifier, LDO, and Analog-to-Digital Converter (ADC) to convert Electret Condenser Microphone (ECM) outputs to digital Pulse Density Modulation (PDM) data streams. The preamplifier accepts analog signals from the ECM and drives an over-sampled sigma delta ADC and outputs PDM data. The PDM digital audio has the advantage of noise rejection and interface-to-mobile handset processors. The FAN3850T is powered from the system supply rails up to 3.63V, with a low power consumption of only 0.85mW, and less than 20μW in Power-Down Mode. The device compensates for the temperature variation of the microphone element to achieve a flat sensitivity response over-temperature. Typical 420µA Supply Current Signal to Noise Ratio of 62.4dB(A) Input Clock Frequency Range of 1-4MHz Integrated Low Drop-Out Regulator (LDO) INPUT Pre-Amp Small 1.26mm x 0.86mm 6-Ball WLCSP Applications Sleep Mode Ctrl LDO Total Harmonic Distortion: 0.01% ADC GND Electret Condenser Microphones with Digital Output Mobile Handsets Headset Accessories Personal Computers (PC) CLOCK DATA SELECT Figure 1. Block Diagram Ordering Information Part Number Gain Option Operating Temperature Range FAN3850TUC15X35 15.7dB -30°C to +85°C Package 6-Ball, Wafer-Level Chip-Scale Package (WLCSP) Packing Method 3000 Unit Tape & Reel Note: 1. Alternate gain options and temperature coefficient slopes are possible. Please contact a Fairchild representative. © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 www.fairchildsemi.com FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output October 2011 Figure 2. Pin Configuration (Top View) Pin Definitions Pin# Name Type A1 CLOCK Input Clock Input B1 GND Input Ground Pin C1 DATA Output A2 SELECT Input Rising or Falling Clock-Edge Select B2 INPUT Input Microphone Input C2 VDD Input Device Power Pin © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 Description PDM Output – 1-Bit ADC FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Pin Configuration www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VDD VIO ESD Parameter Min. Max. Unit DC Supply Voltage -0.3 4.0 V Analog and Digital I/O -0.3 VCC+0.3 V Human Body Model, JESD22-A114(2), All Pins Except Microphone Input ±7 kV Human Body Model, JESD22-A114(2), Microphone Input ±300 V Note: 2. This device is fabricated using CMOS technology and is therefore susceptible to damage from electrostatic discharges. Appropriate precautions must be taken during handling and storage of this device to prevent exposure to ESD. Reliability Information Symbol TJ TSTG TREFLOW JA Parameter Min. Typ. Junction Temperature Storage Temperature Range -65 Peak Reflow Temperature Thermal Resistance, JEDEC Standard, Multilayer Test Boards, Still Air Max. Unit +150 °C +125 °C +260 °C 90 °C/W Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. TA Operating Temperature Range -30 VDD Supply Voltage Range 1.64 tRF-CLK Clock Rise and Fall Time © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 Typ. Max. Unit +85 °C 1.80 3.63 V 10 ns FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Absolute Maximum Ratings www.fairchildsemi.com 3 Unless otherwise specified, all limits are guaranteed for TA=25°C, VDD=1.8V, VIN=94dB (SPL), fCLK=2.4MHz, duty cycle = 50%, and CMIC=15pF. Symbol Parameter Condition Min. Typ. Max. Unit 1.64 1.80 3.63 V VDD Supply Voltage Range IDD Supply Current INPUT=AC Coupled to GND, CLOCK=On, No Load 420 ISLEEP Sleep Mode Current fCLK=GND 1.4 PSR Power Supply Rejection(7) INPUT=AC Coupled to GND, Test Signal on VDD=217Hz Square Wave and Broad Band Noise(3) both 100mVP-P -80 dBFS INNOM Nominal Sensitivity INPUT=94dBSPL -26 dBFS SNR Signal-to-Noise Ratio fIN=1kHz 1Pa, A-Weighted 62.4 dB(A) Input Referred Noise(7) 20Hz to 20kHz, A-Weighted 15.7dB Gain 5.3 8.6 µVRMS % eN THD THD+N tc (4) (5) Total Harmonic Distortion (7) THD and Noise Temperature Coefficient (7,11) (7,11) fIN=1kHz, INPUT=-26dBFS 0.01 0.10 0.2 1.0 fIN=1kHz, INPUT=-5dBFS 1.0 5.0 fIN=1kHz, INPUT=0dBFS 5.0 10.0 Gain Measured at 50˚C and -10˚C Input Capacitance INPUT RIN Input Resistance(7,11) INPUT VIL CLOCK & SELECT Input, Logic LOW Level VIH CLOCK & SELECT Input, Logic HIGH Level VOL Data Output, Logic LOW Level VOH Data Output, Logic HIGH Level VIN15dB Maximum Input Signal for (5) 15.7dB of Gain Acoustic Overload Point (11) 8.0 50Hz ≤ fIN ≤ 1kHz, INPUT=-20dBFS CIN VOUT μA dB/˚C 0.2 pF GΩ 0.3 V VDD+0.3 V 0.35×VDD V V 0.65×VDD fIN=1 kHz, THD+N < 10%; DC Level=0V 503 120 THD < 10% % -0.035 >100 1.5 μA mVPP dBSPL Continued on the following page… © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Electrical Characteristics www.fairchildsemi.com 4 Unless otherwise specified, all limits are guaranteed for TA=25°C, VDD=1.8V, VIN=94dB (SPL), fCLK=2.4MHz, duty cycle = 50%, and CMIC=15pF. Symbol Parameter Condition Min. Typ. Max. Unit tA Time from CLOCK Transition to Data Becoming Valid On Falling Edge of CLOCK, SELECT=GND, CLOAD=15pF 18 43 tB Time from CLOCK Transition to Data Becoming Hi-Z On Rising Edge of CLOCK, SELECT=GND, CLOAD=15pF 0 5 tA Time from CLOCK Transition to Data Becoming Valid On Rising Edge of CLOCK, SELECT=VDD, CLOAD=15pF 18 56 tB Time from CLOCK Transition to Data Becoming Hi-Z On Falling Edge of CLOCK, SELECT=VDD, CLOAD=15pF 0 5 16 ns Input CLOCK Frequency(8) Active Mode 1.0 2.4 4.0 MHz fCLK (7) CLKdc CLOCK Duty Cycle tWAKEUP Wake-Up Time(9) fCLK=2.4MHz Fall-Asleep Time(10) fCLK=2.4MHz tFALLASLEEP 40 0 ns 16 ns ns 50 60 % 0.35 2.00 ms 0.01 1.00 ms CLOAD Load Capacitance on Data 100 pF Notes: 3. Pseudo-random noise with triangular probability density function. Bandwidth up to 10MHz. 4. Assumes 120dB(SPL) is mapped to 0Dbfs. 5. Assumes an input -41, or -38dBV, depending on the part-specific gain. 6. Verified by design simulation, showing idle tones and low noise level modulation to be typical 96dB. 7. Guaranteed by characterization. 8. All parameters are tested at 2.4MHz. Frequency range guaranteed by characterization. 9. Device wakes up when fCLK ≥ 300kHz. 10. Device falls asleep when fCLK ≤ 70kHz. 11. Guaranteed by design. 12. Temperature coefficient is calculated by measuring gain in db at 50˚C and -10°C and dividing by 60 (Gain(50°C) – Gain(-10°C)/60). FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Electrical Characteristics (Continued) Figure 3. Interface Timing © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 www.fairchildsemi.com 5 Unless otherwise specified, all limits are guaranteed for TA=25°C, VDD=1.8V, VIN=94dB(SPL), fCLK=2.4MHz, and duty cycle=50%. 90.00 80.00 SNR (dBa), THD (dB), SINAD (dB) 70.00 60.00 50.00 40.00 30.00 20.00 10.00 0.00 ‐10.00 ‐20.00 0.001 0.010 0.100 1.000 10.000 100.000 1000.000 Input Signal (mVpp) SNR (dBa) THD (dB) SINAD (dB) Figure 4. THD, SINAD, and SNR vs. Input Amplitude ‐100.0 ‐90.0 80.0 ‐80.0 ‐70.0 60.0 ‐60.0 ‐50.0 40.0 ‐40.0 20.0 ‐30.0 ‐20.0 0.0 0.00 ‐1.63 ‐3.55 ‐5.54 ‐7.53 ‐9.54 ‐11.54 ‐13.55 ‐15.55 ‐17.56 ‐19.55 ‐25.55 ‐31.58 ‐37.57 ‐43.57 ‐49.57 ‐55.56 ‐61.57 ‐65.57 ‐71.59 ‐77.62 ‐83.76 ‐20.0 ‐89.50 ‐10.0 ‐95.77 SNR(dBa), THD (dB), SINAD (dB), Noise (dBFs) 100.0 FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Typical Performance Characteristics 0.0 Signal Output Level (dBFs) SNR (dBa) THD (dB) SINAD (dB) Noise (dBFS) Figure 5. THD, SINAD, and SNR vs. Output Level © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 www.fairchildsemi.com 6 16.6 Averag Gain (dB) 16.4 16.2 16.0 15.8 15.6 15.4 15.2 Temperature ˚C Figure 6. Gain vs. Temperature (~.035db/˚C)(1) Note: 13. Alternate temperature coefficient slopes are possible. Please contact a Fairchild representative. © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 50 40 30 20 0 14.8 10 15.0 FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output 16.8 www.fairchildsemi.com 7 VDD Audio Output SPEAKER CLOCK INPUT PreAmp. DATA ADC SELECT Clk SDI SDO L/R Serial Port Noise Shaper Low Pass Filter Interpolation Decimation Applications Software Figure 7. Mono Microphone Application Circuit VDD Audio Output SPEAKER CLOCK INPUT PreAmp DATA ADC SELECT Clk SDI SDO L/R Serial Port Noise Shaper Low Pass Filter VDD Decimation CLOCK INPUT PreAmp Applications Software DATA ADC Interpolation FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Applications Information SELECT Figure 8. Stereo Microphone Application Circuit © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 www.fairchildsemi.com 8 Applications Information A 0.1µF decoupling capacitor is required for VDD. It can be located either inside the microphone or on the PCB very close to the VDD pin. A 100Ω resistance is recommended on the clock output of the device driving the FAN3850T to minimize ringing and improve signal integrity. Due to high input impedance, careful consideration should be taken to remove all flux used during the reflow soldering process. For optimal PSR, route a trace to the VDD pin. Do not place a VDD plane under the device. © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Figure 9. MIC Element Drawing www.fairchildsemi.com 9 F 0.03 C E 2X A A1 B 0.570 (Ø0.120) CU PAD 0.485 PIN A1 AREA D 2X TOP VIEW (Ø0.220) SOLDER MASK 0.03 C RECOMMENDED LAND PATTERN (NSMD) 0.06 C 0.01 C 0.300 0.254 C SEATING PLANE 0.197±0.013 0.080±0.010 E D SIDE VIEWS NOTES: 0.005 0.570 C A B A. NO JEDEC REGISTRATION APPLIES. Ø0.120±0.010 6X B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. C 0.485 B D. DATUM C, THE SEATING PLANE IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. (Y) +/-0.018 A 1 2 E. PACKAGE TYPICAL HEIGHT IS 273 MICRONS ±23 MICRONS (254-300 MICRONS). F F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. (X) +/-0.018 BOTTOM VIEW G. DRAWING FILENAME: UC006AHrev3. Figure 10. 6-Ball, Wafer-Level Chip-Scale Package (WLCSP) Table 1. FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output Physical Dimensions Product-Specific Dimensions D E X Y 1.260mm 0.860mm 0.145mm 0.145mm Ball Composition: SN97.5-Ag2.5 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 www.fairchildsemi.com 10 FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output © 2011 Fairchild Semiconductor Corporation FAN3850T • Rev. 3.0.0 www.fairchildsemi.com 11