AD CN-0082 Creating a constant envelope signal using the adl5331 rfvga and ad8319 log detector Datasheet

Circuit Note
CN-0082
Devices Connected/Referenced
Circuit Designs Using Analog Devices Products
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ADL5331
RF Variable Gain Amplifier (VGA)
AD8319
45-dB RF Log Detector/Controller
AD5621
12-Bit nanoDAC®
Creating a Constant Envelope Signal Using the ADL5331 RFVGA
and AD8319 Log Detector
CIRCUIT FUNCTION AND BENEFITS
CIRCUIT DESCRIPTION
Overall performance of a transmitter, wired or wireless, is a strong
function of the output power of the amplifier. If the signal is weak,
bit error rate (BER) or modulation error rate (MER) will degrade
due to low SNR. If the signal is too strong, distortion will cause the
same issues. This circuit uses the ADL5331 VGA, the AD8319
power detector, and the AD5621 low power nanoDAC to generate
output power control accurate to 12 bits. The AD8319 has very
high temperature stability to compensate for any gain variation
over temperature of the VGA, resulting in very accurate power
control over a wide temperature range. Because the AD8319
control input VSET and the output VOUT are related to the RF input
on a volts/dB scale and the AD5621 nanoDAC has a linear transfer
function, the resulting output power control will be a linear-in-dB
vs. DAC input code.
The ADL5331 variable gain amplifier provides accurate gain
control. However, more precise regulation of output power is
achieved with an automatic gain control (AGC) loop. Figure 1
shows the ADL5331 operating in an AGC loop. The addition of
the AD8319 log amp allows the AGC to have improved
temperature stability over a wide output power control range.
To operate the ADL5331 VGA in an AGC loop, a sample of the
output RF is back to the detector (typically using a directional
coupler and additional attenuation). A setpoint voltage is
applied by the AD5621 DAC to the VSET input of the detector
while VOUT is connected to the GAIN pin of the ADL5331.
Based on the detector’s defined linear-in-dB relationship
between VOUT and the RF input signal, the detector adjusts the
voltage on the GAIN pin (the detector’s VOUT pin is an error
+5V
+5V
RF INPUT
SIGNAL
120nH
100pF
VPOS
COMM
INHI
100pF
OPHI
ADL5331
INLO
+5V
12-BIT DAC
GND
VOUT
SETPOINT
VOLTAGE
1kΩ
VOUT
VSET
1nF
AD8319
490Ω
220pF
VPOS
INHI
LOG AMP
CLPF
INLO
COMM
1nF
08323-001
SDIN
VDD
AD5621
23dB
ETC1-1-13 DIRECTIONAL
(M/A-COM) COUPLER
GAIN
+5V
SCLK
100pF
OPLO
100pF
ETC1-1-13
(M/A-COM)
SYNC
RF OUTPUT
SIGNAL
120nH
Figure 1. ADL5331 Operating in an Automatic Gain Control Loop in Combination
with the AD8319 and AD5621 (Simplified Schematic)
Rev. 0
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CN-0082
Circuit Note
2.5
0
–10
ERROR (dBm)
0
–20
–2.5
–30
2024
2524
AD5621 DAC CODE
–5.0
3524
3024
08323-002
1524
Figure 2. ADL5331 Power Out vs. AD5621 DAC Code with
RF Input Signal = 0 dBm
20
5.0
POWER OUT
STRAIGHT LINE
ERROR
10
2.5
0
–10
ERROR (dBm)
0
–20
–2.5
–30
–5.0
1780
2280
2780
3280
AD5621 DAC CODE
08323-003
–40
1280
3780
Figure 3. ADL5331 Power Out vs. AD5621 DAC Code with
RF Input Signal = −10 dBm
20
Rev. 0 | Page 2 of 4
5.0
POWER OUT
STRAIGHT LINE
ERROR
10
2.5
0
0
–10
ERROR (dBm)
ADL5331 OUTPUT POWER (dBm)
In order for the AGC loop to remain in equilibrium, the
AD8319 must track the envelope of the ADL5331 output signal
and provide the necessary voltage levels to the ADL5331’s gain
control input. Figure 5 shows an oscilloscope screenshot of the
AGC loop in Figure 1. A 100 MHz sine wave with 50% AM
modulation is applied to the ADL5331. The output signal from
the ADL5331 is a constant envelope sine wave with amplitude
corresponding to a setpoint voltage at the AD8319 of 1.5 V.
Also shown is the gain control response of the AD8319 to the
changing input envelope.
POWER OUT
STRAIGHT LINE
ERROR
10
–40
1024
The detector’s error amplifier uses CLFP, a ground-referenced
capacitor pin, to integrate the error signal (in the form of a
current). A capacitor must be connected to CLFP to set the
loop bandwidth and to ensure loop stability.
Figure 2, Figure 3, and Figure 4 show the transfer function of
the ADL5331 output power vs. the AD5621 DAC code for a
100 MHz sine wave with an input power of 0 dBm, −10 dBm,
and −20 dBm. Note that the power control of the AD8319 has a
negative sense. Decreasing the DAC code, which corresponds
to demanding a higher signal from the ADL5331, tends to
increase GAIN.
5.0
–20
–2.5
–30
–40
1280
–5.0
1780
2280
2780
3280
AD5621 DAC CODE
3780
Figure 4. ADL5331 Power Out vs. AD5621 DAC Code with
RF Input Signal = −20 dBm
08323-004
A coupler/attenuation of 23 dB is used to match the desired
output power range from the VGA to the linear operating
range of the AD8319. In this case, the desired output power
range of the VGA is −15 dBm to +15 dBm. With the given
attenuator/coupler, the range of power to the AD8319 RF input
is −8 dBm to −38 dBm, within the specified range of −3 dBm to
−43dBm for a ±1 dB error.
ADL5331 OUTPUT POWER (dBm)
The basic connections for operating the ADL5331 in an AGC
loop with the AD8319 are shown in Figure 1. The AD8319 is a
1 MHz to 10 GHz precision demodulating logarithmic
amplifier. It offers a detection range of 45 dB with ±0.5 dB
temperature stability. The VOUT pin of the AD8319 controls the
GAIN (gain control) pin of the ADL5331. When the AD8319 is
in controller mode, as it is in this application, VOUT on the
AD8319 can drive the ADL5331 GAIN pin over its full linear
range of 0 V to 1.4 V. Under very low power RF in conditions,
outside the linear control range of the loop, VOUT on the
AD8319 may be driven to its maximum value very close to
VPOS. To avoid overdrive recovery issues with the ADL5331
GAIN input, a voltage divider can be placed between VOUT on
the AD8319 and GAIN on the ADL5331. This may have a slight
effect on the overall speed of the loop, for instance, when the
input power to the ADL5331 is stepped.
20
ADL5331 OUTPUT POWER (dBm)
amplifier output) until the level at the RF input corresponds to
the applied setpoint voltage. GAIN settles to a value that results
in the correct balance between the input signal level at the
detector and the setpoint voltage.
Circuit Note
CN-0082
T
AM MODULATED INPUT
T
CURS1 POS
4.48µs
1
CURS2 POS
2.4µs
t1: 4.48µs
t2: 2.4µs
Δt: –2.08µs
1/Δt: –480.8kHz
AD8319 OUTPUT
2
2
MEAN(C1) 440.3mV
AMPL(C1) 3.36V
AMPL(C2) 900mV
ADL5331 OUTPUT
M2.00ms
A CH4
T
0.00000s
1.80V
CH2 500mV
08323-005
CH1 250mV Ω CH2 200mV
CH3 250mV Ω
CH3 200mV Ω
B
W
M 4.0µs 12.5MS/s 80.0ns/pt
A CH1
150mV
Figure 6. Oscilloscope Screenshot Showing the ADL5331 Output
Figure 5. Oscilloscope Screenshot Showing an
AM Modulated Input Signal
Figure 6 shows the response of the AGC RF output to a pulse
on VSET. As VSET decreases to 1 V, the AGC loop responds with
an RF burst. Response time and the amount of signal
integration are controlled by the capacitance at the AD8319
CLFP pin—a function analogous to the feedback capacitor
around an integrating amplifier. An increase in the capacitance
results in a slower response time.
LEARN MORE
The circuit must be constructed on a multilayer PC board with
a large area ground plane. Proper layout, grounding, and
decoupling techniques must be used to achieve optimum
performance (see Tutorial MT-031 and Tutorial MT-101 and
the ADL5331and AD8319 evaluation board layouts).
MT-078 Tutorial, High Speed Log Amps. Analog Devices.
MT-031 Tutorial, Grounding Data Converters and Solving the
Mystery of"AGND" and "DGND." Analog Devices.
MT-073 Tutorial, High Speed Variable Gain Amplifiers. Analog
Devices.
MT-077 Tutorial, Log Amp Basics. Analog Devices.
MT-101 Tutorial, Decoupling Techniques. Analog Devices.
Whitlow, Dana. Design and Operation of Automatic Gain
Control Loops for Receivers in Modern Communications
Systems. ChapterVIII, Analog Devices Wireless
Seminar (2006).
On the underside of the ADL5331 and AD8319 chip scale
packages, there is an exposed compressed paddle. This paddle is
internally connected to the chip’s ground. Solder the paddle to
the low impedance ground plane on the printed circuit board to
ensure the specified electrical performance and to provide
thermal relief. It is also recommended that the ground planes
on all layers under the paddle be stitched together with vias to
reduce thermal impedance.
AD8319 Evaluation Board.
COMMON VARIATIONS
AD8368 Data Sheet.
This circuit can be used to implement a constant power out
function (fixed setpoint with variable input power) or a variable
power out function (variable setpoint with fixed or variable
input power). If a higher output power control range is desired,
the AD8318 log amp (60 dB power detection range) can be used
in place of the AD8319. For a constant output power function,
the lower dynamic range of the AD8319 will be adequate since
the loop will always servo the detector’s input power to a
constant level.
ADL5331 Data Sheet.
Data Sheets and Evaluation Boards
AD5621 Data Sheet.
AD8318 Data Sheet.
AD8319 Data Sheet.
ADL5331 Evaluation Board.
REVISION HISTORY
7/09—Revision 0: Initial Version
The ADL5331 VGA, which is optimized for transmit
applications, can also be replaced by the AD8368 VGA. The
AD8368 is optimized for low frequency receive applications up
to 800 MHz and provides 34 dB of linear-in-dB voltagecontrolled variable gain.
Rev. 0 | Page 3 of 4
08323-006
3
CN-0082
Circuit Note
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©2009Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
CN08323-0-7/09(0)
Rev. 0 | Page 4 of 4
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