Analogic AAT2687 Pmic solution for 24v systems with 2 high performance step-down converter Datasheet

PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
General Description
Features
The AAT2687 provides two independently regulated DC
outputs; consisting of a high voltage step-down regulator and a low input voltage low dropout (LDO) regulator.
The PMIC is optimized for low-cost 12V adapter inputs,
making the device the ideal system-on-a-chip power
solution for consumer communications equipment.
• 2-Output Step-Down Converters:
▪ Channel 1 Step-Down: VIN1 = 6V to 24V
• VOUT1 Adjustable from 1.5V to 5.5V
• IOUT1 up to 4.5A
• High Switching Frequency
• Voltage Mode Control
• PWM Fixed Frequency for Low-Ripple
▪ Channel 2 (LDO): VIN2 = 2.7V to 5.5V
• IOUT2 up to 600mA
• 1V Dropout Voltage at 600mA
• High Accuracy ±1.5%
• Small Solution Size
▪ System On a Chip
▪ Ultra-small External L/C
• Shutdown Current <35μA
• Independent Enable Pins
• Programmable Over-Current Protection
• Over-Temperature Protection
• Internal Soft Start
• 4x5mm 24-Pin TQFN Low Profile Thermally Enhanced
Package
• -40°C to 85°C Temperature Range
Channel 1 is a step-down regulator with an input voltage
range 6.0 to 24V, providing up to 4.5A output current.
490kHz fixed switching frequency allows small L/C filtering components. Channel 1 utilizes voltage mode control
configured for optimum performance across the entire
output voltage and load range.
Channel 2 is a low-dropout (LDO) regulator providing up
to 600mA output current. The device provides extremely
low output noise, low quiescent current and excellent
transient response.
The controller includes integrated cycle-by-cycle overcurrent protection, soft-start and over-temperature disable features. Independent input and enable pins provide maximum design flexibility.
The AAT2687 is available in the Pb-free, 4x5mm 24-pin
TQFN package. The rated operating temperature range is
-40°C to 85°C.
Applications
•
•
•
•
DSL and Cable Modems
Notebook Computers
Satellite Settop Box
Wireless LAN Systems
Typical Application
C3
0.1µF
J1
VIN1
6.0V - 24.0V
D1
BAS16
2
1
C14
2.2µF
VL1
RS1
AAT2687
EN1
IN2
2687.2008.06.1.0
C1
220µF
25V
C13
1µF
25V
C2
2.2µF
C10
2.2nF
R5
450
R3
8.87k
C8
C9
C7
22µF 22µF 22µF
FB1
COMP1
VIN2
R2 C4
2k 220nF
OS1
IN1
+
4.7µH 5.3A
D2
BST
VOUT1
3.3V/4.5A
L1
LX1
OUT2
R1
3.92K
C5
2.2nF
C6
R4
VOUT2 150pF
1.8V/600mA 1.96k
C12
2.2µF
EN2 GND
TQFN45-24
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1
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Pin Descriptions
Pin #
Symbol
1
LX1
2
LX1
3, 4
N/C
5
BST1
6
EN1
7
GND2
8
EN2
9
N/C
10
IN2
11
OUT2
12
N/C
13
RS1
14
OS1
15
COMP1
16
FB1
17
GND1
18
VL1
19
20
21
VL1
N/C
N/C
22
IN1
23
LX1
24
LX1
EP
EP
2
Function
Channel 1 step-down converter switching pin. Connect output inductor to this pin. Connect all four LX1 pins
together.
Channel 1 step-down converter switching pin. Connect output inductor to this pin. Connect all four LX1 pins
together.
No Connect. Can be used to route IN1 and EP.
Channel 1 step-down regulator boost drive input pin. Connect the cathode of fast rectifier from this pin and
connect a 100nF capacitor from this pin to the channel 1 switching node (LX1) for internal high-side MOSFET
gate drive.
Channel 1 step-down regulator enable input pin. Active high enables the channel 1 output. It can be tied to VIN1.
Ground pin for Channel 2. Power return pin for channel 2. Connect return of channel 2 input and output capacitors close to this pin for best noise performance.
Channel 2 linear low dropout (LDO) enable input pin. Active high enables the channel 2 output. It can be tied
to VOUT1.
No Connect. Can be used to route IN2.
Input supply voltage pin for channel 2 linear low dropout (LDO) regulator. Connect 2.2μF ceramic input capacitor close to this pin.
Output of channel 2 of linear low dropout (LDO) regulator. Connect a 2.2μF ceramic capacitor from this pin to
GND pin.
No Connect. Can be used to route OUT2.
Channel 1 output current sense pin. Connect a small signal resistor from this pin to channel 1 switching node
(LX) to enable over-current sense for step-down converter.
Channel 1 output sense voltage pin. Connect to the output capacitor to enable over-current sense for stepdown converter.
Compensation pin for channel 1 step-down regulator. Connect a series resistor, capacitor network to compensate the voltage mode control loop.
Feedback input pin for channel 1 step-down converter. Connect an external resistor divider to this pin to program the output voltage to the desired value.
Ground pin for Channel 1. Power return pin for channel 1. Connect return of channel 1 input and output capacitors close to this pin for best noise performance.
Internal linear regulator for channel 1 step-down converter. Connect a 2.2μF/6.3V capacitor from this pin to
GND1 pin.
Internal linear regulator for channel 1 step-down converter. Connect to pin 18.
No Connect. Do not connect to any node on the PCB.
No Connect. Can be connected to GND.
Input supply voltage pin for channel 1 step-down regulator. Connect both IN1 pins together. Connect the input
capacitor close to this pin for best noise performance.
Channel 1 step-down converter switching pin. Connect output inductor to this pin. Connect all four LX1 pins
together.
Channel 1 step-down converter switching pin. Connect output inductor to this pin. Connect all four LX1 pins
together.
Exposed paddle tied to IN1. Connect to PCB heatsink for optimum thermal performance of internal LDO device.
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2687.2008.06.1.0
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Pin Configuration
TQFN45-24
(Top View)
N/C
N/C
IN1
LX1
LX1
20
21
22
23
24
LX1
LX1
N/C
N/C
BST1
EN1
GND2
1
19
2
18
3
17
4
16
5
15
6
14
7
13
VL1
VL1
GND1
FB1
COMP1
OS1
RS1
12
11
10
9
8
N/C
OUT2
IN2
N/C
EN2
Absolute Maximum Ratings1
Symbol
Description
VIN1, VEN1
VIN2
VBST1-LX1
VCONTROL
VEN2
IIN1(PULSED)
TJ
TLEAD
IN1, LX, EN1 to GND
IN2, VL1, OUT2 to GND
BST1 to LX1
FB1, COMP1, RS1, OS1, OUT2 to GND
EN2 to GND
IN1 to LX1
Operating Junction Temperature Range
Maximum Soldering Temperature (at leads, 10 sec)
Value
Units
-0.3 to 30.0
-0.3 to 6.0
-0.3 to 6.0
-0.3 to VIN(LO) + 0.3
-0.3 to VIN2 + 0.3
12.0
-40 to 150
300
V
V
V
V
V
A
°C
°C
Value
Units
33
3.0
°C/W
W
Thermal Information
Symbol
ΘJA
PD
Description
Thermal Resistance2
Maximum Power Dissipation3
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions
specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board with exposed paddle connected to ground plane.
3. Derate 30 mW/°C above 25°C ambient temperature.
2687.2008.06.1.0
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3
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Electrical Characteristics1
VIN1 = 12.0V, VIN2 =3.3V; TA = -40°C to 85°C, unless noted otherwise. Typical values are at TA = 25°C.
Symbol
Description
Conditions
Channel 1: Step-Down Converter
VIN1
Input Voltage
VUVLO1
UVLO Threshold
Min
Typ
6.0
VIN1 Rising
VIN1 Hysteresis
VIN1 Falling
VOUT1
Output Voltage Range
VFB1
Feedback Pin Voltage
TA = 25°C
VOUT
Output Voltage Accuracy
IOUT1 = 0A to 4.5A
ΔVOUT/VOUT
Line Regulation
VIN1 = 6V to 24V, VOUT1 = 3.3V, IOUT1 = 4.5A
ΔVIN
ΔVOUT/VOUT
Load Regulation
VIN1 = 12V, VOUT1 = 3.3V, IOUT1 = 0A to 4.5A
ΔIOUT
IQ1
Quiescent Current
VEN1 = High, No load
ISHDN1
Shutdown Current
VEN1 = Low, VL1 = 0V
VOCP1
Over-Current Offset Voltage
VEN1 = High, VIN1 = 6.0V to 24.0V, TA = 25°C
ILX1
LX Pin Leakage Current
VIN1 = 24.0V, VEN1 = Low
DMAX
Maximum Duty Cycle
TON(MIN)
Minimum On-Time
VIN1 = 6.0 to 24.0V
High Side On-Resistance
VL1 = 4.5V
RDSON(H)
FOSC1
Oscillator Frequency
FFOLDBACK1
Short Circuit Foldback Frequency Current Limit Triggered
TS1
Start-Up Time
From Enable Channel 1 to Output Regulation
Channel 2: 600mA Linear Low Dropout (LDO) Regulator
VIN2
Input Voltage
VDO2
Dropout Voltage
98% x VOUT2(NOM), IOUT2 = 600mA
IQ2
Quiescent (Ground) Current
No load
ISHDN2
Shutdown Current
VEN2 = GND
IOUT2 = 1mA to 600mA, VIN2 = 2.7V to 5.5V,
TA = 25°C
Output Voltage Tolerance
VOUT2(TOL)
IOUT2 = 1mA to 600mA, VIN2 = 2.7V to 5.5V,
TA = -40°C to 85°C
Output Noise
BW = 300Hz to 50kHz
eN
1kHz
PSRR
Power Supply Rejection Ratio
IOUT2 = 10mA
10kHz
1MHz
ILIMIT2
Current Limit
Enable Start-Up Delay
From Enable Channel 2 to Output Regulation
TS2
Over-Temperature, EN Logic
Over-Temperature Shutdown
Threshold
TSD1,2
Over-Temperature Shutdown
Hysteresis
VEN1,EN2(L)
Enable Threshold Low
Enable Threshold High
VEN1(H)
VEN2(H)
Enable Threshold High
IEN1,EN2
Input Low Current
Max
Units
24.0
5.0
V
V
mV
V
V
V
%
300
3.0
1.5
0.591
-2.5
0.600
5.5
0.609
2.5
0.06
%/V
0.18
%/A
0.6
80
-1.0
350
35.0
120
1.0
100
85
100
35
490
100
2.5
650
2.7
mA
μA
mV
μA
%
ns
mΩ
kHz
kHz
ms
5.5
1300
125
1.0
V
mV
μA
μA
-2.0
+2.0
%
-3.5
+3.5
%
1000
70
700
250
67
47
45
800
15
μVRMS
135
°C
15
°C
dB
mA
μs
0.6
2.5
1.4
-1.0
1.0
V
V
V
μA
1. The AAT2687 is guaranteed to meet performance specifications over the –40°C to +85°C operating temperature range and is assured by design, characterization and correlation with statistical process controls.
4
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2687.2008.06.1.0
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Typical Characteristics—Channel 1
100
90
Efficiency (%)
80
70
60
50
VIN1 = 6V
VIN1 = 7V
VIN1 = 8V
VIN1 = 12V
VIN1 = 18V
VIN1 = 24V
40
30
20
10
0
0.001
0.01
0.1
1
10
Step-Down Converter Load Regulation
vs. Load Current
Output Voltage Difference (%)
Step-Down Converter Efficiency vs. Load Current
2
1.5
1
0.5
0
-0.5
-1
-1.5
-2
0.001
VIN1 = 6V
VIN1 = 7V
VIN1 = 8V
VIN1 = 12V
VIN1 = 18V
VIN1 = 24V
0.01
Load Current (A)
2
0.5
625
0
-0.5
-1
-1.5
-2
10
650
IOUT1 = 0.1µA
IOUT1 = 2.25A
IOUT1 = 3.5A
IOUT1 = 4mA
IOUT1 = 4.5A
1
1
No Load Step-Down Converter Input Current
vs. Input Voltage
Input Current (µA)
Output Voltage Difference (%)
Step-Down Converter Line Regulation
vs. Load Current
1.5
0.1
Load Current (A)
600
575
550
525
500
85°C
25°C
-40°C
475
6
9
12
15
18
21
450
24
6
9
12
Input Voltage (V)
15
18
21
24
Input Voltage (V)
(VOUT1 = 3.3V; IOUT1 = 4.5A)
(VOUT = 3.3V; IOUT1 = 4.5A; COUT1 = 66µF; L = 4.7µH; VIN1 = 12V)
8
Output Voltage Difference (%)
Step-Down Converter Output Voltage
vs. Temperature
Frequency Variation (%)
Step-Down Converter Switching Frequency
vs. Input Voltage
85°C
25°C
-40°C
6
4
2
0
-2
-4
-6
-8
6
8
10
12
14
16
18
20
22
1
0.75
0.5
0.25
0
-0.25
-0.5
-0.75
24
Input Voltage (V)
2687.2008.06.1.0
-1
-40
-15
10
35
60
85
Temperature (°C)
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Step-Down Converter Load Transient
Step-Down Converter Load Transient
(VOUT1 = 3.3V; VIN1 = 12V; COUT1 = 66µF; L = 4.7µH)
(VOUT1 = 3.3V; VIN1 = 12V; COUT1 = 66µF; L = 4.7µH)
14
3.55
12
3.30
10
3.05
8
2.80
6
4.5A
2.55
2.30
2.05
4
2
450mA
0
3.7
Output Voltage (top) (V)
16
3.80
16
3.5
14
3.3
12
3.1
10
2.9
8
2.7
6
4.5A
2.5
2.3
2.1
0
Time (100µs/div)
Time (100µs/div)
Step-Down Converter Load Transient
Step-Down Converter Line Transient
3.4
9
3.3
8
3.2
7
3.1
6
3
4.5A
2.8
3.375A
5
4
3
2
2.7
3.36
22
3.34
20
3.32
18
3.3
16
3.28
14
3.26
12
3.24
10
3.22
8
3.2
6
Time (100µs/div)
Input Voltage (bottom) (V)
10
Output Voltage (top) (V)
(VOUT1 = 3.3V; COUT1 = 66µF; L = 4.7µH)
3.5
Load Current (bottom) (A)
Output Voltage (top) (V)
(VOUT1 = 3.3V; VIN1 = 12V; COUT1 = 66µF; L = 4.7µH)
2.9
4
2
2.25A
Load Current (bottom) (A)
4.05
Load Current (bottom) (A)
Output Voltage (top) (V)
Typical Characteristics—Channel 1
Time (100µs/div)
30
3.3
25
3.28
20
3.26
15
3.24
10
3.22
5
3.2
0
3.18
-5
3.36
35
3.34
30
3.32
25
3.3
20
3.28
15
3.26
10
3.24
5
3.22
0
3.2
-5
Time (1µs/div)
6
LX Voltage (bottom) (V)
35
3.32
LX Voltage (bottom) (V)
3.34
Output Voltage (top) (V)
Step-Down Converter Output Voltage Ripple
(VOUT1 = 3.3V; VIN1 = 12V; COUT1 = 66µF; L = 4.7µH; IOUT1 = 1mA)
Output Voltage (top) (V)
Step-Down Converter Output Voltage Ripple
(VOUT1 = 3.3V; VIN1 = 12V; COUT1 = 66µF; L = 4.7µH; IOUT1 = 4.5A)
Time (2µs/div)
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2687.2008.06.1.0
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Typical Characteristics—Channel 2
LDO Input Current vs. Input Voltage
LDO Dropout Voltage vs. Temperature
(VEN1 = 0V; VEN2 = VIN2)
1400
Dropout Voltage (mV)
Input Current (µA)
100
80
60
40
85°C
25°C
-40°C
20
0
2
2.5
3
3.5
4
4.5
1200
IOUT2 = 600mA
IOUT2 = 500mA
IOUT2 = 300mA
IOUT2 = 150mA
IOUT2 = 50mA
1000
800
600
400
200
0
-40
5
-15
10
Input Voltage (V)
LDO Dropout Voltage vs. Output Current
60
85
LDO VIH and VIL vs. Input Voltage
1500
1.30
1.25
1200
VIH and VIL (V)
Dropout Voltage (V)
35
Temperature (°C)
900
600
85°C
25°C
-40°C
300
1.20
1.15
1.10
1.05
0
1.00
0
100
200
300
400
500
600
VIH
VIL
2.5
3
Output Current (mA)
3.5
4
4.5
5
Input Voltage (V)
LDO Output Voltage Error vs. Temperature
LDO Dropout Characteristic
(VIN2 = 3.3V; VOUT2 = 1.8V; IOUT2 = 600mA)
(VOUT2 = 1.8V)
1.84
IOUT2 = 0.1mA
IOUT2 = 300mA
IOUT2 = 600mA
2.0
Output Voltage (V)
Output Voltage Error (%)
3.0
1.0
0.0
-1.0
-2.0
-3.0
-50
-25
0
25
50
75
100
1.82
1.80
1.78
1.76
IOUT2 = 0.1mA
IOUT2 = 50mA
IOUT2 = 100mA
IOUT2 = 300mA
IOUT2 = 600mA
1.74
1.72
1.70
1.5
Temperature (°C)
2687.2008.06.1.0
5.5
2
2.5
3
3.5
4
4.5
Input Voltage (V)
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Typical Characteristics—Channel 2
LDO Turn-Off Response Time
LDO Turn-On Time from Enable
(VIN2 = 3.3V; VEN2 = 3.3V; VOUT2 = 1.8V; IOUT2 = 600mA)
(VIN2 = 3.3V; VEN2 = 3.3V; VOUT2 = 1.8V; IOUT2 = 600mA)
1
0
2.0
1.0
0.0
-1.0
Enable Voltage (top) (V)
Enable Voltage (top) (V)
2
4
3
2
1
3
0
2
1
0
Time (5µs/div)
Output Voltage (bottom) (V)
3
Output Voltage (bottom) (V)
4
Time (5µs/div)
LDO Load Transient Response
(IOUT2 = 0.3 to 0.6A; VIN2 = 3.3V; VOUT2 = 1.8V; COUT2 = 2.2µF)
3
2
1.85
VOUT
1.80
1.75
1.70
Output Current (top) (A)
VIN
4
0.7
0.6
0.5
0.4
0.3
1.90
1.85
1.80
1.75
Time (200µs/div)
Output Voltage (bottom) (V)
5
Output Voltage (bottom) (V)
Input Voltage (top) (V)
LDO Line Transient Response
(VIN2 = 3V to 4V; VOUT2 = 1.8V; IOUT2 = 600mA; COUT2 = 2.2µF)
Time (40µs/div)
LDO Power Supply Rejection Ratio, PSRR
LDO Output Voltage Noise
(IOUT2 = 10mA; BW: 100KHz to 300KHz)
(IOUT2 = 10mA; Power BW: 300~50KHz)
10
70
Magnitude (dB)
Noise (µVRMS)
60
5
50
40
30
20
10
0
100
1000
10000
100000
0
100
10000
100000
Frequency (Hz)
Frequency (Hz)
8
1000
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2687.2008.06.1.0
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Functional Block Diagram
VINT
Reg.
VL1
IN1
OT
FB1
Error
Amp
OSC
Comp.
Comp.
BST1
COMP1
Logic
LX1
Control
Logic
EN1
20Ω
Voltage
Ref
Ref1
Comp
VOCP1
= 0.1V
OT
RS1
OS1
IN2
OCP
FB_LDO
Error
Amp
OUT2
Logic
FB_LDO
Voltage
Ref 2
EN2
Control
Logic
GND
Functional Description
The AAT2687 provides two independently regulated DC
outputs, consisting of a high voltage step-down regulator
and a low input voltage linear low dropout (LDO) regulator. The PMIC is optimized for low cost 12V adapter inputs,
making the device an ideal system-on-a-chip power solution for consumer communications equipment.
Channel 1 is a step-down regulator with an input voltage
range 6.0 to 24V, providing up to 4.5A output current.
The 490kHz fixed switching frequency allows small L/C
filtering components.
Channel 1 utilizes voltage mode control configured for
optimum performance across the entire output voltage
and load range. The controller includes integrated overcurrent, soft-start and over-temperature protection. Overcurrent is sensed through the output inductor DC winding
2687.2008.06.1.0
resistance (DCR). An external resistor network adjusts
the current limit according to the DCR of the desired
inductor and the desired output current limit. Frequency
reduction limits over-current stresses during short-circuit
events. The operating frequency returns to the nominal
setting when over-current conditions are removed.
Channel 2 is a linear low-dropout (LDO) regulator providing up to 600mA output current at a factory set output
voltage. The device provides extremely low output noise,
low quiescent current and excellent transient response.
The controller includes integrated over-current, softstart and over-temperature protection. Independent
input and enable pins provide maximum design flexibility. The AAT2687 is available in the Pb-free, 4x5mm
24-pin TQFN package. The rated operating temperature
range is -40°C to 85°C.
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Applications Information
Output 1 is a high voltage DC/DC step-down converter
providing an output voltage from 1.5V to 85% of the
minimum input voltage (85% · VIN). The integrated highside n-channel MOSFET device provides up to 4.5A output current. Input voltage range is 6.0V to 24.0V. The
step-down converter utilizes constant frequency (PWMmode) voltage mode control to achieve high operating
efficiency while maintaining extremely low output noise
across the operating range. High 490kHz (nominal)
switching frequency allows small external filtering components; achieving minimum cost and solution size.
External compensation allows the designer to optimize
the transient response while achieving stability across
the operating range.
Output 2 is a low voltage, low dropout (LDO) linear
regulator providing 1.8V with up to 600mA output current. The input voltage range is 2.7V to 5.5V. The LDO
provides very low noise output which can be derived
directly from the Output 1 channel.
Channel 1 Output Voltage and Current
Output 1 is set using an external resistor divider as
shown in Table 1. Minimum output voltage is 1.5V and
maximum output voltage is 5.5V. Typical maximum duty
cycle is 85%.
VOUT (V)
R4 = 1.96kΩ
R3 (kΩ)
1.5
1.8
1.85
2.0
2.5
3.0
3.3
5.0
2.94
3.92
4.02
4.53
6.19
7.87
8.87
14.3
Three 22μF ceramic output capacitors are required to
filter the inductor current ripple and supply the load
transient current for IOUT = 4.5A. The 1206 package with
10V minimum voltage rating is recommended for the
output capacitors to maintain a minimum capacitance
drop with DC bias.
Channel 1 Output Inductor Selection
The step-down converter utilizes constant frequency
(PWM-mode) voltage mode control. A 4.7μH inductor
value is selected to maintain the desired output current
ripple and minimize the converter’s response time to
load transients. The peak switch current should not
exceed the inductor saturation current, the MOSFET or
the external Schottky rectifier peak current ratings.
Channel 1 Rectifier Selection
When the high-side switch is on, the input voltage will be
applied to the cathode of the Shottky diode. The rectifier's rated reverse breakdown voltage must be chosen at
least equal to the maximum input voltage of the stepdown regulator.
When the high-side switch is off, the current will flow
from the power ground to the output through the
Schottky diode and the inductor. The power dissipation
of the Schottky diode during the time-off can be determined by the following equation:
PD = IOUT · VD · 1 -
VOUT
VIN
Where VD is the voltage drop across the Schottky diode.
Table 1: Feedback Resistor Values.
Alternatively, the feedback resistor may be calculated
using the following equation:
R3 =
Channel 1 Regulator
Output Capacitor Selection
(VOUT - 0.6) · R4
0.6
Channel 1 Input Capacitor Selection
For low cost applications, a 220μF/25V electrolytic
capacitor is selected to control the voltage overshoot
across the high side MOSFET. A small ceramic capacitor
with voltage rating at least 1.05 times greater than the
maximum input voltage is connected as close as possible
to the input pin (Pin 14) for high frequency decoupling.
R3 is rounded to the nearest 1% resistor value.
10
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Channel 1 Feedback and
Compensation Networks
stability. Equation 3, 4, 5 and 6 relate the compensation
network’s poles and zeros to the components R1, R3,
R5, C5, C6, and C10:
C6
Eq. 3: FZ1 =
C5
C10
R1
R5
VOUT1
Eq. 4: FZ1 =
1
2 · π · (R3 + R5) · C10
Eq. 5: FP1 =
1
COMP1
R3
1
2 · π · R1 · C5
2 · π · R1 ·
FB1
Eq. 6: FP2 =
R4
REF
Figure 1: AAT2687 Feedback and Compensation
Networks for Type III Voltage-Mode Control Loop.
The transfer function of the Error Amplifier is dominated
by the DC Gain and the L COUT output filter of the regulator. This output filter and its equivalent series resistor
(ESR) create a double pole at FLC and a zero at FESR in the
following equations:
Eq. 1: FLC =
Eq. 2: FESR =
1
2 · π · L · COUT
1
2 · π · ESR · COUT
The feedback and compensation networks provide a
closed loop transfer function with the highest 0dB crossing frequency and adequate phase margin for system
Network
Feedback
Feed-forward
Compensation
Current Limit
C5 · C6
C5 + C6
1
2 · π · R5 · C10
Components of the feedback, feed forward, compensation, and current limit networks need to be adjusted to
maintain the systems stability for different input and
output voltages applications as shown in Table 1.
Channel 1 Thermal Protection
The AAT2687 has an internal thermal protection circuit
which will turn on when the device die temperature
exceeds 135°C. The internal thermal protection circuit
will actively turn off the high side regulator output
device to prevent the possibility of over temperature
damage. The Buck regulator output will remain in a
shutdown state until the internal die temperature falls
back below the 135°C trip point. The combination and
interaction between the short circuit and thermal protection systems allows the Buck regulator to withstand
indefinite short-circuit conditions without sustaining permanent damage.
Components
VOUT =3.3V
VIN = 6V-24V
VOUT = 5.0V
VIN = 6V-24V
R4
R3
C10
R5
C5
C6
R1
C4
R2
R6
R7
R8
1.96kΩ
8.87kΩ
2.2nF
453Ω
2.2nF
150pF
3.92kΩ
220nF
2kΩ
Open
2kΩ
165kΩ
1.96kΩ
8.87kΩ
2.2nF
453Ω
2.2nF
150pF
3.92kΩ
220nF
2kΩ
Open
2kΩ
165kΩ
Table 1: AAT2687 Feedback, Compensation, and Current Limit Components For VOUT = 3.3V and VOUT = 5.0V.
2687.2008.06.1.0
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11
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Over-Current Protection
Channel 2 Input Capacitor
The output 1 controller provides true-load DC output current sensing which protects the load and limits component stresses. The output current is sensed through the
DC resistance in the output inductor (DCR). The controller reduces the operating frequency when an over-current
condition is detected; limiting stresses and preventing
inductor saturation. This allows the smallest possible
inductor for a given output load. A small resistor divider
may be necessary to adjust the over-current threshold
and compensate for variation in inductor DCR.
Typically, a 1μF or larger capacitor is recommended for
CIN in most applications. A CIN capacitor is not required
for basic LDO regulator operation. However, if the
AAT2687 is physically located more than three centimeters from an input power source, a CIN capacitor will be
needed for stable operation.
The preset current limit threshold is triggered when the
differential voltage from RS1 to OS1 exceeds 100mV
(nominal).
L1
LX1
V OUT1
3.3V/4.5A
4.7μH
C4
220nF
R2
2k
Channel 2 Output Capacitor
RS1
R7
OS1
R8
Figure 2: Optional Resistor Network to Adjust the
Current Limit Less than the Pre-Set Over-Current
Threshold (Add R7 and R8).
L1
LX1
RS1
VOUT1
3.3V/4.5A
4.7μH
R2
2k
C4
220nF
R6
For proper load voltage regulation and operational stability, a capacitor is required between pins VOUT and GND.
The COUT capacitor connection to the LDO regulator
ground pin should be connected as close as possible for
maximum device performance. The AAT2687 LDO has
been specifically designed to function with very low ESR
ceramic capacitors. For best performance, ceramic
capacitors are recommended.
Typical output capacitor values for maximum output current conditions range from 1μF to 10μF. Applications
utilizing the exceptionally low output noise and optimum
power supply ripple rejection characteristics of the channel 2 should use 2.2μF or greater for COUT. If desired, COUT
may be increased without limit. In low output current
applications where output load is less than 10mA, the
minimum value for COUT can be as low as 0.47μF.
Channel 2 Enable Function
R7
OS1
Figure 3: Optional Resistor Network to Adjust the
Current Limit Greater than the Pre-Set OverCurrent Level (Add R6 and R7).
12
CIN should be located as close to the device VIN pin as
possible. CIN values greater than 1μF will offer superior
input line transient response and will assist in maximizing the highest possible power supply ripple rejection.
Ceramic, tantalum, or aluminum electrolytic capacitors
may be selected for CIN. There is no specific capacitor
ESR requirement for CIN. However, for 150mA LDO regulator output operation, ceramic capacitors are recommended for CIN due to their inherent capability over
tantalum capacitors to withstand input current surges
from low impedance sources, such as batteries in portable devices.
The AAT2687 features an LDO regulator enable/disable
function. This pin (EN) is active high and is compatible
with CMOS logic. To assure the LDO regulator will switch
on, the EN turn-on control level must be greater than
1.5V. The LDO regulator will go into the disable shutdown
mode when the voltage on the EN pin falls below 0.6V. If
the enable function is not needed in a specific application,
it may be tied to VIN to keep the LDO regulator in a continuously on state. When the LDO regulator is in shut-
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AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
down mode, an internal 1.5kΩ resistor is connected
between VOUT and GND. This is intended to discharge COUT
when the LDO regulator is disabled. The internal 1.5kΩ
has no adverse effect on device turn-on time.
Channel 2 Short-Circuit Protection
The AAT2687 LDO contains an internal short-circuit protection circuit that will trigger when the output load current exceeds the internal threshold limit. Under shortcircuit conditions, the output of the LDO regulator will be
current limited until the short-circuit condition is removed
from the output or LDO regulator package power dissipation exceeds the device thermal limit.
Channel 2 Thermal Protection
The AAT2687 LDO has an internal thermal protection
circuit which will turn on when the device die temperature exceeds 150°C. The internal thermal protection
circuit will actively turn off the LDO regulator output
pass device to prevent the possibility of over temperature damage. The LDO regulator output will remain in a
shutdown state until the internal die temperature falls
back below the 150°C trip point. The combination and
interaction between the short circuit and thermal protection systems allows the LDO regulator to withstand
indefinite short-circuit conditions without sustaining permanent damage.
Channel 2 No-Load Stability
The AAT2687 is designed to maintain output voltage
regulation and stability under operational no load conditions. This is an important characteristic for applications
where the output current may drop to zero.
Channel 2 Reverse Output-to-Input
Voltage Conditions and Protection
Under normal operating conditions, a parasitic diode
exists between the output and input of the LDO regulator. The input voltage should always remain greater than
the output load voltage, maintaining a reverse bias on
the internal parasitic diode. Conditions where VOUT might
exceed VIN should be avoided since this would forward
bias the internal parasitic diode and allow excessive current flow into the VOUT pin, possibly damaging the LDO
regulator. In applications where there is a possibility of
VOUT exceeding VIN for brief amounts of time during normal operation, the use of a larger value CIN capacitor is
2687.2008.06.1.0
highly recommended. A larger value of CIN with respect
to COUT will effect a slower CIN decay rate during shutdown, thus preventing VOUT from exceeding VIN. In applications where there is a greater danger of VOUT exceeding VIN for extended periods of time, it is recommended
to place a Schottky diode across VIN to VOUT (connecting
the cathode to VIN and anode to VOUT). The Schottky
diode forward voltage should be less than 0.45V.
Thermal Calculations
There are three types of losses associated with the
AAT2687 step-down converter: switching losses, conduction losses, and quiescent current losses. Conduction
losses are associated with the RDS(ON) characteristics of
the power output switching devices. Switching losses are
dominated by the gate charge of the power output
switching devices. At full load, assuming continuous conduction mode (CCM), a simplified form of the synchronous step-down converter and LDO losses is given by:
PTOTAL =
IOUT12 · (RDS(ON)H · VOUT1 + RDS(ON)L · [VIN1 - VOUT1 ])
VIN1
+ (tSW · FS · IOUT1 + IQ1 ) · VIN1 + (VIN2 - VOUT2) · IOUT2
IQ1 and IQ2 are the step-down converter and LDO quiescent currents respectively. The term tSW is used to estimate the full load step-down converter switching losses.
For asynchronous Step-Down converter, the power dissipation is only in the internal high side MOSFET during
the on time. When the switch is off, the power dissipates
on the external Schottky diode. The total package losses
for the AAT2687 reduce to the following equation:
PTOTAL = IOUT12 · RDS(ON)H · D + (tSW · FS · IOUT1 + IQ) · VIN + (VIN2 - VOUT2) · IOUT2
Where: D = VOUT is the duty cycle.
VIN
Since RDS(ON), quiescent current, and switching losses all
vary with input voltage, the total losses should be investigated over the complete input voltage range.
Given the total losses, the maximum junction temperature can be derived from the θJA for the TQFN45-24
package, which is 33°C/W.
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TJ(MAX) = PTOTAL · θJA + TAMB
13
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Layout Considerations
5.
The suggested PCB layout for the AAT2687 is shown in
Figures 5, 6, 7, and 8. The following guidelines should be
used to help ensure a proper layout.
6.
1.
2.
3.
4.
14
The power input capacitors (C1 and C15) should be
connected as close as possible to high voltage input
pin (IN1) and power ground.
C1, L1, D2, C7, C8, and C9 should be place as close
as possible to minimize any parasitic inductance in
the switched current path which generates a large
voltage spike during the switching interval. The connection of inductor to switching node should be as
short as possible.
The feedback trace or FB1 pin should be separated
from any power trace and connected as close as possible to the load point. Sensing along a high-current
load trace will degrade DC load regulation.
The resistance of the trace from the load returns to
PGND should be kept to a minimum. This will help to
minimize any error in DC regulation due to differences in the potential of the internal signal ground
and the power ground.
7.
8.
9.
Connect unused signal pins to ground or input to
avoid unwanted noise coupling.
The critical small signal components include feedback components, and compensation components
should be placed close to the FB1 and COMP1 pins.
The feedback resistors should be located as close as
possible to the FB1 pin with its ground tied straight
to the signal ground plane which is separated from
power ground plane.
C4 should be connected close to the RS1 and OS1
pins, while R2 should be connected directly to the
output pin of the inductor. For the best current limit
performance, C4 and R2 should be placed at the bottom layer to avoid noise coupling from the inductor.
R7 should be connected directly to the output pin of
inductor L1 to sense precisely its DCR.
For good thermal coupling, a 4-layer PCB layout is
recommended and PCB vias are required from the
exposed pad (EP) for the TQFN45-24 paddle to the
middle plans and bottom plane. The EP is internally
connected to IN.
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
VOUT1
U1
C3
0.1μF
J1
2
1
D1
3.3V/4.5A
L1
1
LX1
LX1
24
2
LX1
LX1
23
5
BST
N/C
20
18
VL1
FB1
16
VL1
RS1
4.7μH 5.3A
C4
2k
D2
220nF
R6
open
19
22
OS1
14
COMP1
15
3
N/C
4
N/C
OUT2
11
6
EN1
N/C
12
10
IN2
GND
17
9
N/C
GND2
8
EN2
N/C
3
2
13
C15
open
C13
1μF
25V
VIN2
7
R3
8.87k
C7
R1
22μF
3.92K R4
1.96k
C8
C9
22μF 22μF
C5
2.2nF
VOUT2
1.8V/0.6A
1
EN1
C6
150pF
R7
2k
AAT2687
IN1
EP
C14
2.2μF
+
R5
453
BAS16
VIN1
6.0V - 24.0V
C1
220μF
25V
C10
2.2nF
R2
R8
165k
C12
2.2μF
C11
open
3
C2
2.2μF
2
21
1
EN2
U1
C1
C2, C12, C14
C3
C4
C5, C6, C10
C7, C8, C9
C13
D1
D2
L1
R1 - R5
TQFN45-24
AAT2687 Analogic Technologies, Hi-Voltage Buck/LDO, TQFN45-24
Cap, MLC, 220μF/25V, Electrolytic cap
Cap, MLC, 2.2μF, 6.3V, 0805
Cap, MLC, 0.1μF/6.3V, 0603
Cap, MLC, 220nF/6.3V, 0402
Cap, MLC, misc, 0603
Cap, MLC, 22μF/10V, 1206
Cap, MLC, 1μF, 25V, 0805
BAS16, Generic, Rectifier, 0.2A/85V, Ultrafast, SOT23
B540C, Generic, Schottky Rectifier, 5A/40V, SMC
RCH108NP-4R7M, Sumida, 4.7μH, ISAT = 5.7A, DCR = 11.7mΩ
or Wurth 744 771 004, 4.7μH, ISAT = 6.8A, DCR = 11mΩ
Carbon film resistor, 0402
Figure 4: AAT2687IFK Evaluation Board Schematic For VIN = 6V - 24V and VOUT = 3.3V.
2687.2008.06.1.0
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15
PRODUCT DATASHEET
AAT2687
SystemPowerTM
16
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Figure 5: AAT2687IFK Evaluation Board
Top Layer.
Figure 6: AAT2687IFK Evaluation Board
MID1 Layer.
Figure 7: AAT2687IFK Evaluation Board
MID2 Layer.
Figure 8: AAT2687IFK Evaluation Board
Bottom Layer.
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
AAT2687 Design Example
Specifications
VO1 = 3.3V @ 4.5A, Pulsed Load ΔILOAD = 4.5A
VO2 = 1.8V @ 600mA
VIN1 = 12V
FS = 490kHz
TAMB = 85°C in TQFN45-24 Package
Channel 1 Output Inductor
For Sumida inductor RCH108NP-4R7M, 4.7μH, DCR = 11.7mΩ max.
ΔI =
VOUT1
VOUT1
3.3V
3.3V
· 1=
· 1= 1A
L1 · FS
VIN1
4.7μH · 490kHz
12V
IPK1 = IOUT1 +
ΔI
= 4.5A + 1A = 5.5A
2
PL1 = IOUT12 · DCR = 5.5A2 · 11.7mΩ = 354mW
Channel 1 Output Capacitor
VDROOP = 0.4V
COUT =
3 · ΔILOAD
3 · 4.5A
=
= 69μF; use 3x22μF
0.4V · 490kHz
VDROOP · FS
IRMS(MAX) =
1
2· 3
·
VOUT1 · (VIN(MAX) - VOUT1)
1
3.3V · (24V - 3.3V)
·
= 357mARMS
=
L · FS · VIN1(MAX)
2 · 3 4.7μH · 490kHz · 24V
PRMS = ESR · IRMS2 = 5mΩ · (357mA)2 = 0.6W
Channel 1 Input Capacitor
Input Ripple VPP = 33mV
CIN1 =
1
VPP
- ESR · 4 · FS
IOUT1
=
1
5.5mV
- 5mΩ · 4 · 490kHz
4.5A
= 219μF
For low cost applications, a 220μF/25V electrolytic capacitor in parallel with a 1μF/25V ceramic capacitor is used to
reduce ESR.
IRMS =
IOUT1
= 2.25A
2
P = ESR · (IRMS)2 = 5mΩ · (2.25A)2 = 25.3mW
2687.2008.06.1.0
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Channel 1 Current Limit
Voltage sense VS = 100mV
Total trace parasitic resister and inductor DCR is 10mΩ
ILIMIT = 5A.
IPRESET =
VS
100mV
=
= 10A > ILIMIT
10mΩ
DCR
R8 =
VOUT · R2
3.3V · 2kΩ
= 165kΩ
=
0.1V - 6A · 10mΩ
VS - ILIMIT · DCR
R7 =
R2 · R 8
2kΩ · 165kΩ
=
= 2kΩ
165kΩ - 2kΩ
R8 - R 2
AAT2687 Losses
All values assume 25°C ambient temperature and thermal resistor of 50°C/W in the TQFN45-24 package.
PTOTAL = IOUT12 · RDS(ON)H · D + (tSW · FS · IOUT1 + IQ) · VIN1 + (VIN2 - VOUT2) · IOUT2
2
PTOTAL = 4.5A · 70mΩ · 3.3V + (5ns · 490kHz · 4.5A + 70μA) · 12V + (3.3 - 1.8) · 600mA
12V
PTOTAL = 1.42W
TJ(MAX) = TAMB + ΘJA · PLOSS = 85°C + (33°C/W) · 1.42W = 131°C
18
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2687.2008.06.1.0
PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Ordering Information
Voltage
Package
Channel 1
Channel 2
Marking1
Part Number (Tape and Reel)2
TQFN45-24
Adj (0.6)
1.8
3PXYY
AAT2687IFK-AI-T1
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means semiconductor
products that are in compliance with current RoHS standards, including the requirement that lead not exceed
0.1% by weight in homogeneous materials. For more information, please visit our website at
http://www.analogictech.com/about/quality.aspx.
Legend
Voltage
Code
Adjustable (0.6)
1.8
A
I
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
2687.2008.06.1.0
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PRODUCT DATASHEET
AAT2687
SystemPowerTM
PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters
Package Information1
TQFN45-24
Pin 1 Identification
Chamfer 0.400 x 45°
2.800 ± 0.050
3.000 REF
3.800 ± 0.050
0.400 ± 0.050
0.750 ± 0.050
4.000 ± 0.050
5.000 ± 0.050
Pin 1 Dot
by Marking
0.203 REF
0.000 - 0.050
Side View
0.250 ± 0.050
0.500 BSC
2.000 REF
Top View
Bottom View
All dimensions in millimeters.
1. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing
process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection.
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3230 Scott Boulevard, Santa Clara, CA 95054
Phone (408) 737-4600
Fax (408) 737-4611
© Advanced Analogic Technologies, Inc.
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual
property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech’s terms and
conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate
design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to
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20
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