plerowTM ALN1765AT Internally Matched LNA Module Features Description · S21 = 17.7 dB @ 1740 MHz = 17.3 dB @ 1790 MHz · NF of 0.7 dB over Frequency · Unconditionally Stable · Single 5V Supply · High OIP3 @ Low Current C o u pl er C o u pl er The plerowTM ALN-series is the compactly designed surface-mount module for the use of the LNA with or without the following gain blocks in the infrastructure equipment of the mobile wireless (CDMA, GSM, PCS, PHS, WCDMA, DMB, WLAN, WiBro, WiMAX), GPS, satellite communication terminals, CATV and so on. It has an exceptional performance of low noise figure, high gain, high OIP3, and low bias current. The stability factor is always kept more than unity over the application band in order to ensure its unconditionally stable implementation to the application system environment. The surface-mount module package including the completed matching circuit and other components necessary just in case allows very simple and convenient implementation onto the system board in mass production level. Specifications (in Production) Typ. @ T = 25C, Vs = 5 V, Freq. =1765 MHz, Zo.sys = 50 ohm Parameter Frequency Range Unit Min MHz 1740 Gain dB 16.5 Gain Flatness dB Noise Figure (NF) 1-stage Single Type Specifications Typ Max 1790 17.5 dB 0.2 0.3 0.7 0.75 Output IP3 (1) dBm S11 / S22 (2) dB Output P1dB dBm Switching Time sec Supply Current mA Supply Voltage V 5 Impedance 50 30 More Information Website: www.asb.co.kr E-mail: [email protected] 31 Tel: (82) 42-528-7223 Fax: (82) 42-528-7222 -18 / -10 17 18 60 80 Max. RF Input Power dBm C.W 29 ~ 31 (before fail) Package Type & Size mm Surface Mount Type, 10Wx10Lx3.8H Operating temperature is -40C to +85C. 1) OIP3 is measured with two tones at an output power of 4 dBm / tone separated by 1 MHz. 2) S11/S22 (max) is the worst value within the frequency band. 3) Switching time means the time that takes for output power to get stabilized to its final level after switching DC voltage from 0 V to VS. Outline Drawing (Unit: mm) plerow ALN1765AT ASB Inc. (Top View) Pin Number Function 2 RF In 5 RF Out 6 Vs Others Ground (Bottom View) Note: 1. The number and size of ground via holes in a circuit board is critical for thermal RF grounding considerations. 2. We recommend that the ground via holes be placed on the bottom of all ground pins for better RF and thermal performance, as shown in the drawing at the left side. Solder Stencil Area (Side View) Ø 0.4 plated thru holes to ground plane (Recommended Footprint) 1/4 www.asb.co.kr March 2009 plerowTM ALN1765AT Internally Matched LNA Module S-parameters Typical Performance (Measured) 1740~1790 MHz +5 V 2/4 S-parameters & K Factor Noise Figure OIP3 P1dB www.asb.co.kr March 2009 plerowTM ALN1765AT Internally Matched LNA Module RF Performance with Voltage Change 1. S-parameter 1739 MHz 1755 MHz 1770 MHz S21 (dB) S11 (dB) S22 (dB) S21 (dB) G/F (dB) S11 (dB) S22 (dB) S21 (dB) S11 (dB) S22 (dB) 4.50 V 17.44 -19.68 -10.45 17.34 0.21 -20.59- -10.50 17.23 -21.92 -10.45 4.75 V 17.50 -21.11 -10.78 17.39 0.22 -22.12 -10.85 17.28 -23.56 -10.83 5.00 V 17.52 -21.70 -10.42 17.40 0.22 -22.70 -10.49 17.30 -24.22 -10.45 5.25 V 17.53 -21.59 -10.26 17.39 0.22 -22.80 -10.32 17.31 -24.56 -10.31 5.50 V 17.55 -22.47 -10.20 17.39 0.23 -23.80 -10.29 17.32 -25.67 -10.28 2. OIP3, P1dB & NF 1739 MHz 1755 MHz 1770 MHz OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) 4.50 V 33.19 17.88 0.687 33.07 17.92 0.668 33.13 17.85 0.715 4.75 V 32.12 18.32 0.684 31.85 18.35 0.693 32.41 18.32 0.710 5.00 V 31.37 18.76 0.705 31.07 18.77 0.703 31.58 18.73 0.749 5.25 V 30.78 19.11 0.723 30.48 19.11 0.729 30.77 19.09 0.745 5.50 V 30.15 19.44 0.730 29.86 19.47 0.743 30.00 19.43 0.750 Note: tested at room temperature. RF Performance with Operating Temperature 1. S-parameter 1739 MHz 1755 MHz 1770 MHz S21 (dB) S11 (dB) S22 (dB) S21 (dB) G/F (dB) S11 (dB) S22 (dB) S21 (dB) S11 (dB) S22 (dB) -45 C 18.86 -21.56 -12.29 18.78 0.30 -22.80 -12.12 18.56 -21.94 -12.29 -10 C 18.67 -21.38 -12.61 18.54 0.30 -22.13 -12.72 18.37 -21.40 -12.68 25 C 18.45 -21.71 -12.42 18.30 0.31 -22.72 -12.28 18.14 -21.53 -12.50 60 C 18.26 -21.31 -12.25 18.15 0.31 -21.86 -12.24 18.95 -21.13 -12.49 85 C 18.10 -21.20 -12.00 17.99 0.32 -21.19 -11.95 17.78 -21.12 -12.06 2. OIP3, P1dB & NF 1739 MHz 1755 MHz 1770 MHz OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) -45 C 31.44 19.21 0.460 31.58 18.99 0.494 31.45 19.05 0.470 -10 C 32.14 18.99 0.577 32.47 18.88 0.570 32.45 18.95 0.586 25 C 31.91 18.85 0.717 32.11 18.67 0.731 32.14 18.84 0.713 60 C 31.76 18.25 0.908 31.98 18.30 0.898 32.04 18.44 0.922 85 C 31.64 17.62 1.031 31.89 17.76 1.035 31.93 17.96 1.054 Note: tested at Vs= 5V. 3/4 www.asb.co.kr March 2009 plerowTM ALN1765AT Internally Matched LNA Module Application Circuit VS + - Tantal or MLC (Multi Layer Ceramic) Capacitor (Mandatory) C1 C4 = 100pF C2 ALN IN OUT C3 = 0.5pF (Mandatory) 1) The tantal or MLC (Multi Layer Ceramic) capacitor is optional and for bypassing the AC noise introduced from the DC supply. The capacitance value may be determined by customer’s DC supply status. The capacitor should be placed as close as possible to Vs pin and be connected directly to the ground plane for the best electrical performance. 2) DC blocking capacitors are always necessarily placed at the input and output port for allowing only the RF signal to pass and blocking the DC component in the signal. The DC blocking capacitors are included inside the ALN module. Therefore, C1 & C2 capacitors may not be necessary, but can be added just in case that the customer wants. The value of C1 & C2 is determined by considering the application frequency. C3 and C4 in the blue dot line circle shall be used for matching. Recommended Soldering Reflow Process Evaluation Board Layout Vs 20~40 sec 260C Ramp-up (3˚C/sec) 200C Ramp-down (6C/sec) IN OUT 150C 60~180 sec 4/4 Size 25x25mm (for ALN-AT, BT, T Series – 10x10mm) www.asb.co.kr March 2009