AD AD707JR Ultralow drift op amp Datasheet

a
Ultralow Drift Op Amp
AD707
CONNECTION DIAGRAMS
FEATURES
Very High DC Precision
15 mV max Offset Voltage
0.1 mV/8C max Offset Voltage Drift
0.35 mV p-p max Voltage Noise (0.1 Hz to 10 Hz}
8 V/mV min Open-Loop Gain
130 dB min CMRR
120 dB min PSRR
1 nA max Input Bias Current
TO-99 (H) Package
NULL
8
NULL 1
7
–IN 2
+IN 3
+VS
6
AD707
5
OUTPUT
NC
4
AC Performance
0.3 V/ms Slew Rate
0.9 MHz Closed-Loop Bandwidth
Dual Version: AD708
Available in Tape and Reel in Accordance with
EIA-481A Standard
–VS
NC = NO CONNECT
NOTE: PIN 4 CONNECTED
TO CASE
Plastic (N) and
Cerdip (Q) Packages
8 NULL
NULL 1
PRODUCT DESCRIPTION
The AD707 is a low cost, high precision op amp with state-ofthe-art performance that makes it ideal for a wide range of
precision applications. The offset voltage spec of less than 15 µV
is the best available in a bipolar op amp, and maximum input
offset current is 1.0 nA. The top grade is the first bipolar
monolithic op amp to offer a maximum offset voltage drift of
0.1 µV/°C, and offset current drift and input bias current drift
are both specified at 25 pA/°C maximum.
The AD707’s open-loop gain is 8 V/µV minimum over the full
± 10 V output range when driving a 1 kΩ load. Maximum input
voltage noise is 350 nV p-p (0.1 Hz to 10 Hz). CMRR and
PSRR are 130 dB and 120 dB minimum, respectively.
The AD707 is available in versions specified over commercial,
industrial and military temperature ranges. It is offered in 8-pin
plastic mini-DIP, small outline (SOIC), hermetic cerdip and
hermetic TO-99 metal can packages. Chips, MIL-STD-883B,
Rev. C, and tape & reel parts are also available.
SOIC (R) Package
NULL
–IN 2
7 +VS
–IN
+IN 3
6 OUTPUT
+IN
–VS 4
5 NC
–VS
AD707
NC = NO CONNECT
1
8
NULL
+VS
OUTPUT
4 AD707 5
NC
NC = NO CONNECT
APPLICATION HIGHLIGHTS
1. The AD707’s 13 V/µV typical open-loop gain and 140 dB
typical common-mode rejection ratio make it ideal for
precision instrumentation applications.
2. The precision of the AD707 makes tighter error budgets
possible at a lower cost.
3. The low offset voltage drift and low noise of the AD707 allow
the designer to amplify very small signals without sacrificing
overall system performance.
4. The AD707 can be used where chopper amplifiers are
required, but without the inherent noise and application
problems.
5. The AD707 is an improved pin-for-pin replacement for the
LT1001.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD707–SPECIFICATIONS (@ +258C and 615 V, unless otherwise noted)
AD707J/A
Min Typ Max
Conditions
INPUT OFFSET VOLTAGE
Initial
vs. Temperature
AD707K/B
Min Typ Max
Units
30
0.3
50
0.3
±4
90
1.0
100
10
0.1
15
0.3
±4
25
0.3
45
µV
µV/°C
µV
µV/month
mV
1.0
2.0
15
2.5
4.0
40
0.5
1.5
15
2.0
4.0
40/40/40
nA
nA
pA/°C
VCM = 0 V
TMIN to TMAX
0.5
2.0
2
2.0
4.0
40
0.3
1.0
1
1.5
2.0
25/25/35
nA
nA
pA/°C
INPUT VOLTAGE NOISE
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
0.23 0.6
10.3 28
10.0 13.0
9.6
11.0
0.23 0.6
10.3 18
10.0 12
9.6
11.0
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
INPUT CURRENT NOISE
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
14
0.32
0.14
0.12
14
0.32
0.14
0.12
pA p-p
pA/√Hz
pA/√Hz
pA/√Hz
TMIN to TMAX
Long-Term Stability
Adjustment Range
R2 = 20 kΩ (Figure 19)
INPUT BIAS CURRENT
TMIN to TMAX
Average Drift
OFFSET CURRENT
Average Drift
COMMON-MODE
REJECTION RATIO
OPEN-LOOP GAIN
POWER SUPPLY
REJECTION RATIO
120
120
140
140
130
120
140
140
dB
dB
VO = ± 10 V
RLOAD ≥ 2 kΩ
TMIN to TMAX
3
3
13
13
5
3
13
13
V/µV
V/µV
VS = ± 3 V to ± 18 V
TMIN to TMAX
110
110
130
130
115
110
130
130
dB
dB
0.4
0.12
0.9
0.3
0.4
0.12
0.9
0.3
MHz
V/µs
24
100
200
45
200
300
MΩ
GΩ
13.5
12.5
12.0
14
13.0
12.5
13.5
12.5
12.0
14
13.0
12.5
±V
±V
±V
12.0
13.0
12.0
13.0
±V
60
Ω
INPUT RESISTANCE
Differential
Common Mode
RLOAD ≥ 10 kΩ
RLOAD ≥ 2 kΩ
RLOAD ≥ 1 kΩ
RLOAD ≥ 2 kΩ
TMIN to TMAX
OPEN-LOOP OUTPUT
RESISTANCE
POWER SUPPLY
Current, Quiescent
Power Consumption, No Load
30
0.8
0.23
0.17
VCM = ± 13 V
TMIN to TMAX
FREQUENCY RESPONSE
Closed-Loop Bandwidth
Slew Rate
OUTPUT CHARACTERISTICS
Voltage
35
0.9
0.27
0.18
60
2.5
75
7.5
VS = ± 15 V
VS = ± 3 V
3
90
9.0
2.5
75
7.5
3
90
9.0
mA
mW
mW
NOTES
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to
calculate outgoing quality levels.
Specifications subject to change without notice.
–2–
REV. B
AD707
ABSOLUTE MAXIMUM RATINGS 1
ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 500 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . +VS and –VS
Storage Temperature Range (Q, H) . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . +300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
8-pin plastic package: θJA = 165°C/Watt; 8-pin cerdip package: θJA = 110°C/Watt;
8-pin small outline package: θ JA = 155°C/Watt; 8-pin header package: θ JA =
200°C/Watt.
Model
Temperature
Range
Package
Description
AD707AH
AD707AQ
AD707AR
AD707AR-REEL
AD707AR-REEL7
AD707BQ
AD707JN
AD707JR
AD707JR-REEL
AD707JR-REEL7
AD707KN
AD707KR
AD707KR-REEL
AD707KR-REEL7
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
8-Pin Metal Can
8-Pin Ceramic DIP
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Ceramic DIP
8-Pin Plastic DIP
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Plastic DIP
8-Pin Plastic SOIC
8-Pin Plastic SOIC
8-Pin Plastic SOIC
Package
Option
H-08A
Q-8
SO-8
SO-8
SO-8
Q-8
N-8
SO-8
SO-8
SO-8
N-8
SO-8
SO-8
SO-8
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
+VS
7
NULL
8
6
VOUT
0.059
(1.51)
4
–VS
1
NULL
2
–IN
3
+IN
0.110 (2.79)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD707 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. B
–3–
WARNING!
ESD SENSITIVE DEVICE
AD707–Typical Characteristics
+VS
+V
–1.0
–1.5
+1.5
+1.0
–V
+0.5
–VS
0
5
10
15
20
SUPPLY VOLTAGE – ±V
25
–0.5
30
+ VOUT
–1.0
–1.5
R L = 2kΩ
@ +25°C
+1.5
+1.0
– VOUT
+0.5
–VS
0
5
10
15
20
SUPPLY VOLTAGE – ±V
80
NUMBER OF UNITS
3
2
DUAL-IN-LINE PACKAGE
PLASTIC (N) or CERDIP (Q)
1
METAL CAN (H) PACKAGE
± 15V SUPPLIES
15
10
5
1k
100
LOAD RESISTANCE – Ω
10k
100
IO = 1mA
256 UNITS
TESTED
– 55°C TO +125°C
10
OUTPUT IMPEDANCE – Ω
90
20
Figure 3. Output Voltage Swing
vs. Load Resistance
100
4
25
0
10
25
Figure 2. Output Voltage Swing
vs. Supply Voltage
Figure 1. Input Common-Mode
Range vs. Supply Voltage
CHANGE IN OFFSET – µV
35
OUTPUT VOLTAGE – V p -p
–0.5
OUTPUT VOLTAGE SWING – ± V
(REFERRED TO SUPPLY VOLTAGES)
COMMOM-MODE VOLTAGE LIMIT – V
(REFERRED TO SUPPLY VOLTAGES)
+VS
70
60
50
40
30
20
1
AV = +1000
0.1
AV = +1
0.01
0.001
10
0
1
2
3
TIME AFTER POWER ON – Minutes
0
–0.4 –0.3 –0.2 –0.1
0
0.1 0.2 0.3
OFFSET VOLTAGE DRIFT – µV/°C
4
Figure 4. Offset Voltage Warm-Up
Drift
Figure 5. Typical Distribution of
Offset Voltage Drift
0.0001
0.1
1
10
100
1k
FREQUENCY – Hz
10k
100k
Figure 6. Output Impedance vs.
Frequency
45
INPUT VOLTAGE NOISE – nV/√Hz
INVERTING OR
NONINVERTING INPUT CURRENT – mA
40
30
20
10
0
0.4
0
1
10
DIFFERENTIAL VOLTAGE – ±V
Figure 7. Input Current vs.
Differential Input Voltage
100
40
35
VOLTAGE NOISE – 100nV/Div
0
30
25
I/F CORNER
0.7Hz
20
15
10
5
0
0.01
100
90
10
0%
TIME – 1sec/Div
0.1
1
10
FREQUENCY – Hz
Figure 8. Input Noise Spectral
Density
–4–
100
Figure 9. 0.1 Hz to 10 Hz Voltage
Noise
REV. B
AD707
RL = 1kΩ
VOUT = ±10V
10
8
6
4
2
OPEN-LOOP GAIN – V/µV
12
12
RLOAD = 1kΩ
10
8
6
4
Figure 10. Open-Loop Gain vs.
Temperature
5
10
15
20
SUPPLY VOLTAGE – V
90
PHASE
MARGIN
=58°
60
40
120
150
GAIN
20
25
180
0.01 0.1
1 10 100 1k 10k 100k 1M 10M
FREQUENCY – Hz
Figure 12. Open-Loop Gain and
Phase vs. Frequency
Figure 11. Open-Loop Gain vs.
Supply Voltage
160
80
0
0
0
0 20 40 60 80 100 120 140
TEMPERATURE – °C
30
60
100
10
2
0
–60 –40 –20
0
RL = 2kΩ
CL = 1000pF
120
14
OPEN-LOOP GAIN – V/µV
OPEN-LOOP GAIN – V/µV
140
16
14
PHASE – Degrees
16
160
35
120
100
80
60
40
POWER SUPPLY REJECTION – dB
RL = 2kΩ
+25°C
VS = ± 15V
30
OUTPUT VOLTAGE – V p-p
COMMON-MODE REJECTION – dB
FMAX = 3kHz
140
25
20
15
10
5
20
0
0.1
1
10
100
1k
10k
FREQUENCY – Hz
100k
1M
Figure 13. Common-Mode
Rejection vs. Frequency
0
1k
10k
100k
FREQUENCY – Hz
1M
Figure 14. Large Signal Frequency
Response
140
120
100
80
60
40
20
0
0.001 0.01
0.1
1
10 100 1k
FREQUENCY – Hz
10k 100k
Figure 15. Power Supply Rejection
vs. Frequency
SUPPLY CURRENT – mA
4
20mV/DIV
20mV/DIV
3
+125°C
2
–55°C
+25°C
1
0
CH1
CH1
TIME – 2µs/DIV
0
3
6
9
12
15
18
SUPPLY VOLTAGE – ±V
21
24
Figure 16. Supply Current vs.
Supply Voltage
REV. B
TIME – 2µs/DIV
Figure 17. Small Signal Transient
Response; A V = +1, RL = 2 kΩ,
CL = 50 pF
–5–
Figure 18. Small Signal Transient
Response; A V = +1, RL = 2 kΩ,
CL = 1000 pF
AD707
OFFSET NULLING
OPERATION WITH A GAIN OF 100
The input offset voltage of the AD707 is the lowest available in
a bipolar op amp, but if additional nulling is required, the
circuit shown in Figure 19 offers a null range of 200 µV. For
wider null capability, omit R1 and substitute a 20 kΩ potentiometer for R2.
Demonstrating the outstanding dc precision of the AD707 in
practical applications, Table I shows an error budget calculation
for the gain of –100 configuration shown in Figure 21.
Table I. Error Budget
+VS
R1
10kΩ
0.1µF
7
2
1
OFFSET
ADJUST
R2
2kΩ
8
AD707
3
4
6
0.1µF
Error Source
Maximum Error Contribution
Av = 100 (C Grade)
(Full Scale: VOUT = 10 V, VIN = 100 mV)
VOS
IOS
Gain (2 kΩ Load)
Noise
VOS Drift
15 µV/100 mV
(100 Ω)(1 nA)/100 mV
(100 V/8 × 106)100 mV
0.35 µV/100 mV
(0.1 V/°C)/100 mV
–VS
Figure 19. External Offset Nulling and Power Supply
Bypassing
Total Unadjusted Error
@ +25°C
@ –55°C to +125°C
GAIN LINEARITY INTO A 1 kΩ LOAD
The gain and gain linearity of the AD707 are the highest
available among monolithic bipolar amplifiers. Unlike other dc
precision amplifiers, the AD707 shows no degradation in gain or
gain linearity when driving loads in excess of 1 kΩ over a ± 10 V
output swing. This means high gain accuracy is assured over the
output range. Figure 20 shows the gain of the AD707, OP07, and
the OP77 amplifiers when driving a 1 kΩ load.
= 168 ppm > 12 Bits
= 268 ppm > 11 Bits
With Offset Calibrated Out
@ +25°C
= 17 ppm > 15 Bits
@ –55°C to +125°C
= 117 ppm > 13 Bits
10kΩ
+VS
The AD707 will drive 10 mA of output current with no significant effect on its gain or linearity.
100Ω
VIN
2
0.1µF
7
AD707
3
CHANGE IN OFFSET VOLTAGE – 10µV/Div
= 150 ppm
= 1 ppm
= 13 ppm
= 4 ppm
= 1 ppm/°C
= 168 ppm
+1 ppm/°C
AD707
4
6
VOUT
0.1µF
99Ω
–VS
Figure 21. Gain of –100 Configuration
OP07
Although the initial offset voltage of the AD707 is very low, it is
nonetheless the major contributor to system error. In cases
requiring additional accuracy, the circuit shown in Figure 19
can be used to null out the initial offset voltage. This method
will also cancel the effects of input offset current error. With the
offsets nulled, the AD707C will add less than 17 ppm of error.
OP77
@ +25°C
RLOAD = 1kΩ
–15
–10
–5
0
5
OUTPUT VOLTAGE – V
10
15
Figure 20. Gain Linearity of the AD707 vs.
Other DC Precision Op Amps
This error budget assumes no error in the resistor ratio and no
errors from power supply variation (the 120 dB minimum PSRR
of the AD707C makes this a good assumption). The external
resistors can cause gain error from mismatch and drift over
temperature.
–6–
REV. B
AD707
18-BIT SETTLING TIME
140 dB CMRR INSTRUMENTATION AMPLIFIER
Figure 22 shows the AD707 settling to within 80 µV of its final
value for a 20 V output step in less than 100 µs (in the test configuration shown in Figure 23). To achieve settling to 18 bits,
any amplifier specified to have a gain of 4 V/µV would appear to
be good enough, however, this is not the case. In order to truly
achieve 18-bit accuracy, the gain linearity must be better than
4 ppm.
The extremely tight dc specifications of the AD707 enable the
designer to build very high performance, high gain instrumentation amplifiers without having to select matched op amps for the
crucial first stage. For the second stage, the lowest grade AD707
is ideally suited. The CMRR is typically the same as the high
grade parts, but does not exact a premium for drift performance
(which is less critical in the second stage). Figure 24 shows an
example of the classic instrumentation amp. Figure 25 shows
that the circuit has at least 140 dB of common-mode rejection
for a ± 10 V common-mode input at a gain of 1001 (RG = 20 Ω).
The gain nonlinearity of the AD707 does not contribute to the
error, and the gain itself only contributes 0.1 ppm. The gain
error, along with the VOS and VOS drift errors do not comprise
1 LSB of error in an 18-bit system over the military temperature
range. If calibration is used to null offset errors, the AD707
resolves up to 20 bits at +25°C.
AD707
–IN
20,000
CIRCUIT GAIN = –––––– + 1
RG
3
R4
10kΩ
6
A1
2
R2
10kΩ
10kΩ
REFERENCE
SIGNAL
10V/Div
AD707
2
RG
A3
10kΩ
6
3
AD707
D.U.T.
OUTPUT
ERROR
50µV/Div
R1
10kΩ
2
9.9kΩ
A2
+IN
3
6
RCM
R2
200Ω
OUTPUT:
10V/Div
Figure 24. A 3 Op Amp Instrumentation Amplifier
High CMRR is obtained by first adjusting RCM until the output
does not change as the input is swept through the full commonmode range. The value of RG, should then be selected to achieve
the desired gain. Matched resistors should be used for the
output stage so that RCM is as small as possible. The smaller the
value Of RCM , the lower the noise introduced by potentiometer
wiper vibrations. To maintain the CMRR at 140 dB over a
20°C range, the resistor ratios in the output stage, R1/R2 and
R3/R4, must track each other better than 10 ppm/°C.
TIME – 50µs/Div
Figure 22. 18-Bit Settling
2x HP1N6263
200kΩ
2
OP27
6
VERROR x 100
7
3
4
10µF
10µF
0.1µF
0.1µF
INPUT
COMMON-MODE
SIGNAL: 10V/Div
–VS +VS
CH1
2kΩ
2kΩ
1.9kΩ
FLAT-TOP
PULSE
GENERATOR
100Ω
VIN
COMMON-MODE
ERROR REFERRED
TO INPUT: 5µV/Div
2kΩ
2
DATA
DYNAMICS
5109
OR
EQUIVALENT
D.U.T.
AD707
TIME – 2 sec/Div
7
3
4
10µF
10µF
0.1µF
0.1µF
Figure 25. Instrumentation Amplifier
Common-Mode Rejection
–VS +VS
Figure 23. Op Amp Settling Time Test Circuit
REV. B
CH2
6
–7–
AD707
The AD707’s excellent dc performance, especially the low offset
voltage, low offset voltage drift and high CMRR, makes it
possible to make a high precision voltage-controlled current
transmitter using a variation of the Howland Current Source
circuit (Figure 26). This circuit provides a bidirectional load
current which is derived from a differential input voltage.
R3
100kΩ
The performance and accuracy of this circuit will depend almost
entirely on the tolerance and selection of the resistors. The scale
resistor (RSCALE) and the four feedback resistors directly affect
the accuracy of the load current and should be chosen carefully
or trimmed.
As an example of the accuracy achievable, assume IL must be
10 mA, and the available VIN is only 10 mV.
RSCALE = 10 mV/10 mA = 1 Ω
R4
100kΩ
IERROR due to the AD707C:
0.1µF
+VS
Maximum IERROR = 2(VOS)/RSCALE + 2(VOS Drift)/R SCALE +
IOS (100 k/RSCALE )
7
2
AD707
VIN
3
C1164a–2–12/95
PRECISION CURRENT TRANSMITTER
= 2 (15 µV)/l Ω +2 (0.1 µV/°C)/l Ω
+ 1 nA (100 k)/l Ω (1.5 nA @ 125°C)
6
0.1µF
4
= 30 µA + 0.2 µA/°C + 100 µA
RSCALE
–VS
R1
100kΩ
(150 µA @ 125°C)
R2
100kΩ
VIN
t L = –––––––
RSCALE
= 130 µA/10 mA = 1.3% @ 25°C
= 180 µA/10 mA = 1.8% @ 125°C
RL
R2
(–––
R1 )
IL
Low drift, high accuracy resistors are required to achieve high
precision.
Figure 26. Precision Current Source/Sink
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin Metal Can
(H-08A)
8-Pin Plastic DIP
(N-8)
REFERENCE PLANE
0.430 (10.92)
0.348 (8.84)
0.750 (19.05)
0.500 (12.70)
8
0.250 (6.35)
MIN
0.050
(1.27)
MAX
0.100
(2.54)
BSC
5
1
0.370 (9.40)
0.335 (8.51)
7
3
0.019 (0.48)
0.016 (0.41)
0.040 (1.02) MAX
0.045 (1.14)
0.010 (0.25)
0.210 (5.33)
MAX
0.045 (1.14)
0.027 (0.69)
1
0.034 (0.86)
0.027 (0.69)
0.021 (0.53)
0.016 (0.41)
45 °
BSC
BASE & SEATING PLANE
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
8-Lead SOIC
(SO-8)
8-Pin Cerdip
(Q-8)
0.005 (0.13) MIN
0.325 (8.25)
0.300 (7.62)
0.130
(3.30)
0.160 (4.06)
MIN
0.115 (2.93)
0.022 (0.558)
0.070 (1.77) SEATING
PLANE
0.100
0.014 (0.356) (2.54) 0.045 (1.15)
BSC
8
2
0.100
(2.54)
BSC
0.060 (1.52)
0.015 (0.38)
PIN 1
6
4
0.200
(5.08)
BSC
0.280 (7.11)
0.240 (6.10)
0.160 (4.06)
0.110 (2.79)
5
0.335 (8.51)
0.305 (7.75)
4
PRINTED IN U.S.A.
0.185 (4.70)
0.165 (4.19)
0.1968 (5.00)
0.1890 (4.80)
0.055 (1.4) MAX
8
0.1574 (4.00)
0.1497 (3.80)
5
0.310 (7.87)
0.220 (5.59)
PIN 1
1
PIN 1
4
0.0098 (0.25)
0.0040 (0.10)
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200
(5.08)
MAX
SEATING
PLANE
0.150
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
8
5
1
4
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0500 0.0192 (0.49)
(1.27) 0.0138 (0.35)
BSC
0.0196 (0.50)
x 45°
0.0099 (0.25)
0.0098 (0.25)
0.0075 (0.19)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
0.015 (0.38)
0.008 (0.20)
15 °
0.023 (0.58)
0.014 (0.36)
0.100
(2.54)
BSC
0.070 (1.78)
0.030 (0.76)
0°
SEATING
PLANE
–8–
REV. B