Infineon AUIRF4905S Advanced planar technology Datasheet

AUIRF4905S
AUIRF4905L
AUTOMOTIVE GRADE
Features
 Advanced Planar Technology
 P-Channel MOSFET
 Low On-Resistance
 150°C Operating Temperature
 Fast Switching
 Repetitive Avalanche Allowed up to Tjmax
 Lead-Free, RoHS Compliant
 Automotive Qualified *
HEXFET® Power MOSFET
-55V
VDSS
RDS(on) max.
20m
ID (Silicon Limited)
-70A
ID (Package Limited)
-42A
D
D
S
S
D
G
TO-262
AUIRF4905L
G
Description
Specifically designed for Automotive applications, this cellular design of
HEXFET® Power MOSFETs utilizes the latest processing techniques to
achieve low on-resistance per silicon area. This benefit combined with the
fast switching speed and ruggedized device design that HEXFET power
MOSFETs are well known for, provides the designer with an extremely
efficient and reliable device for use in Automotive and a wide variety of other
applications.
Base part number
Package Type
AUIRF4905L
TO-262
AUIRF4905S
D2-Pak
D2Pak
AUIRF4905S
G
D
S
Gate
Drain
Source
Standard Pack
Form
Quantity
Tube
50
Tube
50
Tape and Reel Left
800
Orderable Part Number
AUIRF4905L
AUIRF4905S
AUIRF4905STRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
Parameter
Max.
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
-70
ID @ TC = 100°C
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
-44
-42
IDM
PD @TC = 25°C
Pulsed Drain Current 
Maximum Power Dissipation
-280
170
VGS
EAS
EAS (tested)
IAR
EAR
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited) 
Single Pulse Avalanche Energy Tested Value 
Avalanche Current 
Repetitive Avalanche Energy 
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
RJC
RJA
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mount, steady state) 
Units
A
W
1.3
± 20
140
790
See Fig.15,16, 12a, 12b
W/°C
V
mJ
A
mJ
-55 to + 150
°C
300
Typ.
Max.
Units
–––
0.75
40
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRF4905S/L
Static @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Trans conductance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
Conditions
-55
–––
–––
V VGS = 0V, ID = -250µA
––– -0.054 ––– V/°C Reference to 25°C, ID = -1mA
––– –––
20
m VGS = -10V, ID = -42A 
-2.0 ––– -4.0
V VDS = VGS, ID = -250µA
19
–––
–––
S VDS = -25V, ID = -42A
––– –––
-25
VDS = -55V, VGS = 0V
µA
––– ––– -250
VDS = -44V,VGS = 0V,TJ =125°C
––– ––– -100
VGS = -20V
nA
––– –––
100
VGS = 20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
–––
–––
–––
–––
–––
–––
–––
120
32
53
20
99
51
64
180
–––
–––
–––
–––
–––
–––
LD
Internal Drain Inductance
–––
4.5
–––
LS
Internal Source Inductance
–––
7.5
–––
Ciss
Coss
Input Capacitance
Output Capacitance
–––
–––
3500
1250
–––
–––
Crss
Coss
Coss
Coss eff.
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
450
4620
940
1530
–––
–––
–––
–––
Min.
Typ.
Max. Units
–––
–––
-42
–––
–––
-280
–––
–––
–––
–––
61
150
-1.3
92
220
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
ID = -42A
nC VDS = -44V
VGS = -10V
VDD = -28V
ID = -42A
ns
RG= 2.6
VGS = -10V 
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
VGS = 0V
VDS = -25V
ƒ = 1.0MHz
pF
VGS = 0V,VDS = -1.0V ƒ = 1.0MHz
VGS = 0V,VDS = -44V ƒ = 1.0MHz
VGS = 0V, VDS = 0V to -44V 
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = -42A,VGS = 0V 
ns TJ = 25°C ,IF = -42A , VDD = -28V
nC di/dt = 100A/µs 
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by max. junction temperature. (See fig.11)
 Limited by TJmax, starting TJ = 25°C, L = 0.16mH, RG = 25, IAS = -42A, VGS =-10V. Part not recommended for use above this value.
 Pulse width 1.0ms; duty cycle  2%.
 Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
 This value determined from sample failure population, starting TJ = 25°C, L = 0.08mH, RG = 25, IAS = 66A, VGS =10V.
 This is applied to D2 Pak, When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994
R is measured at TJ of approximately 90°C
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AUIRF4905S/L
1000
1000
100
BOTTOM
TOP
-ID, Drain-to-Source Current (A)
-ID, Drain-to-Source Current (A)
TOP
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
-4.5V
10
-4.5V
 60µs PULSE WIDTH
Tj = 25°C
1
10
100
BOTTOM
10
-4.5V
 60µs PULSE WIDTH
Tj = 150°C
1
1
0.1
100
0.1
1000
10
100
1000
Fig. 2 Typical Output Characteristics
Fig. 1 Typical Output Characteristics
40
1000.0
Gfs, Forward Transconductance (S)
TJ = 25°C
-ID , Drain-to-Source Current)
1
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
TJ = 150°C
100.0
10.0
1.0
VDS = -25V
TJ = 25°C
30
TJ = 150°C
20
10
VDS = -10V
380µs PULSE WIDTH
 60µs PULSE WIDTH
0.1
0
3
4
5
6
7
8
9
10
11
12
13
-VGS, Gate-to-Source Voltage (V)
Fig. 3 Typical Transfer Characteristics
3
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
-4.5V
14
0
20
40
60
80
-ID, Drain-to-Source Current (A)
Fig. 4 Typical Forward Trans conductance
vs. Drain Current
2015-11-13
AUIRF4905S/L
7000
-VGS, Gate-to-Source Voltage (V)
6000
Coss = Cds + Cgd
5000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Ciss
4000
3000
Coss
2000
1000
Crss
ID= -42A
VDS= -28V
VDS= -11V
12
8
4
0
0
1
10
0
100
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
1000
-ID, Drain-to-Source Current (A)
-ISD , Reverse Drain Current (A)
80
120
160
200
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000.0
100.0
TJ = 150°C
10.0
TJ = 25°C
1.0
40
QG Total Gate Charge (nC)
-VDS , Drain-to-Source Voltage (V)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
1msec
100µsec
10msec
LIMITED BY PACKAGE
10
DC
Tc = 25°C
Tj = 150°C
Single Pulse
VGS = 0V
1
0.1
0.0
4
VDS = -44V
16
0.4
0.8
1.2
1.6
2.0
0
1
10
-VSD , Source-to-Drain Voltage (V)
-VDS , Drain-toSource Voltage (V)
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
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AUIRF4905S/L
80
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
-ID , Drain Current (A)
LIMITED BY PACKAGE
60
40
20
0
ID = -42A
VGS = -10V
1.5
1.0
0.5
25
50
75
100
125
150
-60 -40 -20
TC , Case Temperature (°C)
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Normalized On-Resistance
vs. Temperature
1
Thermal Response ( Z thJC )
D = 0.50
0.20
0.1
0.10
0.05
0.01
J
0.02
0.01
R1
R1
J
1
R2
R2
R3
R3
C
1
2
2
3
C
3
Ci= iRi
Ci= iRi
Ri (°C/W)
i (sec)
0.1165
0.000068
0.3734
0.002347
0.2608
0.014811
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Fig 12a. Unclamped Inductive Test Circuit
EAS, Single Pulse Avalanche Energy (mJ)
600
ID
-17A
-30A
BOTTOM -42A
TOP
500
400
300
200
100
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 12b. Unclamped Inductive Waveforms
Fig 12c. Maximum Avalanche Energy vs. Drain Current
Fig 13a. Gate Charge Test Circuit
-VGS(th) Gate threshold Voltage (V)
3.6
3.2
ID = -250µA
2.8
2.4
2.0
-75
-50
-25
0
25
50
75
100
125
150
TJ , Temperature ( °C )
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Waveform
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AUIRF4905S/L
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
0.05
10
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse width
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
EAR , Avalanche Energy (mJ)
160
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = -42A
120
80
40
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
0
25
50
75
100
125
150
EAS (AR) = PD (ave)·tav
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for P-Channel HEXFET® Power MOSFETs
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
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AUIRF4905S/L
D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))
D2Pak (TO-263AB) Part Marking Information
Part Number
AUIRF4905S
YWWA
IR Logo
XX

Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRF4905S/L
TO-262 Package Outline (Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
Part Number
AUIRF4905L
YWWA
IR Logo
XX

Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRF4905S/L
D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRF4905S/L
Qualification Information
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
Qualification Level
Moisture Sensitivity Level
TO-262 Pak
Machine Model
Human Body Model
ESD
MSL1
D2-Pak
Charged Device Model
RoHS Compliant
Class M4 (+/- 425V)†
AEC-Q101-002
Class H2 (+/- 4000V)†
AEC-Q101-001
Class C5 (+/- 1125V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
11/13/2015
Comments


Updated datasheet with corporate template
Corrected ordering table on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
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the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
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Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
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