CSD25310Q2 www.ti.com SLPS459 – JANUARY 2014 CSD25310Q2, 20 V P-Channel NexFET™ Power MOSFETs Check for Samples: CSD25310Q2 FEATURES 1 • • • • • • • 2 PRODUCT SUMMARY Ultra-Low Qg and Qgd Low On Resistance Low Thermal Resistance Pb-Free Terminal Plating RoHS Compliant Halogen Free SON 2-mm × 2-mm Plastic Package VDS Drain-to-Source Voltage –20 V Qg Gate Charge Total (–4.5 V) 3.6 nC Qgd Gate Charge Gate to Drain RDS(on) VGS(th) nC 59.0 mΩ VGS = –2.5 V 27.0 mΩ VGS = –4.5 V 19.9 mΩ Threshold Voltage -0.85 V ORDERING INFORMATION APPLICATIONS • • • Drain-to-Source On Resistance 0.5 VGS = –1.8 V Battery Management Load Management Battery Protection Device Package Media Qty Ship CSD25310Q2 SON 2-mm × 2-mm Plastic Package 7-Inch Reel 3000 Tape and Reel ABSOLUTE MAXIMUM RATINGS DESCRIPTION TA = 25°C VALUE UNIT This 19.9 mΩ, –20 V P-Channel device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. Its low on resistance coupled with an extremely small footprint in a SON 2 mm × 2 mm plastic package make the device ideal for battery operated space constrained operations. VDS Drain-to-Source Voltage –20 V VGS Gate-to-Source Voltage ±8 V Continuous Drain Current (Package Limit) –20 A Continuous Drain Current(1) –9.6 A 1 IDM Pulsed Drain Current(2) 48 A PD Power Dissipation(1) 2.9 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C (1) RθJA = 43°C/W on 1 in² Cu (2 oz.) on .060-inch thick FR4 PCB. (2) Pulse duration 10 μs, duty cycle ≤ 2% Top View S ID 6 S 5 S 4 D S S 2 G 3 D P0112-01 RDS(on) vs VGS GATE CHARGE 5 TC = 25°C, I D = −5A TC = 125°C, I D = −5A 72 − VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (mΩ) 80 64 56 48 40 32 24 16 8 0 0 1 2 3 4 5 6 − VGS - Gate-to- Source Voltage (V) 7 8 G001 ID = −5A VDS = −10V 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 Qg - Gate Charge (nC) 4 4.5 5 G001 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of a027317. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2014, Texas Instruments Incorporated CSD25310Q2 SLPS459 – JANUARY 2014 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS TA = 25°C, unless otherwise specified PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain-to-Source Voltage VGS = 0 V, ID = –250 μA IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = –16 V IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = –8 V VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, IDS = –250 μA RDS(on) Drain-to-Source On Resistance gfs Transconductance –20 V –1 μA –100 nA –0.8 5 –1.1 0 V VGS = –1.8 V, IDS = –5 A 59.0 89.0 mΩ VGS = –2.5 V, IDS = –5 A 27.0 32.5 mΩ VGS = –4.5 V, IDS = –5 A 19.9 23.9 mΩ –0.5 5 VDS = –16 V, IDS = –5 A 34 S Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance Rg Series Gate Resistance 1.9 Qg Gate Charge Total (–4.5 V) 3.6 Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tf Fall Time VGS = 0 V, VDS = –10 V, f = 1 MHz 504 655 pF 281 365 pF 16.7 21.7 pF 4.7 nC Ω 0.5 nC 1.1 nC 0.6 nC VDS = –10 V, VGS = 0 V 5.0 nC 8 ns VDS = –10 V, VGS = –4.5 V, IDS = –5 A RG = 2 Ω 15 ns 15 ns 5 ns VDS = –10 V, IDS = –5 A Diode Characteristics VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time IDS = –5 A, VGS = 0 V –0.8 VDD = –10 V, IF = –5 A, di/dt = 200 A/μs –1.0 V 9.2 nC 13 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER RθJC RθJA (1) (2) 2 MIN Thermal Resistance Junction to Case (1) Thermal Resistance Junction to Ambient (1) (2) 2 TYP MAX UNIT 4.5 °C/W 55 °C/W 2 RθJC is determined with the device mounted on a 1-inch (6.45-cm ), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD25310Q2 CSD25310Q2 www.ti.com SLPS459 – JANUARY 2014 GATE GATE Source Source N-Chan N-Chan Max RθJA = 55 when mounted on 1 inch2 (6.45 cm2) of 2-oz. (0.071-mm thick) Cu. Max RθJA = 215 when mounted on minimum pad area of 2-oz. (0.071-mm thick) Cu. DRAIN DRAIN M0164-02 M0164-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 50 − IDS - Drain-to-Source Current (A) − IDS - Drain-to-Source Current (A) 50 45 40 35 30 VGS = −4.5V VGS = −2.5V VGS = −1.8V 25 20 15 10 5 0 0 1 2 3 4 − VDS - Drain-to-Source Voltage (V) 5 VDS = −5V 45 40 35 30 25 20 15 TC = 125°C TC = 25°C TC = −55°C 10 5 0 0 G001 Figure 2. Saturation Characteristics 0.5 1 1.5 2 2.5 3 − VGS - Gate-to-Source Voltage (V) 3.5 Product Folder Links: CSD25310Q2 G001 Figure 3. Transfer Characteristics Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated 4 3 CSD25310Q2 SLPS459 – JANUARY 2014 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 10000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd ID = −5A VDS = −10V 4.5 4 1000 C − Capacitance (nF) − VGS - Gate-to-Source Voltage (V) 5 3.5 3 2.5 2 1.5 100 10 1 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 Qg - Gate Charge (nC) 4 4.5 1 5 0 2 4 6 8 10 12 14 16 − VDS - Drain-to-Source Voltage (V) G001 Figure 4. Gate Charge TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING RDS(on) - On-State Resistance (mΩ) − VGS(th) - Threshold Voltage (V) G001 80 ID = −250uA 1.05 0.95 0.85 0.75 0.65 0.55 0.45 −75 −25 25 75 125 TC - Case Temperature (ºC) TC = 25°C, I D = −5A TC = 125°C, I D = −5A 72 64 56 48 40 32 24 16 8 0 175 0 1 G001 Figure 6. Threshold Voltage vs Temperature TEXT ADDED FOR SPACING 8 G001 TEXT ADDED FOR SPACING ID = −5A 1.4 1.3 1.2 1.1 1 0.9 0.8 VGS = −4.5V VGS = −2.5V 0.7 0.6 −75 7 100 − ISD − Source-to-Drain Current (A) 1.5 2 3 4 5 6 − VGS - Gate-to- Source Voltage (V) Figure 7. On-State Resistance vs Gate-to-Source Voltage 1.6 Normalized On-State Resistance 20 Figure 5. Capacitance 1.15 −25 25 75 125 TC - Case Temperature (ºC) 175 TC = 25°C TC = 125°C 10 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 − VSD − Source-to-Drain Voltage (V) G001 Figure 8. Normalized On-State Resistance vs Temperature 4 18 1 G001 Figure 9. Typical Diode Forward Voltage Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD25310Q2 CSD25310Q2 www.ti.com SLPS459 – JANUARY 2014 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 24.0 1ms 10ms 100ms 1s DC − IDS - Drain- to- Source Current (A) − IDS - Drain-to-Source Current (A) 1000 100 10 1 0.1 Single Pulse Typical RthetaJA =170ºC/W(min Cu) 0.01 0.01 0.1 1 10 − VDS - Drain-to-Source Voltage (V) Figure 10. Maximum Safe Operating Area 50 20.0 16.0 12.0 8.0 4.0 0.0 −50 −25 G001 0 25 50 75 100 125 TC - Case Temperature (ºC) 150 175 G001 Figure 11. Maximum Drain Current vs Temperature Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD25310Q2 5 CSD25310Q2 SLPS459 – JANUARY 2014 www.ti.com MECHANICAL DATA Q2 Package Dimensions D2 D K3 K1 K K2 4 1 2 3 4 5 6 3 2 1 K4 E E1 E2 5 E3 6 L Pin 1 Dot Top View Pin 1 ID e b D1 A A1 C Bottom View Front View M0165-01 DIM MILLIMETERS MIN NOM MAX MIN NOM MAX A 0.700 0.750 0.800 0.028 0.030 0.032 A1 0.000 0.050 0.000 b 0.250 0.350 0.010 0.300 C 0.203 TYP D 2.000 TYP D1 0.900 0.950 D2 0.300 TYP E 2.000 TYP E1 0.900 1.000 0.002 0.012 0.080 TYP 1.000 0.036 0.038 0.080 TYP 1.100 0.036 0.040 0.280 TYP 0.0112 TYP 0.470 TYP 0.0188 TYP e 0.650 TYP 0.026 TYP K 0.280 TYP 0.0112 TYP K1 0.350 TYP 0.014 TYP K2 0.200 TYP 0.008 TYP K3 0.200 TYP 0.008 TYP 0.470 TYP 0.200 0.25 0.040 0.012 TYP E3 L 0.014 0.008 TYP E2 K4 6 INCHES 0.044 0.0188 TYP 0.300 0.008 Submit Documentation Feedback 0.010 0.012 Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD25310Q2 CSD25310Q2 www.ti.com SLPS459 – JANUARY 2014 Recommended PCB Pattern For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. Recommended Stencil Pattern Note: All dimensions are in mm, unless otherwise specified. Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD25310Q2 7 CSD25310Q2 SLPS459 – JANUARY 2014 www.ti.com Q2 Tape and Reel Information 4.00 ±0.10 Ø 1.50 ±0.10 4.00 ±0.10 Ø 1.00 ±0.25 1.00 ±0.05 2.30 ±0.05 10° Max 3.50 ±0.05 8.00 +0.30 –0.10 1.75 ±0.10 2.00 ±0.05 0.254 ±0.02 2.30 ±0.05 10° Max M0168-01 Notes: 1. Measured from centerline of sprocket hole to centerline of pocket 2. Cumulative tolerance of 10 sprocket holes is ±0.20 3. Other material available 4. Typical SR of form tape Max 109 OHM/SQ 5. All dimensions are in mm, unless otherwise specified. 8 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: CSD25310Q2 PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2014 PACKAGING INFORMATION Orderable Device Status (1) CSD25310Q2 ACTIVE Package Type Package Pins Package Drawing Qty SON DQK 6 3000 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM Op Temp (°C) Device Marking (4/5) -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2014 Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2014, Texas Instruments Incorporated