DSC2010 Low-Jitter Configurable CMOS Oscillator General Description The DSC2010 series of high performance CMOS oscillators utilize a proven silicon MEMS technology to provide excellent jitter and stability while incorporating additional device functionality. The DSC2010 allows the user to easily modify the frequency and drive strength of the oscillator using pins. The DSC2010 has provision for up to four user-defined pre-programmed, pin-selectable output frequencies, and eight pin-selectable output drive levels to help reduce EMI. DSC2010 is packaged in a 14-pin 3.2x2.5 mm QFN package and available in temperature grades from Ext. Commercial to Automotive. Features Low RMS Phase Jitter: <1 ps (typ) High Stability: ±10, ±25, ±50 ppm Wide Temperature Range o Automotive: -55° to 125° C o Ext. Industrial: -40° to 105° C o Industrial: -40° to 85° C o Ext. commercial: -20° to 70° C High Supply Noise Rejection: -50 dBc Pin-Selectable Configurations o 3-bit Output Drive Strength o 2-bit Output Frequency Combinations Short Lead Times: 2 Weeks Wide Freq. Range: o CMOS Output: 2.3 to 170 MHz Miniature Footprint of 3.2x2.5mm Block Diagram Excellent Shock & Vibration Immunity o Qualified to MIL-STD-883 High Reliability o 20x better MTF than quartz oscillators Supply Range of 2.25 to 3.6 V Lead Free & RoHS Compliant Applications Consumer Electronics Storage Area Networks o SATA, SAS, Fibre Channel Passive Optical Networks o EPON, 10G-EPON, GPON, 10G-PON Ethernet o 1G, 10GBASE-T/KR/LR/SR, and FCoE HD/SD/SDI Video & Surveillance PCI Express _____________________________________________________________________________________________________________________________ _________________ DSC2010 Page 1 MK-Q-B-P-D-12042601-2 DSC2010 Low-Jitter Configurable CMOS Oscillator Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin Name Enable NC NC GND FS0 FS1 NC Output OS0 OS1 NC VDD2 VDD OS2 Pin Type I NA NA Power I I NA O I I NA Power Power I Description Enables outputs when high and disables when low Leave unconnected or grounded Leave unconnected or grounded Ground Least significant bit for frequency selection Most significant bit for frequency selection Leave unconnected or grounded CMOS output Least significant bit for output drive strength selection Middle bit for output drive strength selection Leave unconnected or grounded Power Supply Power Supply Most significant bit for output drive strength selection Operational Description The DSC2010 is a CMOS oscillator consisting of a MEMS resonator and a support PLL IC. The CMOS output is generated through independent 8-bit programmable dividers from the output of the internal PLL. The actual frequency output by the DSC2010 is controlled by an internal pre-programmed memory (OTP). This memory stores all coefficients required by the PLL for up to four different frequencies. Two control pins (FS0 – FS1) select the output frequency. Discera supports customer defined versions of the DSC2010. Standard frequency options are described in the following sections. When Enable (pin 1) is floated or connected to VDD, the DSC2010 is in operational mode. Driving Enable to ground will disable the output driver (hi-impedance mode). The DSC2010 has programmable output drive strength. Using three control pins (OS0-OS2) the drive strength can be adjusted to match circuit board impedances to reduce power supply noise, overshoot/undershoot and EMI. Table 1 displays typical rise / fall times for the output with a 15pf load capacitance as a function of these control pins at VDD=3.3V and room temperature. Table 1. Rise/Fall times for drive strengths Output Drive Strength Bits [OS2, OS1, OS0] - Default [111] 000 001 010 011 100 101 110 111 tr (ns) 2.1 1.7 1.6 1.4 1.3 1.3 1.2 1.1 tf (ns) 2.5 2.4 2.4 2.2 1.8 1.6 1.4 1.4 _____________________________________________________________________________________________________________________________ _________________ DSC2010 Page 2 MK-Q-B-P-D-12042601-2 DSC2010 Low-Jitter Configurable CMOS Oscillator Output Clock Frequencies Table 2 lists the standard frequency configurations and the associated ordering information to be used in conjunction with the ordering code. Customer defined combinations are available. Table 2. Pre-programmed pin-selectable output frequency combinations Freq Select Bits [FS1, FS0] – Default is [11] Ordering Info Freq (MHz) 00 01 10 11 A0001 fOUT 27 24 148.5 74.25 A0002 fOUT 155.52 106.25 156.25 125 A0003 fOUT 25 75 125 150 A0004 fOUT 72 74.25 36 108 A0005 fOUT 27 50 0* 0* A0006 fOUT 16 13.56 0* 0* A0007 fOUT 96 55 0* 0* A0008 fOUT 25 50 0* 0* A0009 fOUT 55.296 27.648 0* 0* A00010 fOUT 27.648 55.296 0* 0* A000X fOUT Contact factory for additional configurations. Frequency select bit are weakly tied high so if left unconnected the default setting will be [11] and the device will output the associated frequency highlighted in Bold. 0* – denotes invalid selection, output frequency is not specified. _____________________________________________________________________________________________________________________________ _________________ DSC2010 Page 3 MK-Q-B-P-D-12042601-2 DSC2010 Low-Jitter Configurable CMOS Oscillator Absolute Maximum Ratings Item Min Max Unit Supply Voltage -0.3 +4.0 V Input Voltage -0.3 VDD+0.3 V Junction Temp - +150 °C Storage Temp -55 +150 °C Soldering Temp - +260 °C ESD HBM MM CDM - Ordering Code Condition 40sec max. Temp Range E: -20 to 70 I: -40 to 85 L: -40 to 105 M: -55 to 125 DSC2010 V F I 2 Package F: 3.2x2.5mm 4000 400 1500 - xxxxx Stability 1: ±50ppm 2: ±25ppm 5: ±10ppm Packing T: Tape & Reel : Tube T Freq (MHz) See Freq. table Note: 1000+ years of data retention on internal memory Specifications (Unless specified otherwise: T=25° C, max CMOS drive strength) Parameter Supply Voltage 1 Condition VDD Supply Current IDD Frequency Stability Δf Aging Startup Time2 Input Logic Levels Input logic high Input logic low Δf tSU VIH VIL Output Disable Time3 Output Enable Time Min. Typ. 2.25 EN pin low – output is disabled Includes frequency variations due to initial tolerance, temp. and power supply voltage 1 year @25°C T=25°C 21 Unit 3.6 V 23 ±10 ±25 ±50 ±5 5 mA ppm ppm ms 0.25xVDD V tDA 5 ns tEN 20 ns 4 0.75xVDD - Max. Pull-Up Resistor Pull-up exists on all digital IO Supply Current4 EN pin high – output is enabled CL=15pF, FO=125 MHz 40 kΩ CMOS Output Output Logic Levels Output logic high Output logic low Output Transition time3 Rise Time Fall Time Frequency IDD VOH VOL tR tF f0 I=±6mA 31 0.9xVDD - 20% to 80% CL=15pf Commercial/Industrial temp range Automotive temp range 1.1 1.3 2.3 Output Duty Cycle SYM Period Jitter JPER FO=125 MHz 3 JCC 200kHz to 20MHz @ 125MHz 100kHz to 20MHz @ 125MHz 12kHz to 20MHz @ 125MHz 0.3 0.38 1.7 Integrated Phase Noise Notes: 1. 2. 3. 4. 45 35 mA 0.1xVDD V 2 2 170 100 ns 55 MHz % psRMS 2 psRMS Pin 4 VDD should be filtered with 0.01uf capacitor. tsu is time to 100PPM stable output frequency after VDD is applied and outputs are enabled. Output Waveform and Test Circuit figures below define the parameters. Output is enabled if Enable pad is floated or not connected. _____________________________________________________________________________________________________________________________ _________________ DSC2010 Page 4 MK-Q-B-P-D-12042601-2 DSC2010 Low-Jitter Configurable CMOS Oscillator Nominal Performance Parameters (Unless specified otherwise: T=25° C, VDD=3.3 V) 2.5 Phase Jitter (ps RMS) 25MHz-CMOS 50MHz-CMOS 2.0 106MHz-CMOS 1.5 125MHz-CMOS 1.0 0.5 0.0 0 200 400 600 800 1000 Low-end of integration BW: x kHz to 20 MHz CMOS Phase jitter (integrated phase noise) Output Waveform: CMOS tR tF VOH Output VOL tEN 1/fo tDA VIH Enable VIL _____________________________________________________________________________________________________________________________ _________________ DSC2010 Page 5 MK-Q-B-P-D-12042601-2 DSC2010 Low-Jitter Configurable CMOS Oscillator Solder Reflow Profile 20-40 Sec Se 3C / 217°C 200°C 60-150 Sec . ax cM Se 3C / 25°C a x. Reflow 60-180 Sec cM 150°C Se 6C/ Temperature (°C) cM ax . 260°C Cool Pre heat Time 8 min max MSL 1 @ 260°C refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec Max. Preheat Time 150°C to 200°C 60-180 Sec Time maintained above 217°C 60-150 Sec 255-260°C Peak Temperature Time within 5°C of actual Peak 20-40 Sec 6°C/Sec Max. Ramp-Down Rate Time 25°C to Peak Temperature 8 min Max. Package Dimensions 3.2 x 2.5 mm 14 Lead Plastic Package Disclaimer: Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. 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A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. MICREL, Inc. Phone: +1 (408) 944-0800 ● ● 2180 Fortune Drive, Fax: +1 (408) 474-1000 San Jose, California 95131 ● Email: [email protected] ● ● USA www.micrel.com _____________________________________________________________________________________________________________________________ _________________ DSC2010 Page 6 MK-Q-B-P-D-12042601-2