NSC DS36277TM Dominant mode multipoint transceiver Datasheet

DS36277
Dominant Mode Multipoint Transceiver
General Description
Features
The DS36277 Dominant Mode Multipoint Transceiver is designed for use on bi-directional differential busses. It is optimal for use on Interfaces that utilize Society of Automotive
Engineers (SAE) J1708 Electrical Standard.
The device is similar to standard TIA/EIA-485 transceivers,
but differs in enabling scheme. The Driver’s Input is normally
externally tied LOW, thus providing only two states: Active
(LOW), or Disabled (OFF). When the driver is active, the
dominant mode is LOW, conversely, when the driver is disabled, the bus is pulled HIGH by external bias resistors.
n FAILSAFE receiver, RO = HIGH for:
— OPEN inputs
— Terminated inputs
— SHORTED inputs
n Optimal for use in SAE J1708 Interfaces
n Compatible with popular interface standards:
— TIA/EIA-485 and TIA/EIA-422-A
— CCITT recommendation V.11
n Bi-directional transceiver
— Designed for multipoint transmission
n Wide bus common mode range
— (−7V to +12V)
n Available in plastic DIP and SOIC packages
The receiver provides a FAILSAFE feature that guarantees a
known output state when the Interface is in the following
conditions: Floating Line, Idle Line (no active drivers), and
Line Fault Conditions (open or short). The receiver output is
HIGH for the following conditions: Open Inputs, Terminated
Inputs (50Ω), or Shorted Inputs. FAILSAFE is a highly desirable feature when the transceivers are used with Asynchronous Controllers such as UARTs.
Connection and Logic Diagram
Truth Tables
Driver
Inputs
Outputs
DE
DI
DO/RI
DO /RI
L
L
L
H
L
H
H
L
H
X
Z
Z
01138401
Order Number DS36277TM or DS36277TN
See NS Package Number M08A or N08E
Receiver
Inputs
Output
RE
DO/RI–DO /RI
RO
L
≥ 0 mV
H
L
≤ −500 mV
L
L
SHORTED
H
L
OPEN
H
H
X
Z
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS011384
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DS36277 Dominant Mode Multipoint Transceiver
February 2002
DS36277
Absolute Maximum Ratings (Note 1)
Storage Temperature Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Lead Temperature (Soldering 4 sec.)
260˚C
ESD Rating (HBM, 1.5 kΩ, 100 pF)
5.0 kV
Supply Voltage (VCC)
7V
Input Voltage (DE , RE , and DI)
Recommended Operating
Conditions
5.5V
Driver Output Voltage/
Receiver Input Voltage
−10V to +15V
Receiver Output Voltage (RO)
−65˚C to +150˚C
Supply Voltage, VCC
5.5V
Bus Voltage
Maximum Package Power Dissipation @ +25˚C
Min
Max
Units
4.75
5.25
V
−7
+12
V
−40
+85
˚C
Operating Temperature (TA)
N Package
(derate 9.3 mW/˚C above +25˚C)
1168 mW
M Package
(derate 5.8 mW/˚C above +25˚C)
726 mW
DS36277T
Electrical Characteristics (Notes 2, 4)
Over recommended Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
1.5
3.6
Max
Units
DRIVER CHARACTERISTICS
VOD
Differential Output Voltage
IO = 0 mA (No Load)
VoDO
Output Voltage
IO = 0 mA (Output to GND)
VoDO
Output Voltage
VT1
Differential Output Voltage
(Termination Load)
RL = 100Ω (422)
Balance of VT1
RL = 54Ω
|VT1 − VT1 |
RL = 100Ω
Driver Common Mode
Output Voltage
RL = 54Ω
RL = 100Ω
Balance of VOS
RL = 54Ω
∆VT1
VOS
∆VOS
RL = 54Ω (485)
|VOS − VOS |
RL = 100Ω
VOH
Output Voltage High
IOH = −22 mA
VOL
Output Voltage Low
IOL = +22 mA
IOSD
Driver Short-Circuit
Output Current
VO = −7V
(Figure 1 )
(Note 3)
6
V
0
6
V
0
6
V
1.3
2.2
5.0
V
1.7
2.6
5.0
V
0.2
V
0.2
V
−0.2
−0.2
(Figure 1 )
(Note 3)
0
2.5
3.0
V
0
2.5
3.0
V
0.2
V
0.2
V
2
V
−0.2
−0.2
(Figure 2 )
2.7
3.7
1.3
VO = +12V
(Figure 3 )
V
92
290
mA
−187
−290
mA
−0.150
0
V
RECEIVER CHARACTERISTICS
VTH
Differential Input High
Threshold Voltage (Note 5)
−7V ≤ VCM ≤ +12V
Differential Input Low
Threshold Voltage (Note 5)
−7V ≤ VCM ≤ +12V
VHST
Hysteresis (Note 6)
VCM = 0V
IIN
Line Input Current
(VCC = 4.75V, 5.25V, 0V)
Other Input = 0V
VI = +12V
0.5
1.5
mA
DE = VIH (Note 7)
VI = −7V
−0.5
−1.5
mA
VTL
VO = VOH, IO = −0.4 mA
VO = VOL, IO = 8.0 mA
−0.5
−0.230
V
80
mV
IOSR
Short Circuit Current
VO = 0V
−15
−32
−85
mA
IOZ
TRI-STATE ® Leakage Current
VO = 0.4 to 2.4V
−20
1.4
+20
µA
VOH
Output High Voltage
(Figure 12 )
VID = 0V, IOH = −0.4 mA
2.3
3.7
V
VID = OPEN, IOH = −0.4 mA
2.3
3.7
V
Output Low Voltage
(Figure 12 )
VID = −0.5V, IOL = +8 mA
0.3
0.7
VID = −0.5V, IOL = +16 mA
0.3
0.8
VOL
RIN
RO
Input Resistance
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10
2
20
V
V
kΩ
(Continued)
Over recommended Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DEVICE CHARACTERISTICS
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IIH
High Level Input Current
VIH = 2.4V
IIL
Low Level Input Current
VIL = 0.4V
VCL
Input Clamp Voltage
ICL = −18 mA
DE ,
RE ,
or
DI
2.0
VCC
V
GND
0.8
V
20
µA
−100
µA
−0.7
−1.5
V
ICC
Output Low Voltage
DE = 0V, RE = 0V, DI = 0V
39
60
mA
ICCR
Supply Current
DE = 3V, RE = 0V, DI = 0V
24
50
mA
ICCD
(No Load)
DE = 0V, RE = 3V, DI = 0V
40
75
mA
DE = 3V, RE = 3V, DI = 0V
27
45
mA
ICCX
Switching Characteristics (Note 4)
Over recommended Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRIVER CHARACTERISTICS
tPLHD
Diff. Prop. Delay Low to High
RL = 54Ω
8
17
60
ns
tPHLD
Diff. Prop. Delay High to Low
CL = 50 pF
8
19
60
ns
tSKD
Diff. Skew (|tPLHD–tPHLD|)
CD = 50 pF
2
10
ns
tr
Diff. Rise Time
(Figures 4, 5 )
11
60
ns
tf
Diff. Fall Time
11
60
ns
ns
tPLH
Prop. Delay Low to High
RL = 27Ω, CL = 15 pF
22
85
tPHL
Prop. Delay High to Low
(Figures 6, 7 )
25
85
ns
tPZH
Enable Time Z to High
RL = 110Ω
25
60
ns
tPZL
Enable Time Z to Low
CL = 50 pF
30
60
ns
tPHZ
Disable Time High to Z
(Figure 8 – Figure 11 )
tPLZ
Disable Time Low to Z
16
60
ns
11
60
ns
RECEIVER CHARACTERISTICS
tPLH
Prop. Delay Low to High
VID = −1.5V to +1.5V
15
37
90
ns
tPHL
Prop. Delay High to Low
CL = 15 pF
15
43
90
ns
tSK
Skew (|tPLH–tPHL|)
(Figures 13, 14 )
6
15
ns
ns
tPZH
Enable Time Z to High
CL = 15 pF
12
60
tPZL
Enable Time Z to Low
(Figures 15, 16 )
28
60
ns
tPHZ
Disable Time High to Z
20
60
ns
tPLZ
Disable Time Low to Z
10
60
ns
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise
specified.
Note 3: ∆ |VT1| and ∆ |VOS| are changes in magnitude of VT1 and VOS, respectively, that occur when the input changes state.
Note 4: All typicals are given for VCC = 5.0V and TA = +25˚C.
Note 5: Threshold parameter limits specified as an algebraic value rather than by magnitude.
Note 6: Hysteresis defined as VHST = VTH − VTL.
Note 7: IIN includes the receiver input current and driver TRI-STATE leakage current.
3
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DS36277
Electrical Characteristics (Notes 2, 4)
DS36277
Parameter Measurement Information
01138402
FIGURE 1. Driver VT1 and VOS Test Circuit
01138403
FIGURE 2. Driver VOH and VOL Test Circuit
01138404
FIGURE 3. Driver Short Circuit Test Circuit
01138405
FIGURE 4. Driver Differential Propagation Delay and Transition Time Test Circuit
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4
DS36277
Parameter Measurement Information
(Continued)
01138406
FIGURE 5. Driver Differential Propagation Delays and Transition Times
01138407
FIGURE 6. Driver Propagation Delay Test Circuit
01138408
FIGURE 7. Driver Propagation Delays
5
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DS36277
Parameter Measurement Information
(Continued)
01138409
S1 to DO for DI = 3V
S1 to DO for DI = 0V
FIGURE 8. Driver TRl-STATE Test Circuit (tPZH, tPHZ)
01138410
FIGURE 9. Driver TRI-STATE Delays (tPZH, tPHZ)
01138411
S1 to DO for DI = 0V
S1 to DO for DI = 3V
FIGURE 10. Driver TRI-STATE Test Circuit (tPZL, tPLZ)
01138412
FIGURE 11. Driver TRl-STATE Delays (tPZL, tPLZ)
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DS36277
Parameter Measurement Information
(Continued)
01138413
FIGURE 12. Receiver VOH and VOL
01138414
FIGURE 13. Receiver Propagation Delay Test Circuit
01138415
FIGURE 14. Receiver Propagation Delays
01138416
FIGURE 15. Receiver TRI-STATE Delay Test Circuit
7
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DS36277
Parameter Measurement Information
(Continued)
01138417
S1 1.5V
S2 OPEN
S3 CLOSED
01138419
S1 1.5V
S2 CLOSED
S3 CLOSED
01138418
S1 −1.5V
S2 CLOSED
S3 OPEN
01138420
S1 −1.5V
S2 CLOSED
S3 CLOSED
FIGURE 16. Receiver Enable and Disable Timing
Note 8: The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% duty cycle, tr and tf < 6.0 ns, ZO = 50Ω.
Note 9: CL includes probe and stray capacitance.
Note 10: Diodes are 1N916 or equivalent.
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DS36277
Typical Performance Characteristics
Differential Output Voltage
vs Output Current
Differential Output Voltage
vs Output Current
01138422
01138423
Driver VOH vs IOH vs VCC
Driver VOH vs IOH vs Temperature
01138424
01138425
Driver VOL vs IOL vs VCC
Driver VOL vs IOL vs Temperature
01138426
01138427
9
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DS36277
Typical Performance Characteristics
(Continued)
Receiver VOH vs IOH vs VCC
Receiver VOH vs IOH vs Temperature
01138428
01138429
Receiver VOL vs IOL vs VCC
Receiver VOL vs IOL vs Temperature
01138430
01138431
Supply Current vs Supply Voltage
Supply Current vs Temperature
01138432
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01138433
10
DS36277
Typical Performance Characteristics
(Continued)
Voltage Output vs Voltage Input (Hysteresis)
01138434
Typical Applications Information
SAE J1708 Node with External Bias Resistors and Filters
01138421
11
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DS36277
Physical Dimensions
inches (millimeters) unless otherwise noted
8-Lead Molded Package (SO)
Order Number DS36277TM
NS Package Number M08A
8-Lead Molded Dual-In-Line Package (N)
Order Number DS36277TN
NS Package Number N08E
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12
DS36277 Dominant Mode Multipoint Transceiver
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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device or system whose failure to perform can be reasonably
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