ETC EDI7F33512C100BNC

EDI7F33512C
512Kx32 Flash
DESCRIPTION
FIG. 1
The EDI7F33512, EDI7F233512 and EDI7F433512 are organized
as 512Kx32 and 2x512Kx32 and 4x512Kx32 respectively. The
modules are based on AMD's AM29F040 - 512Kx8 Flash Device
in TSOP packages which are mounted on an FR4 substrate.
BLOCK DIAGRAMS
EDI7F33512C-BNC: 512Kx32 80 PIN SIMM
EØ\
A0-A18
G\
The modules offer access times between 80 and 150ns allowing
for operation of high-speed microprocessors without wait states.
FEATURES
512K
X8
DQ0-DQ7
512K
X8
DQ8-DQ15
512K
X8
DQ16-DQ23
512K
X8
DQ24-DQ31
W0\
• 512Kx32, 2x512Kx32 and 4x512Kx32 Densities
W1\
• Based on AMDs - AM290F040 Flash Device
• Fast Read Access Time - 80-150ns
W2\
• 5- Volt-Only Reprogramming
• Sector Erase Architecture
W3\
• Uniform sectors of 64 Kbytes each
EDI7F233512C-BNC: 2x512Kx32 80 PIN SIMM
• Any combination of sectors can be erased
E1\
E0\
A0-A18
G\
• Also supports full chip erase
• Sector Protection
512K
X8
• Hardware method that disables any combination of sectors
from write or erase operations
W0\
512K
X8
• Embedded Erase Algorithms
W1\
• Automatically preprograms and erases the chip or any combination of sectors
512K
X8
W2\
• Embedded Program Algorithms
512K
X8
• Automatically programs and verifies data at specified address
W3\
512K
X8
DQ0-DQ7
512K
X8
DQ8-DQ15
512K
X8
DQ16-DQ23
512K
X8
DQ24-DQ31
EDI7F433512C-BNC: 4x512Kx32 80 PIN SIMM
• Data Polling and Toggle Bit feature for detection of program or
erase cycle completion
E3\
E2\
E1\
E0\
A0-A18
G\
• Low Power Dissipation
• 40mA per Device Active Current
512K
• 10µA per Device CMOS Standby Current
X8
512K
X8
512K
X8
512K
X8
DQ0-DQ7
• Typical Endurance >100,000 Cycles
W0\
• Single 5 Volt ±10% Supply
512K
512K
512K
512K
X8
X8
X8
X8
DQ8-DQ15
• CMOS and TTL Compatible Inputs and Outputs
W1\
512K
• Commercial and Industrial Temperature Range
X8
512K
X8
512K
X8
512K
X8
DQ16-DQ23
• Package
W2\
• 80 Pin SIMM (JEDEC)
512K
512K
512K
X8
X8
X8
512K
X8
DQ24-DQ31
W3\
Sept. 2002 Rev. 4A
ECO #15528
1
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
EDI7F33512C
CAPACITANCE
(f=1.0MHz, VIN = VCC or VSS)
Parameter
Address Lines
Data lines
Chip & Write
Enable Lines
Output Enable lines
Sym
CA
CDQ
CC
512K
Max
35
15
15
2x512K
Max
70
30
30
4x512K
Max
140
60
60
Units
pF
pF
pF
CG
35
70
140
pF
PIN CONFIGURATIONS
Pin
#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
VSS
VCC
NC
G\
W0\
W1\
NC
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
Pin
#
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin
Name
*
*
*
*
VSS
DQ29
DQ30
DQ31
W2\
NC
NC
NC
NC
A18
A17
A16
A15
A14
A13
A12
Pin
#
41
42
43
44
45
461
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Pin
Name
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
AO
W3\
VSS
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
Pin
#
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Simm Density
Pin
2Mb
21
NC
22
NC
23
NC
24
E0\
Pin
Name
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC
VCC
PD1
PD2
PD3
PD4
PD5
PD6
PD7
VSS
Presence Detect Pin Out
Pin
512K 2x512K
PD1
VSS
NC
PD2
VSS
NC
PD3
VSS
NC
PD4
NC
VSS
A0-A18
E0\-E3\
W0\-W3\
G\
DQ0-DQ31
PD
VCC
VSS
NC
*TBD
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
4Mb
NC
NC
E1\
E0\
2
8Mb
E3\
E2\
E1\
E0\
4x512K
VSS
NC
NC
VSS
Address input
Chip Enable
Write Enable
Output Enable
Data Input/Output
Presence Detect
Power 5V±10%
Ground
No Connect
Sept. 2002 Rev. 4A
ECO #15528
EDI7F33512C
ORDERING INFORMATION
Part Number
EDI7F33512C80BNC
EDI7F33512C90BNC
EDI7F33512C100BNC
EDI7F33512C120BNC
EDI7F33512C150BNC
Speed
(ns)
80
90
100
120
150
Package
366
366
366
366
366
4.655 MAX.
4.384
0.705
MAX.
0.250
R4
P1
0.050 TYP. 0.250
4.150
2.245
0.062 R
Part Number
EDI7F233512C80BNC
EDI7F233512C90BNC
EDI7F233512C100BNC
EDI7F233512C120BNC
EDI7F233512C150BNC
0.120
MAX.
Speed
(ns)
80
90
100
120
150
0.400
0.062 R
0.125
MIN.
2.192
Package
367
367
367
367
367
4.655 MAX.
4.384
0.170
MAX.
0.125 DIA (2x)
R1 R3
REV. #
0.250
R2 R4
0.400
P1
0.050
TYP.
0.250
2.245
0.705
MAX.
4.150
2.192
0.125
MIN.
0.062 R(2X)
Part Number
EDI7F433512C80BNC
EDI7F433512C90BNC
EDI7F433512C100BNC
EDI7F433512C120BNC
EDI7F433512C150BNC
Speed
(ns)
80
90
100
120
150
Package
368
368
368
368
368
4.655 MAX.
4.384
0.200
MAX.
J1
J2
J3
1.135
J4
0.250
J5
J6
J7
0.050 TYP.
0.062 R.
0.400
P1
0.250
0.062 R. (2x)
0.125 DIA (2x)
4.150
2.192
2.245
0.125
MIN.
ALL DIMENSIONS ARE IN INCHES
Sept. 2002 Rev. 4A
ECO #15528
3
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
DATASHEET APPROVALS
EDI PART NO.
APPROVAL:
JUAN GUZMAN
MUKESH TRIVEDI
ECO# 15528
NEW REV 4A
EDI7F33512C
INITIAL
DATE
DATE 9/24/02
CORRECTION ON PAGES
9/25/02
L.K.
9/26/02
M.A.
PAUL MARIEN
9/27/02
LARRY WINROTH
DAVE KELLY
MARK DOWNEY
DAVE HARRISON
TONY LEE
BOB KHEDERIAN
LUIS ESTELLA
YES
NO
WILL THIS DATASHEET GO ON THE WEB?
IS THIS A NEW DATASHEET?
WILL THIS DATASHEET REPLACE AN EXISTING
DATASHEET THAT’S ALREADY ON THE WEB?
LINE:________
FAMILY:____________
PROD.TYPE:________
ORG:___________
DENSITY:________
SPEED:__________
PKG:____________
VOLTAGE:________
IF YES, WHAT DATASHEET IS IT REPLACING?
WHAT SECTION SHOULD THIS DATASHEET BE
PLACED IN ON THE WEB?
AFTER REVIEWING OR MAKING CORRECTIONS ON THE DATASHEET (S)
PLEASE SIGN-OFF ON THIS SHEET AND ,MAKE YOUR CORRECTIONS –ON
THE ORIGINAL COPY(S).
AFTER REVIEWING THE DATA SHEET, TEST ENGINEERING WILL COMPLETE THE SECTION BELOW.
TEST PROGRAM CHANGE REQUIRED:
YES:_________NO____________DATE:___________
TEST ENGINEER SIGNATURE___________________
IF YES, DO NOT RELEASE DATA SHEET UNTIL TEST PROGRAM CHANGE IS COMPLETED.
TEST PROGRAM CHANGE COMPLETION DATE:__________
TEST PROGRAM NAME AND REVISION_________________
TEST ENGINEER SIGNATURE__________________________
FO-00342R1.DOC
ECO# 14942
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