1/4 Structure Silicon Monolithic Integrated Circuit Product series White LED driver for TFT back light Type BD８１１３EFV Function ・Integrated buck-boost current-mode DC/DC controller Built-in OSC (external R), External synchronous mode ・Two integrated LED current driver channel ・Built-in under-voltage lock out circuit (UVLO) （Set by a standard external R current.） ・Built-in over-voltage protection circuit (OVP) ・PWM light modulation ・Built-in thermal shut down circuit (TSD) ・FAIL output（self-diagnosis function） ・Built-in over-current protection circuit (OCP) ・Built-in short detection circuit (SCP) ・Built-in LED open short detection circuit ・Oscillation frequency accuracy ±5% ●Absolute maximum ratings （Ta=25℃） Parameter Power supply voltage BOOT terminal voltage SW,CS,OUTH terminal voltage Between BOOT-SW terminal voltage LED1～2 output voltage VREG,OVP,OUTL,FAIL1,FAIL2,LEDEN, ISET,VDAC,PWM,SS,COMP,RT,SYNC,EN terminal voltage Power dissipation Operating temperature range Storage temperature range LED maximum output current ※1 Symbol VCC VBOOT Vsw,VCS,VOUTH VBOOT-SW VLED1～2 Limits 36 41 36 7 36 Unit V V V V V VVREG,VOVP,VOUTL,VFAIL1, VFAIL2,VLEDEN, VISET,VVDAC,VPWM,VSS,VCOMP,VRT,VSYNC,VEN -0.3～7 < VCC V Pd Topr Tstg ILED 1.10 ※1 -40～+105 -55～+150 150 ※2※3 W ℃ ℃ mA IC mounted on glass epoxy board measuring 70mm×70mm×1.6mm, power dissipated at a rate of 8.8mw/℃ at temperatures above 25℃. ※2 Dispersion figures for LED maximum output current and VF are correlated. Please refer to data on separate sheet. ※3 Amount of current per channel. ●Operating conditions (Ta=25℃) Parameter Symbol Target value Unit Power supply voltage VCC 5.0～30 V Oscillation frequency range ｆOSC 250～600 kHz External synchronization frequency range ※4 ※５ ｆSYNC fosc～600 kHz External synchronization pulse duty range ｆSDUTY 40～60 % ※4 Connect SYNC to GND or OPEN when not using external frequency synchronization. ※5 Do not switch between internal and external synchronization when an external synchronization signal is input to the device. REV. E 2/4 ●Electrical characteristics（Unless otherwise noted Parameter Symbol VCC=12V,Ta=25℃） Min Target value Typ Max Unit Conditions EN=Hi, SYNC=Hi, RT=OPEN PWM=Low, ISET=OPEN, CIN=10μF EN=Low Circuit current ICC - 7 14 mA Standby current [VREG Block] Reference voltage [OUTH Block] OUTH high-side ON resistance OUTH low-side ON resistance Over-current protection operating voltage [OUTL Block] OUTL high-side ON resistance OUTL low-side ON resistance [SW Block] SW low-side ON resistance [Error amplifier Block] LED voltage COMP sink current COMP source current [Oscillating Block] Oscillating frequency [OVP Block] Over-voltage detection reference voltage OVP hysteresis width SCP Latch OFF delay time [UVLO Block] UVLO voltage UVLO hysteresis width [LED Output Block] IST - 4 8 μA VREG 4.5 5.0 5.5 V IREG=-5mA，CREG=2.2μF RONHH RONHL 1.5 1.0 3.5 2.5 7 5.0 Ω Ω ION=-10mA ION=10mA VOLIMIT VCC-0.66 VCC-0.6 VCC-0.54 V RONLH RONLL 2.0 1.0 4.0 2.5 8.0 5.0 Ω Ω ION=-10mA ION=10mA Ron_sw 2.0 4.5 9.0 Ω ION_sw=10mA VLED ICOMPSINK ICOMPSOURCE 0.9 15 -35 1.0 25 -25 1.1 35 -15 V μA μA VLED=2V, Vcomp=1V VLED=0V, Vcomp=1V fOSC 285 300 315 KHz RT=100kΩ VOVP 1.9 2.0 2.1 V VOHYS TSCP 0.45 70 0.55 100 0.65 130 V ms VOVP= Sweep down RT=100kΩ VUVLO VUHYS 3.7 400 4.0 500 4.3 600 V mV VCC : Sweep down VCC : Sweep up LED current relative dispersion width △ILED1 -3 - +3 % LED current absolute dispersion width △ILED2 -5 - +5 % ISET voltage PWM minimum pulse width PWM maximum duty PWM frequency VISET Tmin Dmax fPWM 1.96 25 - 2.0 - 2.04 100 20 V us % KHz VDAC gain GVDAC - 25 - mA/V LED open detection voltage LED short detection voltage LED short latch OFF delay time PWM latch OFF delay time [Logic Inputs（EN,SYNC,PWM,LEDEN）] Input High voltage Input Low voltage Input current 1 Input current 2 [FAIL Output（open drain）] FAIL Low voltage VOPEN VSHORT TSHORT TPWM 0.2 4.2 70 70 0.3 4.5 100 100 0.4 4.8 130 130 V V ms ms ILED=50mA, ΔILED1=( ILED/ ILED_AVG-1)×100 ILED=50mA, ΔILED2=( ILED/ 50mA-1)×100 RISET=120kΩ FPWM=150Hz，ILED=50mA FPWM=150Hz，ILED=50mA Duty=50%，ILED=50mA VDAC=0～2V ILED=VDAC÷RISET×Gain, RISET=120kΩ VLED= Sweep down VLED= Sweep up RT=100kΩ RT=100kΩ VINH VINL IIN IEN 2.1 GND 20 15 35 25 5.5 0.8 50 35 V V μA μA VIN=5V (SYNC,PWM,LEDEN) VEN=5V (EN) VOL - 0.1 0.2 V ◎ This product is not designed for use in radioactive environments. REV. E VOVP=Sweep up IOL=0.1mA 3/4 ●Block diagram ●Package outlines C OUT VREG Vin C IN UVLO VCC OVP TSD Product number OVP VREG EN OCP + - Timer Latch PWM CS FAIL1 BOOT Con trol Logic OUTH DRV BD8113EF SW CTL - PWM SYNC SLOPE + DGND OSC RT VREG RT OUTL ERR AMP GND - COMP - R PC + OCP OVP LED1 C PC SS LED2 SS C SS Lot No. Current driver PWM ISET VDAC PGND Open Short Detect ISET Open Det R ISET Timer Latch Short Det FAIL2 LEDEN ●Pin layout BD8113EFV（HTSSOP-B24） ●Pin function table COMP 1 24 VREG SS 2 23 BOOT Pin Symbol 1 COMP 2 SS 3 VCC Function ERR amplifier output Soft start time-setting capacitance input Input power supply VCC 3 22 CS EN 4 21 OUTH RT 5 20 SW SYNC 6 19 DGND 7 GND Small-signal GND GND 7 18 OUTL 8 PWM PWM light modulation input Failure signal output 4 EN Enable input 5 RT Oscillation frequency-setting resistance input 6 SYNC External synchronization signal input PWM 8 17 PGND 9 FAIL1 FAIL1 9 16 ISET 10 FAIL2 LED open/short detection signal output FAIL2 10 15 VDAC 11 LEDEN LED output enable pin LEDEN 11 14 OVP 12 LED1 LED output 1 LED1 12 13 LED2 13 LED2 LED output 2 14 OVP 15 VDAC 16 ISET 17 PGND Over-voltage detection input DC variable light modulation input LED output current-setting resistance input LED output GND 18 OUTL Low-side external MOSFET Gate Drive 19 DGND Low-side internal MOSFET Driver Source 20 SW 21 OUTH 22 CS 23 BOOT High-side MOSFET Power Supply pin 24 VREG Internal reference voltage output REV. E High-side external MOSFET Source High-side external MOSFET Gate Drive DC/DC Current Sense Pin 4/4 ●Cautions on use 1．Absolute maximum ratings We are careful enough for quality control about this IC. So, there is no problem under normal operation, excluding that it exceeds the absolute maximum ratings. However, this IC might be destroyed when the absolute maximum ratings, such as impressed voltages or the operating temperature range(Topr), is exceeded, and whether the destruction is short circuit mode or open circuit mode cannot be specified. Please take into consideration the physical countermeasures for safety, such as fusing, if a particular mode that exceeds the absolute maximum rating is assumed. 2．Reverse polarity connection Connecting the power line to the IC in reverse polarity (from that recommended) will damage the part. Please utilize the direction protection device as a diode in the supply line. 3．Power supply line Due to return of regenerative current by reverse electromotive force, using electrolytic and ceramic suppress filter capacitors (0.1μF) close to the IC power input terminals (Vcc and GND) are recommended. Please note the electrolytic capacitor value decreases at lower temperatures and examine to dispense physical measures for safety. And, for ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, width of power wiring, GND wiring, and routing of wiring. Please make the power supply lines (where large current flow) wide enough to reduce the resistance of the power supply patterns, because the resistance of power supply pattern might influence the usual operation. 4．GND line The ground line is where the lowest potential and transient voltages are connected to the IC. 5．Thermal design Do not exceed the power dissipation (Pd) of the package specification rating under actual operation, and please design enough temperature margins. 6．Short circuit mode between terminals and wrong mounting Do not mount the IC in the wrong direction and be careful about the reverse-connection of the power connector. Moreover, this IC might be destroyed when the dust short the terminals between them or power supply, GND. 7．Radiation Strong electromagnetic radiation can cause operation failures. 8．ASO(Area of Safety Operation.) Do not exceed the maximum ASO and the absolute maximum ratings of the output driver． 9．TSD(Thermal shut-down) The TSD is activated when the junction temperature (Tj) reaches 175℃(with 25℃ hysteresis), and the output terminal is switched to Hi-z. The TSD circuit aims to intercept IC from high temperature. The guarantee and protection of IC are not purpose. Therefore, please do not use this IC after TSD circuit operates, nor use it for assumption that operates the TSD circuit. 10．Inspection by the set circuit board The stress might hang to IC by connecting the capacitor to the terminal with low impedance. Then, please discharge electricity in each and all process. Moreover, in the inspection process, please turn off the power before mounting the IC, and turn on after mounting the IC. In addition, please take into consideration the countermeasures for electrostatic damage, such as giving the earth in assembly process, transportation or preservation. 11．IC terminal input This IC is a monolithic IC, and has P+ isolation and P substrate for the element separation. Therefore, a parasitic PN junction is firmed in this P-layer and N-layer of each element. For instance, the resistor or the transistor is connected to the terminal as shown in the figure below. When the GND voltage potential is greater than the voltage potential at Terminals A or B, the PN junction operates as a parasitic diode. In addition, the parasitic NPN transistor is formed in said parasitic diode and the N layer of surrounding elements close to said parasitic diode. These parasitic elements are formed in the IC because of the voltage relation. The parasitic element operating causes the wrong operation and destruction. Therefore, please be careful so as not to operate the parasitic elements by impressing to input terminals lower voltage than GND(P substrate). Please do not apply the voltage to the input terminal when the power-supply voltage is not impressed. Moreover, please impress each input terminal lower than the power-supply voltage or equal to the specified range in the guaranteed voltage when the power-supply voltage is impressing. Simplified structure of IC 12．Earth wiring pattern Use separate ground lines for control signals and high current power driver outputs. Because these high current outputs that flows to the wire impedance changes the GND voltage for control signal. Therefore, each ground terminal of IC must be connected at the one point on the set circuit board. As for GND of external parts, it is similar to the above-mentioned. REV. E Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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