Anpec APW3007 Advanced dual pwm and dual linear power controller Datasheet

APW3007
Advanced Dual PWM and Dual Linear Power Controller
Features
General Description
•
The APW3007 provides the power control and protection for four output voltage in high-performance microprocessor and computer applications.
The APW3007 is designed to provide termination
voltage VTT(1.25V) with ±1% accuracy.
It integrates two PWM controllers , a linear regulator
and a liear controller as well as the monitoring and
protection function into a single package. One PWM
controller regulates the microprocessor core voltage
with a synchronous-rectified buck converter , while the
second PWM controller supplies the I/O 3.3V power
with a standard buck converter. The linear controller
regulates power for GTL bus and the intermal 200mA
regulator for clock driver circuits.
The APW3007 can provide in excess of 14A of output current for an on-board DC/DC converter via internal reference voltage. It can monitor all the output
voltage , and a single Power Good signal is issued
when the core is within 10% of the internal reference
voltage and the other levels are above their undervoltage levels. Additional built-in over-voltage protection for the core output uses the lower MOSFET to
prevent output voltage above 115% of the reference
voltage. The PWM controller’s over-current function
monitor the output current by sensing the voltage drop
across the upper MOSFET’s RDS(ON) , eliminating the
need for a current sensing resistor.
Provides 4 Regulated Voltages
− Microprocessor Core , I/O , Clock Chip and
GTL Bus
•
Simple Single-Loop Control Design
− Voltage-Mode PWM Control
•
Fast Transient Response
− High-Bandwidth Error Amplifier
− Full 0% to 100% Duty Ratio
•
Excellent Output Voltage Regulation
− Core PWM Output : ±1% Over Temperature
− I/O PWM Output : ±2% Over Temperature
− Other Output : ±2.5% Over Temperature
•
•
Power-Good Output Voltage Monitor
Microprocessor Core Voltage Protection Against
Shorted MOSFET
• Over-Voltage and Over-Current Fault Monitors
• Small Converter Size
− Constant Frequency Operation
− 200kHz Free-Running Oscillator ;
Programmagle from 50kHz to 800kHz
Applications
•
•
•
•
Motherboard Power Regulation for Computers
Low-Voltage Distributed Power Supplies
VGA Card Power Regulation
Termination Voltage
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain
the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
1
www.anpec.com.tw
APW3007
Pin Description
UGATE2
1
28
V12
UGATE2
1
28
V12
PHASE2
2
27
UGATE1
PHASE2
2
27
UGATE1
NC
3
26
PHASE1
NC
3
26
PHASE1
NC
4
25
LG ATE1
NC
4
25
LG ATE1
NC
5
24
PGND
NC
5
24
PGND
NC
6
23
OCSET1
NC
6
23
OCSET1
NC
7
22
VSEN1
NC
7
22
VSEN1
PGOO D
8
21
FB1
PGOO D
8
21
FB1
OCSET2
9
20
NC
OCSET2
9
20
NC
FB2
10
19
FB3
FB2
10
19
FB3
V5
11
18
GATE3
V5
11
18
GATE3
SS
12
17
GND
SS
12
17
GND
FAULT
13
16
NC
FAULT
13
16
Vout4
NC
14
15
VSEN2
FB4
14
15
VSEN2
APW3007-12
APW3007-13
Ordering and Marking Information
V o lta g e C o d e
1 2 : 1 .2 5 V
Package Code
K : SO P - 28
Tem p. R ange
C : 0 to 7 0 C
H a n d lin g C o d e
TU : T ube
A PW 3007
H a n d lin g C o d e
Tem p. R ange
Package Code
1 3 : 1 .3 0 V
T R : Tape & R eel
V o lta g e C o d e
AP W 3007 K :
AP W 3007
XXXXX
X X X X X - D a te C o d e
Absolute Maximum Ratings
Symbol
V12
VI , VO
Parameter
Supply Voltage
Input , Output or I/O Voltage
Rating
15
Unit
V
GND -0.3 V to V12 +0.3
V
0 to 70
°C
TA
Operating Ambient Temperature Range
TJ
Junction Temperature Range
0 to 125
°C
TSTG
Storage Temperature Range
-65 to +150
°C
300 ,10 seconds
°C
TS
Soldering Temperature
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
2
www.anpec.com.tw
APW3007
Block Diagram
VSEN1
OCSET1
V12
V5
FB4
V O UT 4
0.3V
FB3
LU V
PO W ER-O N
RE SET
110%
GATE3
PGOOD
1.26V
0.3V
90%
OCSET2
200uA
115%
VC C
UGATE2
THER M AL
PR OTE CTION
DRIVE 2
200uA
O C2
VC C
PHASE2
G ATE
CO NTRO L
INHIB IT
0V
FAULT SO FT-START
AN D FAULT
LO G IC
PW M 2
DR IV E1
UGATE1
O C1
PHASE1
INHIB IT
FB2
2.0V
G ATE
CO NTRO L
ER RO R
AM P2
ER RO R
AM P1
PW M 1
VC C
LGATE1
VSEN2
LO W ER
DR IV E
PGND
3.3K
V REF
OS CILLATO R
2.5V
GND
4.3V
4.6V
FAULT
SS FB1
Thermal Characteristics
Symbol
R θJA
Parameter
Thermal Resistance in Free Air
SOIC
SOIC (with 3in2 of Copper)
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
3
Value
Unit
75
65
°C/W
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APW3007
Electrical Characteristics
(Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System
Diagrams , and Typical Application Schematic.
Symbol
Parameter
Test Conditions
APW3007
Min
Typ
Max
Unit
Supply UVLO Section
UVLO Threshold-12V
Supply ramping up
UVLO Hysterises-12V
UVLO Threshold-5V
Supply ramping up
UVLO Hysterises-5V
9.5
V
0.5
V
4.3
V
0.3
V
Supply Current
I12
I5
Nominal Supply Current
V12
6
V5
2
mA
Oscillator
FOCS
∆VOSC
Free Running Frequency
RT= Open
Ramp Amplitude
RT= Open
Switching Controller Reference Voltage
VREF
Reference Voltage
APW3007-12
APW3007-13
Reference Voltage accuracy
185
200
VP-P
1.25
1.30
V
+1.0
2
VFB2 Voltage Accuracy
kHz
1.9
−1.0
VFB2 Output Voltage
215
-2
%
V
+2
%
2.5V Regulator (Vout4)
Vo4
Reference Voltage
TA=25 , Vout4=FB4
1.26
Dropout Voltage
Io=200mA
0.6
V
Load Regulation
1mA<Io<200mA
0.5
%
Line Regulation
3.1V<VIO<4V , Vo=2.5V
0.2
%
Input bias Current
V
2
Output Current
200
Current Limit
300
Thermal Shutdown
µA
mA
420
mA
150
°C
1.26
V
1.5V Regulator (Vout3)
Vo3
Reference Voltage
TA=25 , GATE=FB3
Reference Voltage Accaracy
-2.5
Input bias current
Output Drive Current
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
50
4
+2.5
%
2
µA
mA
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APW3007
Electrical Characteristics Cont.
Symbol
Parameter
Test Conditions
APW3007
Min
Typ
Max
Unit
Synchronous PWM Controller Error Amplifier
DC Gain
GBWP Gain-Bandwidth Product
SR
Slew Rate
COMP1 = 10pF
88
dB
15
MHz
6
V/µS
1
A
PWM Controller Gate Drive
IUGATE
UGATE Source
RUGATE UGATE Sink
ILGATE
LGATE Source
RLGATE LGATE Sink
V12 = 12V , VUGATE = 6V
VUGATE-PHASE =1V
V12 = 12V , VLGATE = 1V
3.5
Ω
3
Ω
1
VLGATE = 1V
A
Protection
VSEN1 O.V. Upper trip point
VSEN1 ramping up
117
%
VSEN1 O.V. lower trip point
VSEN1 ramping down
115
%
IOVP
FAULT Souring Current
VFAULT/RT=2.0V
8.5
mA
IOCSET
OCSET Current Source
VOCSET=4.5VDC
Pull up resistor to 5V
OCSET=0V , Phase=5V
23
KΩ
VSEN1 Upper Threshold
VSEN1 Rising
110
%
VSEN1 Under Voltage
VSEN1 Rising
94
%
RSS
170
200
230
µA
Power Good
2
%
VPGOOD-L PGOOD Voltage Low
VSEN1 Hysteresis
RL = 3mA
0.4
V
VPGOOD-H PGOOD Voltage High
RL = 5kΩ Pull up to 5V
4.8
V
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
Upper /Lower Threshold
5
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APW3007
Functional Pin Description
UGATE2 (Pin1)
V5 (Pin11)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the regulator’s pass transistor .
5V supply voltage. A high frequency capacitor (0.1
to 1uF) must be placed close to this pin and connected from this pin to the GND plane for noise free
operation.
PHASE1 , PHASE2 (Pin26 and 2)
SS (Pin12)
Connect the PHASE pins to the respective PWM
converter’s upper MOSFET source. These pins are
used to monitor the voltage drop across the upper
MOSFETs for over-current protection .
This pin provides the soft start for the 2 switching
regulators. An internal resistor charges an external
capacitor that is connected from 5V supply to this pin
which ramps up the outputs of the switching regulators , preventing the outputs from overshooting as well
as limiting the input current. The second function of
the Soft Start cap is to provides long off time for the
synchronoud MOSFET during current limiting .
NC (Pin 3,4,5,6,7,20)
No connection.
PGOOD (Pin8)
FAULT (Pin13)
PGOOD is an open collector output used to indicate
the status of the output voltages. This pin is pulled
low when the synchronous regulator output is not within
±10% of the DACOUT reference voltage or when any
of the other outputs are below their under-voltage
thresholds .
This pin has dual function. It acts as an output of the
OVP cicuitry or it can be used to program the frequency using an extermal resistor. When used as a
fault detector , if any of the switcher outputs exceed
the OVP trip point , the FAULT pin switches to 12V
and the soft start cap is discharged. If the FAULT pin
is to be connected to any external circuity , it needs
to be buffered as shown in the application circuit .
OCSET1 , OCSET2 (Pin23 and Pin9)
Connect a resistor (ROCSET) from this pin to the drain of
the respective upper MOSFET. ROCSET , an internal
200µA current source (I OCSET) , and the upper
MOSFET’s on-resistance (rDS(ON)) set the converter
over-current (OC) trip point according to the following
equation :
IPEAK=
FB4 (Pin14)
APW3007-12 : NC
This pin provides the feedback for the internal LDO
regular that its ourpur is Vout4.
I OCSET x R OCSET
r DS(ON)
VSEN2 (Pin15)
This pin is connected to the output of the I/O switching regulator. It is an input that provides sensing for
the Under/Over voltage circuitry for the I/O supply as
well as the power for the internal LDO regulator .
FB2 (Pin10)
This pin provides the feedback for the non-synchronous switching regulator. A resistor driver is connected from this pin to vout2 and GND that sets the
output voltage. The value of the resistor connected
from Vout2 to FB2 must be less than 100Ω .
VOUT4 (Pin16)
APW3007-12 : NC
This pin is the output of the internal LDO regulator.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
6
www.anpec.com.tw
APW3007
Functional Pin Description (Cont.)
GND (Pin 17)
VSEN1 (Pin 22).
Signal ground for the IC. All voltage levels are
measured with respect to this pin.
This pin is connected to the PWM converter’s output
voltage . The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for
over-voltage protection .
GATE3 (Pin 18)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the 1.5V regulator’s
pass transistor.
PGND (Pin 24)
This is the power ground connection . Tie the synchronous PWM converter’s lower MOSFET source
to this pin .
FB3 (Pin 19)
Connect this pin to the output of the 1.5V linear
regulator. This pin is monitored for under-voltage
events.
LGATE (Pin 25)
Connect LGATE to the PWM converter’s lower
MOSFET gate . This pin provides the gate drive for
the lower MOSFET .
FB1 (Pin21)
This pin provides the feedback for the synchronous
switching regulator . Typically this pin can be connected directly to the output of the switching regulator . However , a resistor driver is recommended to
be connected from this pin to vout1 and GND to adjust the output voltage for any drop in the output voltage that is caused by the trace resistance . The value
of the resistor connected from Vou1 to FB1 must be
less than 100Ω .
UGATE (Pin 27)
Connect UGATE pin to the PWM converter’s upper
MOSFET gate . This pin provides the gate drive for
the upper MOSFET .
V12 (Pin28)
Provide a 12V bias supply for the IC to this pin . This
pin also provides the gate bias charge for all the
MOSFETs controlled by the IC . The voltage at this
pin is monitored for Power-On Reset purposes .
Simplified Power System Diagram
5V
3.3V
C IN
C IN
L1
PW M 2
C ontroller
N VVD D
L2
PW M 1
C ontroller
C OUT
VT T
C OUT
Linear
C ontroller
Linear
R egulator
3.3V
V OUT 4
FB VD DQ
C IN
C OUT
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
7
www.anpec.com.tw
APW3007
Typical Application Circuit
APW3007-12
C812
220pF
RX1
10R
12V
C809
220pF
L800
2uH
C807
330uF
C808
1000uF
L802
2uH
R817
1.2K
C801
1uF
5V
R812
1.5k
R819
5.1R
R813
5.1R
R820
5.1R
AGP
3.3V
C813
330uF
Q803A
APM7313
Q802
APM9410
L801
7.8uH
NVVDD
2.05V/4A
C810
330uF
R814
100RF
C811
330uF
D800
FM5820
5V
C805
1uF
R816
4.02KF
1
UGATE2
V12
28
2
PHASE2
UGATE1
27
3
NC
PHASE1
26
4
NC
LGATE1
25
5
NC
PGND
24
6
NC
OCSET1
23
7
NC
VSEN1
22
FB1
21
8
PGOOD
9
OCSET2
10
FB2
11
V5
12
SS
13
FAULT
14
NC
NC
20
FB3
19
GATE3
18
GND
17
NC
16
VSEN2
15
C814
10uF
L803
7.8uH
Q803B
APM7313
VTT
1.25V/3.5A
C815
330uF
C816
330uF
R821
100R
AGP
3.3V
Q800
APM3055
C802
330uF
R810
97.6RF
FBVDDQ
2.5V/1.5A
APW3007-12
C800
10uF
R811
100RF
C804
1uF
C817
330uF
APW3007-13
C812
220pF
RX1
10R
12V
C809
220pF
L800
2uH
C807
330uF
AGP
3.3V
C813
330uF
R819
5.1R
R812
1.5k
C808
1000uF
L802
2uH
R817
1.2K
C801
1uF
5V
Q 803A
A PM 7313
Q 802
A PM 9410
L801
7.8uH
R813
5.1R
NV V DD
2.05V /4 A
1
2
3
C810
330uF
R814
100RF
C811
330uF
4
D800
FM 5820
5
6
7
8
9
10
11
12
5V
C805
1uF
R816
4.02K F
13
14
U G ATE2
V12
PHASE2
U G ATE1
NC
PHASE1
NC
LG AT E1
NC
PG ND
NC
O C SET1
NC
VSEN1
PG O O D
F B1
O C SET 2
NC
F B2
F B3
V5
G AT E3
SS
G ND
F AU LT
Vout4
F B4
VSEN2
28
L803
7.8uH
Q 803B
A PM 7313
R820
5.1R
27
26
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
8
C816
330uF
C815
330uF
24
R821
100R
23
22
21
20
AGP
3.3V
19
18
Q 800
A PM 3055
17
16
R810
97.6RF
15
R811
100R F
C804
1uF
V TT
1.25V /3 .5A
25
C802
330uF
FB V DDQ
2.5V /1.5A
A PW 3007-13
C800
10uF
C814
10uF
C817
330uF
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APW3007
Package Information
SO – 300mil ( Reference JEDEC Registration MS-013)
D
N
GAU
PLA
E
1 2 3
A
A1
B
e
L
Millimeters
Variations- D
Inches
Variations- D
Dim
Min.
Max.
Variations
Min.
Max.
Dim
Min.
Max.
Variations
Min.
Max.
A
2.35
2.65
SO-16
10.10
10.50
A
0.093
0.1043
SO-16
0.398
0.413
A1
0.10
0.30
SO-18
11.35
11.76
A1
0.004
0.0120
SO-18
0.447
0.463
B
0.33
0.51
SO-20
12.60
13
B
0.013
0.020
SO-20
0.496
0.512
D
See variations
SO-24
15.20
15.60
D
See variations
SO-24
0.599
0.614
E
7.40
SO-28
17.70
18.11
E
SO-28
0.697
0.713
SO-14
8.80
9.20
e
SO-14
0.347
0.362
e
7.60
1.27BSC
0.2914
0.2992
0.050BSC
H
10
10.65
H
0.394
0.419
L
0.40
1.27
L
0.016
0.050
N
See variations
N
See variations
0°
φ1
φ1
8°
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
9
0°
8°
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APW3007
Physical Specifications
Terminal Material
Lead Solderability
Packaging
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb)
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
1000 devices per reel
Refolw Condition (IR/ Convection or VPR Reflow)
temperature
Reference JEDEC Standard J-STD-020A APRIL 1999
Peak temperature
183°C
Pre-heat temperature
Time
Classification Reflow Profiles
Average ramp-up rate(183°C to Peak)
Preheat temperature 125 ± 25°C)
Temperature maintained above 183°C
Time within 5°C of actual peak
temperature
Peak temperature range
Ramp-down rate
Time 25°C to peak temperature
Convection or IR/ Convection
VPR
3°C/second max.
10 °C /second max.
120 seconds max.
60 ~ 150 seconds
10 ~ 20 seconds
60 seconds
220 +5/-0°C or 235 +5/-0°C
6 °C /second max.
6 minutes max.
215~ 219°C or 235 +5/-0°C
10 °C /second max.
Package Reflow Conditions
pkg. thickness ≥ 2.5mm
and all bags
Convection 220 +5/-0 °C
VPR 215-219 °C
IR/Convection 220 +5/-0 °C
pkg. thickness < 2.5mm and
pkg. volume ≥ 350 mm³
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
10
pkg. thickness < 2.5mm and pkg.
volume < 350mm³
Convection 235 +5/-0 °C
VPR 235 +5/-0 °C
IR/Convection 235 +5/-0 °C
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APW3007
Reliability test program
Test item
Method
Description
SOLDERABILITY
MIL-STD-883D-2003
245°C , 5 SEC
HOLT
MIL-STD-883D-1005.7
1000 Hrs Bias @ 125 °C
PCT
JESD-22-B, A102
168 Hrs, 100 % RH , 121°C
TST
MIL-STD-883D-1011.9
-65°C ~ 150°C, 200 Cycles
ESD
MIL-STD-883D-3015.7
VHBM > 2KV, VMM > 200V
Latch-Up
JESD 78
10ms , Itr > 100mA
Tape & Reel Dimensions
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Application
SOP- 28
A
B
330±1
62 ±1.5
F
D
11.5 ± 0.1
1.5 +0.1
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
C
12.75 ± 0.
5
D1
J
T1
T2
W
P
E
2 ± 0.6
24.4 ± 0.2
2± 0.2
24 ± 0.3
12 ± 0.1
1.75± 0.1
Po
P1
Ao
Bo
Ko
t
1.5+ 0.25 4.0 ± 0.1
11
2.0 ± 0.1 10.85 ± 0.1 18.34± 0.1 2.97± 0.1 0.35±0.01
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APW3007
Cover Tape Dimensions
Application
SOP- 28
Carrier Width
24
Cover Tape Width
21.3
Devices Per Reel
1000
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Jun., 2003
12
www.anpec.com.tw
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