Rohm BD9422EFV White led driver for large lcd panel Datasheet

Datasheet
LED Drivers for LCD Backlights
White LED Driver for large LCD
panel
BD9422EFV
●Features
■ 6ch Constant LED drivers, available 400mA drive
●General Description
BD9422EFV is a high efficiency driver for white LEDs
and designed for large LCD panel. This IC is built-in
high current drive and high responsibility type 6ch LED
drivers and 1ch boost DCDC converter. BD9422EFV
has some protect function against fault conditions,
such as the over-voltage protection (OVP), LED OPEN
and SHORT protection, the over current limit
protection of DCDC (OCP). Therefore BD9422EFV is
available for the fail-safe design over a wide range
output voltage.
per 1ch.
Constant current accuracy ±1.8% (IC only)
Each 6ch external PWM inputs can control independent
dimming .
■ Current analog (linear) dimming by VREF
■ 1ch boost controller with current mode (external FET)
■ Several protection functions
■
■
DCDC part
: OCP/OVP/UVLO/TSD
LED driver part :OPEN,SHORT detection
■
SHORT detection voltage is set by LSP terminal.
Error detection output FAIL terminal inside
(normal=Open, error=Drain)
■ Master/Slave mode inside
●Key Specification
 Operating power supply voltage range: 9.0V to 35.0V
 Oscillator frequency:
500kHz (RT=30kΩ)
 Operating Current:
9mA (typ.)
 Operating temperature range:
-40°C to +85°C
●Package
●Applications
TV, Computer Display, Notebook, LCD Backlighting
HTSSOP-B40
Pin Pitch:
W(Typ.) D(Typ.) H(Max.)
13.60mm x 7.80mm x 1.00mm
0.65mm
●Typical Application Circuit
Figure 2. HTSSOP-B40
Figure 1. Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit
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Datasheet
BD9422EFV
●Absolute maximum ratings (Ta=25°C)
Parameter
Operating Temperature Range
Storage Temperature Range
Power Dissipation
Thermal resistance between junction and case
Symbol
Ratings
Unit
Ta(opr)
-40 to +85
°C
Tstg
-55 to +150
°C
Pd
4.7 *1
W
θjc
7 *2
°C/W
Maximum Junction Temperature
Tjmax
150
°C
Maximum LED output current
ILED
400 *3 *4
mA
*1 In the case of mounting 4 layer glass epoxy base-plate of 70mm×70mm×1.6mm, 37.6mW is reduced at 1°C above Ta=25℃.
*2 In the case of mounting 4 layer glass epoxy base-plate of 70mm×70mm×1.6mm.
*3 Wide VF variation of LED increases loss at the driver, which results in rise in package temperature. Therefore, the board needs to be designed
with attention paid to heat radiation.
*4 This current value is per 1ch. It needs be used within a range not exceeding Pd.
●Operating Ratings (Ta = 25°C)
Parameter
Symbol
Range
Unit
Power supply voltage
VCC
9 to 35
V
DC/DC oscillation frequency
VREF input voltage
FCT
100 to 1250 *5
kHz
VREF
0.2 to 2.5
V
LSP terminal input voltage
VLSP
0.8 to 3
V
FB terminal output voltage
VFB
0 to 3.3
V
VM_DET
0 to REG9V
V
M_DET terminal output voltage
The operating conditions written above are constants of the IC unit. Be careful enough when setting the constant in the actual set.
●External Components Recommended Range
Item
VCC terminal connection capacitance
Soft-start set capacitance
Symbol
CVCC
SS
Setting Range
1.0 to 10
0.001 to 1.0
Unit
μF
μF
Timer latch set capacitance
CP
0.001 to 2.7
μF
Operating frequency set resistance
RT
12 to 150
kΩ
CREG9V
2.2 to 10
μF
REG9V terminal connection capacitance
The values described above are constants for a single IC.
●Pin Configuration
1
VCC
2
FAIL
REG9V
N.C.
N
PGND
CS
OVP
M_DET
SUMPWM
LED1
LED2
LED3
LED4
LED5
LED6
STB
PWM1
PWM2
PWM3
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Adequate attention must be paid to setting of a constant for an actual set of parts
●Physical Dimension Tape and Marking Diagram
AGND
UVLO
FAIL_MODE
LSP
LED_LV
VREF
RT
FB
SS
CP
S1
S2
S3
S4
S5
S6
FAIL_RST
PWM6
PWM5
PWM4
40
39
38
37
36
35
BD9422EFV
34
33
32
31
30
29
28
27
LOT No.
26
25
24
23
22
21
Figure 3.
Figure 4.
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BD9422EFV
●1.1 Electrical Characteristics 1(Unless otherwise specified, Ta=25°C，VCC=24V)
Parameter
Symbol
Limit
Min.
Typ.
Max.
Unit
Condition
【Whole device】
Operating circuit current
ICC
-
9
16
mA
STB=3V,LED1-6=ON,
RT=30kΩ
Stand-by circuit current
ISTB
-
12
20
μA
STB=0V
REG9V output voltage
REG9V
8.9
9.0
9.1
V
IO=0mA
Maximum REG9V output current
IREG9V
20
-
-
mA
N terminal source resistance
RONH
-
2.5
3.5
Ω
ION=-10mA
N terminal sink resistance
RONL
-
3.0
4.2
Ω
ION=10mA
VOCP
0.40
0.45
0.50
V
VCS=SWEEP UP
SS terminal source current
ISS
-1.4
-1.0
-0.6
μA
SS terminal release voltage
VSS
2.9
3.0
3.1
V
SS=SWEEP UP
VLED
0.66
0.7
0.74
V
LED_LV=0.7V
IFBSINK
55
100
155
μA
LED=2.0V, VFB=1.0V
FB source current (Master)
IFBSOURCEM
-155
-100
-55
μA
LED=0V, VFB=1.0V,CS=0V
FB source current (Slave)
IFBSWRCKS
-310
-200
-110
μA
LED=0V,VFB=1.0V,CS=5V
ILED_LV
-2
0
2
uA
VLED_LV=3V
FCT
440
500
560
kHz
RT=30kΩ
DMAX
83
89
96
%
OVP detection voltage
VOVP
2.34
2.43
2.52
V
OVP hysteresis voltage
VOVPHYS
10
50
100
mV
VOVP=SWEEP DOWN
OVP feedback voltage
FBOVP
0.93
1.05
1.17
V
PMW1-6=0V,SS=2.8V,
VLED_LV=0.7V
VSCP
0.12
0.20
0.28
V
VOVP=SWEEP DOWN
VFLED
1120
1340
1560
mV
VLED=0V
VFOFFSET
-
-
20
mV
VLED=0V
RM_DET
60
100
140
kΩ
【REG9V block】
【Switching block】
【Over current protection (OCP) block】
Over current protection voltage
【Soft-start block】
【Error amplifier block】
LED control voltage
FB sink current
LED_LV terminal input current
【CT oscillator block】
Oscillation frequency
MAX DUTY
【Over voltage protection (OVP) block】
VOVP=SWEEP UP
【Short current protection (SCP) block】
Short circuit protection voltage
【M_LED block】
Diode forward voltage
Forward voltage offset each ch
REG9V pull up resistance
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Datasheet
BD9422EFV
●1.2 Electrical Characteristics 2(Unless otherwise specified, Ta=25°C，VCC=24V)
Parameter
Symbol
Limit
Min.
Typ.
Max.
Unit
Condition
【UVLO block】
Operation power source voltage (VCC)
VUVLO_VCC
7.0
7.5
8.0
V
Hysteresis voltage (VCC)
VUHYS_VCC
150
300
600
mV
VCC=SWEEP DOWN
UVLO Release voltage
VUVLO_U
2.40
2.50
2.60
V
VUVLO=SWEEP UP
UVLO detection voltage
VUVLOD_U
2.15
2.30
2.45
V
VUVLO=SWEEP DOWN
RUVLO
395
610
825
kΩ
VUVLO=3V
CP detection voltage
VCP
1.9
2.0
2.1
V
CP=SWEEP UP
CP source current
ICP
-1.2
-1.0
-0.8
μA
VCP=0V
196
200
204
mV
VREF=1.0V
294.6
300
305.4
mV
VREF=1.5V
392.8
400
407.2
mV
VREF=2.0V
491
500
509
mV
VREF=2.5V
UVLO terminal input resistance
VCC=SWEEP UP
【Filter block】
【LED driver block】
S terminal voltage
VSLED
LED current rise time
ILEDtr
-
400
760
ns
VREF=0.3V,RS=2Ω
LED current fall time
ILEDtf
-
100
280
ns
VREF=0.3V,RS=2Ω
VOPEN
0.12
0.20
0.28
V
VLED=SWEEP DOWN
VSHORT
5.7
6.0
6.3
V
VLED=SWEEPUP,
VLSP=1.2V
VSHTMASK
2.85
3.0
3.15
V
IVREF
-2
0
2
μA
VVREF=3V
ILSP
-2
0
2
μA
VLSP=3V
STB terminal HIGH voltage
STBH
2.0
-
VCC
V
STB terminal LOW voltage
STBL
-0.3
-
0.8
V
STB terminal Pull Down resistance
RSTB
0.5
1.0
1.5
MΩ
PWM terminal HIGH voltage
PWMH
2.0
-
20
V
PWM terminal LOW voltage
PWML
-0.3
-
0.8
V
PWM terminal Pull Down resistance
RPWM
200
300
400
kΩ
Input terminal High voltage
VINH
2.0
-
20
V
Input terminal Low voltage
VINL
-0.3
-
0.8
V
Input terminal Pull Down resistance
RVIN
60
100
140
kΩ
VIN=3V
VOL
0.25
0.5
1.0
V
IOL=1mA
OPEN detection voltage
SHORT detection voltage
SHORT MASK voltage
VREF terminal input current
LSP terminal input current
【STB block】
STB=3V
【PWM IN block】
PWM=3V
【FAIL_MODE,FAIL_RST,SUMPWM block】
【FAIL block（OPEN DRAIN）】
FAIL LOW output voltage
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Datasheet
BD9422EFV
●1.3 Pin Descriptions
In/Out
rating
[V]
No
Pin name
Function
1
VCC
IN
Power source terminal
-0.3 to 36
2
FAIL
OUT
Abnormality detection output terminal (OPEN DRAIN)
-0.3 to 36
3
REG9V
OUT
9V regulator output terminal
-0.3 to 13
4
N.C.
-
5
N
OUT
6
PGND
IN
7
CS
IN
DC/DC FET output current detection terminal
-0.3 to 7
8
OVP
IN
Overvoltage protection detection terminal
-0.3 to 7
9
M_DET
OUT
LED Diode OR output terminal
-0.3 to 13
10
SUMPWM
IN/OUT
PWM signal enable/disable detection terminal
-0.3 to 7
11
LED1
OUT
LED output 1
-0.3 to 60
12
LED2
OUT
LED output 2
-0.3 to 60
13
LED3
OUT
LED output 3
-0.3 to 60
14
LED4
OUT
LED output 4
-0.3 to 60
15
LED5
OUT
LED output 5
-0.3 to 60
16
LED6
OUT
LED output 6
-0.3 to 60
17
STB
IN
Standby control terminal
-0.3 to 36
18
Non connection terminal
-
DC/DC switching output terminal
-0.3 to 13
Power GND terminal
-
PWM1
IN
PWM dimming input signal terminal for LED 1
-0.3 to 22
19
PWM2
IN
PWM dimming input signal terminal for LED 2
-0.3 to 22
20
PWM3
IN
PWM dimming input signal terminal for LED 3
-0.3 to 22
21
PWM4
IN
PWM dimming input signal terminal for LED 4
-0.3 to 22
22
PWM5
IN
PWM dimming input signal terminal for LED 5
-0.3 to 22
23
PWM6
IN
PWM dimming input signal terminal for LED 6
-0.3 to 22
24
FAIL_RST
IN
FAIL output reset terminal
-0.3 to 22
25
S6
IN
Connecting terminal for LED 6 constant current setting resistor
-0.3 to 7
26
S5
IN
Connecting terminal for LED 5 constant current setting resistor
-0.3 to 7
27
S4
IN
Connecting terminal for LED 4 constant current setting resistor
-0.3 to 7
28
S3
IN
Connecting terminal for LED 3 constant current setting resistor
-0.3 to 7
29
S2
IN
Connecting terminal for LED 2 constant current setting resistor
-0.3 to 7
30
S1
IN
Connecting terminal for LED 1 constant current setting resistor
-0.3 to 7
31
CP
OUT
Connecting terminal for non-reaction time setting capacitor
-0.3 to 7
32
SS
OUT
Connecting terminal for soft-start time setting capacitor
-0.3 to 7
33
FB
OUT
Error amplifier output terminal
-0.3 to 7
34
RT
OUT
Connecting terminal for DC/DC frequency setting resistor
-0.3 to 7
35
VREF
IN
Analog dimming DC voltage input terminal
-0.3 to 7
36
LED_LV
IN
LED control voltage set terminal
-0.3 to 7
37
LSP
IN
LED SHORT detection voltage setting terminal
-0.3 to 7
38
FAIL_MODE
IN
FAIL function change terminal
-0.3 to 7
39
UVLO
IN
Low voltage malfunction prevention detection terminal
40
AGND
IN
GND terminal for analog part
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-0.3 to 10.5
-
TSZ02201-0F1F0C100210-1-2
1.Sep.2015 Rev.006
Datasheet
BD9422EFV
●1.4.1 I/O equivalence circuit
REG9V / N / PGND / CS
SS
FB
FB
LED1 to LED6, S1 to S6
CP
UVLO
LED1-6
CP
S1-6
PWM1 to PWM6
VREF
PWM1-6
LSP,LED_LV
VREF
LSP
300k
OVP
RT
FAIL
FAIL
RT
500
SUMPWM
STB / FAIL_MODE / FAIL_RST
M_DET
Figure 5. I/O equivalence circuit
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BD9422EFV
●1.5Typical Performance Curves（reference data）
50
14
12
STB=0V
PWM1-6=0V
Ta=25°C
40
Istb [uA]
Icc [mA]
10
8
6
STB=3V
PWM1-6=0V
Ta=25°C
4
2
20
10
0
0
10
14
18
22
26
VCC [V]
Figure 6.
30
10
34
Circuit current
100
1000
80
800
60
600
40
VCC=24V
Ta=25°C
20
14
18
Figure 7.
S1 [mV]
Duty Cycle [%]
30
22
26
VCC [V]
30
34
Stand-by circuit current
VCC=24V
RS=2Ω
LED1=2.5V
Ta=25°C
400
200
0
0
0
1
2
FB [V]
Figure 8.
3
0
4
FB v.s. Duty Cycle
1
2
VREF [V]
Figure 9.
3
4
VREF v.s. Sx
ILED1 [mA]
60
30
VCC=24V
RS=20Ω
Ta=25°C
0
0
1
2
3
PWM1 [V]
Figure 10.
PWM terminal threshold voltage
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BD9422EFV
●2 Block Diagram
Figure 11. Block Diagram
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BD9422EFV
●3.1 Pin Configuration
1 pin. VCC
Power supply terminal of IC. The input range is 9 to 35V.
The operation starts over VCC＝7.5V(typ.) and the system stops under VCC=7.2V(typ.).
2 pin. FAIL
FAIL signal output terminal (NMOS open-drain). NMOS is OPEN at the normal operation so FAIL pin is Hi-Z. NMOS
becomes ON state (500 ohm typ.) at the abnormal detection. It is possible to select the FAIL type from latch type
(FAIL_MODE=L) or one shot pulse (FAIL_MODE=H).Please refer to the detail explanation＜38pin. FAIL_MODE terminal＞
4 pin. N.C
Non connect pin.
REG9V ‐VCC (Line Regulation)
10
9
8
7
REG9V [V]
3 pin. REG9V
REG9V is a 9 V output pin used delivering 20mA at
maximum for switching power supply of N terminal.
Use at a current higher than 20mA may affect the reference
voltage within IC, which may result in malfunction. It will also
cause heating of IC itself. Therefore it is recommended to set
the load as small as possible.
The characteristic of VCC line regulation at REG9V is shown
as figure. VCC must be used in more than 10.5V for stable
9V output.
Install an oscillation prevention ceramic capacitor (2.2 to 10μF)
nearest to VREG between VREG-AGND terminals.
6
5
4
3
2
1
0
‐1 0
5
10
15
20
25
30
35
VCC [V]
Figure 12.
Please set it the open state or deal with connecting the GND.
5 pin. N
Gate driving output pin of external NMOS of DC/DC converter with 0 to 9V (REG9V) swing. Output resistance of High side
is 2.5 ohm(typ.), Low side is 3.0 ohm(typ.) in ON state. The oscillation frequency is set by a resistance connected to RT pin.
For details, see the explanation of <34pin. RT terminal>.
6pin. PGND
Power GND terminal of output terminal, N driver:
7pin. CS
Inductor current detection resistor connecting terminal of DC/DC current mode: it transforms the current flowing through the
inductor into voltage by sense resistor RCS connected to CS terminal, and this voltage is compared with that set in the error
amplifier by current detection comparator to control DC/DC output voltage. RCS also performs over current protection
(OCP) and stops switching action when the voltage of CS terminal is 0.45 V (typ.) or higher (Pulse by Pulse).
8 pin. OVP
OVP terminal is the detection terminal of overvoltage protection (OVP) and short circuit protection (SCP) for DC/DC output
voltage. Depending on the setting of the FAIL_MODE terminal, FAIL and CP terminal behave differently when an
abnormality is detected. For details, see the table for each protection operation is described in ●3.2 and ●3.3.
During the soft start (SS), there is a function which returns the OVP voltage to error amplifier to boost DC/DC output voltage
at all Low PWM (OVPFB function). After completion of SS, this function is disabled.
9 pin. M_DET
The Di OR output terminal of LED 1 to 6. The output is the voltage which is added a diode forward voltage(two diode stack)
to the lowest voltage among 6 LED terminals.
10pin. SUMPWM
This is a judging terminal if high signal is input to PWM terminal or not. Using in Master/slave mode, one SUMPWM
terminal is connected to another. And if any PWM signal becomes high between master and slave, the SUMPWM terminal
becomes high, too. For details, please refer to ●3.4 Connecting operation of Master/ slave.
11 to 16pin. LED1 to LED6
LED constant current driver output terminal. Setting of LED current value is adjustable by setting the VREF voltage and
connecting a resistor to S terminal. For details, see the explanation of <25 to 30pin. S1 to S6, 35pin. VREF >.
The PWM dimming frequency of LED current driver and upper/lower limit of the duty need to be set in a manner that
necessary linearity of PWM dimming characteristics can be secured referring to the following figures:
。
Start/Stop time of constant current driver (PWM pulse response)
Start-up time depends on the VREF value; the response becomes quick, so that voltage is high.
In the way of reference, the current response upon application of current rise rate and pulse PWM1us (current pulse) to
describe the dependence of VREF. It needs to be adequately verified with an actual device because the response rate may
vary with application conditions.
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BD9422EFV
Pulse Response Width
800
700
600
500
400
300
200
100
0
Rseponse Width[nsec]
Rise Time[nsec]
Rise Time
MEASURE
IDEAL
0
0.5
1
1.5
2
2.5
1200
1000
800
600
400
200
0
MEASURE
IDEAL
0
0.5
1
VREF[V]
Figure 13.
1.5
VREF[V]
2
2.5
Figure 14.
17pin. STB
ON/OFF setting terminal for IC, which can be used perform a reset at shutdown.
* The voltage of STB input in the sequence of VCC → STB.
* Voltage input in STB terminal switches the state of IC (IC ON/OFF). Using the terminal between the 2 states (0.8 to 2.0 V)
needs to be avoided.
18 to 23pin. PWM1 to PWM6
ON/OFF terminal of LED driver: it inputs PWM dimming signal directly to PWM terminal and change of DUTY enables
dimming. High/Low level of PWM terminal is shown as follows:
State
PWM voltage
LED ON
PWM= 2.0 to 20V
LED OFF
PWM= -0.3 to 0.8V
24pin.FAIL_RST
Reset terminal of the protection circuit and FAIL terminal:
Return the latch stopped protection block by setting the FAIL_RST to High. During High state, operation is masked by the
latch system protection.
25 to 30pin. S1 to S6, 35pin. VREF
S terminal is a connecting terminal for LED constant current setting resistor, output current ILED is in an inverse relationship
to the resistance value.
VREF terminal is a terminal for analog dimming; output current ILED is in a proportional relationship to the voltage value to
be input.
VREF terminal is assumed that it is set by dividing the resistance with a high degree of accuracy, VREF terminal inside the
IC is in open state (High Impedance). It is necessary to input voltage to divide the resistance from the output of REG9V or
use external power source. Using the terminal in open state needs to be avoided.
The relationship among output current ILED, VREF input voltage, and RS resistance has the following equation:
ILED 
VREF [V]
 0.2[ A ]
RS[Ω]
The voltage of S terminal is following equation:
LED
VS  0.2  VREF [V ]
↓ILED
+
-
S 240mV
VREF=1.2V, RS=2 [Ω]
ILED=120[mA]
RS
Figure 15.
*Attention: Rises LED current accelerate heat generation of IC. Adequate consideration needs to be taken to thermal design
in use.
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BD9422EFV
* For the adjustment of LED current with analog dimming by VREF, note that the output voltage of the DC/DC converter
largely changes accompanied by LED VF changes if the VREF voltage is changed rapidly. In particularly, when the VREF
voltages become high to low, it makes the LED terminal voltage seem higher transiently, which may influence application
such as activation of the LED short circuit protection. It needs to be adequately verified with an actual device when analog
dimming is used.
31pin. CP
Terminal which sets the time from detection of abnormality until shutdown (Timer latch). When the LED short protection,
LED open protection or SCP is detected, it perform s constant current charge of 1.0uA (typ.) to external capacitor. When the
CP terminal voltage reaches 2.0V (typ.), the IC is latched and FAIL terminal operates (at FAIL_MODE = L).
32pin. SS
Terminal which sets soft-start time of DC/DC converter: it performs constant current charge of 1.0uA to the external
capacitor connected with SS terminal, which enables soft-start of DC/DC converter.
Since the LED protection function (OPEN/SHORT detection) works when the SS terminal voltage reaches 3.0 V (typ.) or
higher, it must be set to bring stability to conditions such as DC/DC output voltage and LED constant current drive operation,
etc. before the voltage of 3.0 V is detected.
33pin. FB
Output terminal of the error amplifier of DC/DC converter which controls current mode:
The voltage of LED terminal which is the highest VF voltage among 6 LED strings and the voltage of LED_LV terminal
become input of the error amplifier. The DC/DC output voltage is kept constant to control the duty of the output N terminal
by adjusting the FB voltage.
The voltage of other LED terminals is, as a result, higher by the variation of Vf. Phase compensation setting is separately
described in ●3.7 How to set phase compensation.
A resistor and a capacitor need to be connected in series nearest to the terminal between FB and AGND.
The state in which all PWM signals are in LOW state brings high Impedance, keeping FB voltage. This action removes the
time of charge to the specified voltage, which results in speed-up in DC/DC conversion.
34pin. RT
RT sets charge/discharge current determining frequency inside IC.
Only a resistor connected to RT determines the drive frequency inside IC, the relationship has the following equation: FCT
is 500 kHz at RT= 30 kohm.
Voltage between LEDx to Sx vs LED
Current (Tj=25, 85deg.)
FCT vs RT(measurement data)
1.2
85℃
Needed LED-S Voltage
FCT [kHz]
10000
1000
100
10
1
10
100
1000
0.8
0.6
0.4
0.2
0
0
RT [kOhm]
25℃
1
50
100
150
200
250
300
350
400
LED Current Setting
Figure 16.
Figure 17.
36pin. LED_LV
LED_LV terminal sets the reference voltage error amplifier. LED_LV terminal is assumed that it is set by dividing the
resistance with a high degree of accuracy, LED_LV terminal inside the IC is in open state (High Impedance). It is necessary
to input voltage to divide the resistance from the output of REG9V or use external power source. Using the terminal in open
state needs to be avoided.
According to output current, lowering LED_LV voltage can reduce the loss and heat generation inside IC. However, it is
necessary to ensure the voltage between drain and source of FET inside IC, so LED_LV voltage has restriction on the
following equation.
VLED_LV ≧ (LED-S terminal voltage) + 0.2×VREF [V]
For example, at ILED = 100mA setting by VREF = 1V, from figure the voltage between LED and S terminal is required 0.27
V at Tj = 85°C, so LED_LV voltage must be at least a minimum 0.47V.
Note: Rises in VLED_LV voltage and LED current accelerate heat generation of IC. Adequate consideration needs to be
taken to thermal design in use.
Note: LED_LV voltage is not allowed setting below 0.3V.
Note: LED current by raising LED_LV voltage can flow to MAX 400mA, use with care in the dissipation of the package.
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BD9422EFV
37pin. LSP
Terminal which sets LED SHORT detection voltage: The input
impedance of LSP pin is High Impedance, because it is
assumed that the input of LSP terminal is set by dividing the
resistance with a high degree of accuracy.
The LSP terminal is assumed that it is set by dividing the
resistance with a high degree of accuracy, LSP terminal inside
the IC is in open state (High Impedance). It is necessary to input
voltage to divide the resistance from the output of REG9V or use
external power source. Using the terminal in open state needs to
be avoided. Set LSP voltage in the range of 0.8V to 3.0V.
LED
SHORT
REG9V
+
AMP
-
LED_LV
LED1
LED2
LED3
LED4
 5  VLSP [V ]
LED5
LED6
LEDSHORT：LSP detection Voltage, VLSP：LSP terminal voltage
+
The conditions there are restrictions on short LED detection. For
details, see the explanation of section ●3.5.2 Setting the LED
short detect voltage (LSP pin).
.
+
-
S1
+
-
S2
+
-
S3
38pin. FAIL_MODE
+
S4
Output mode of FAIL can be change by FAIL_MODE terminal.
S5
+
When FAIL_MODE is in Low state, the output of FAIL terminal is
the latch mode. FAIL terminal is latched after the CP charge time
Figure 18.
S6
from detection of abnormal state. When FAIL_MODE is in High
state, the output of FAIL terminal is one-shot-pulse mode. At detected abnormality, firstly FAIL is in Low state (Drain state).
FAIL returns to High state (Open state) if abnormality is cleared after CP charge time, In this mode, there is no latch stop for
protection operation in IC. Monitoring the FAIL with the Microcomputer, decide to stop working IC.
For FAIL_MODE = H when the detection sequence, see the explanation of section ●3.8.3 Protective operation sequence at
FAIL_MODE=H. On application to change modes is prohibited.
39pin. UVLO
UVLO terminal of the power of step-up DC/DC converter: at 2.5 V (typ.) or higher, IC starts step-up operation and stops at
2.3V or lower (typ.). (It is not shutdown of IC.) UVLO can be used to perform a reset after latch stop of the protections.
The power of step-up DC/DC converter needs to be set detection level by dividing the resistance. If any problem on the
application causes noise on UVLO terminal which results in unstable operation of DC/DC converter, a capacitance of
approximately 1000 pF needs to be connected between UVLO and AGND terminals.
40pin. AGND
Analog GND for IC
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BD9422EFV
●3.2 Protection Operation at FAIL Latch output (FAILMODE=L)
●3.2.1 List of the Threshold Function terminal（typ. condition）
Please decide the resistance divider of the various protection detection using the following table.
Protection
name
Detection
Pin name
LED Open
LEDx
LED short
LEDx
UVLO
UVLO
OVP
Detection condition
LEDx < 0.2V(4clk)
SS>3V
LEDx > 5×VLSP(4clk)
SS>3V
PWM
Release condition
Protection type
High
LEDx > 0.2V(*1)
Stop the CH latch after the CP
charge is completed.
High
LEDx < 5×VLSP(3clk)
Stop the CH latch after the CP
charge is completed.
UVLO < 2.3V
―
UVLO > 2.5V
OVP
OVP > 2.43V
―
OVP < 2.4V
Stop the N output
SCP
OVP
OVP < 0.2V
―
OVP > 0.2V
Stop the N output.
Stop the system after the CP
charge is completed.
OCP
CS
CS > 0.45V
―
CS < 0.45V
Stop the N output under the
detection.（Pulse by Pulse）
Stop the system
It is possible to reset with the FAIL_RST terminal to release the latch stop.
(*1) The release condition of OPEN protection is depend on its release timing.
The timing of release of LEDx voltage (LEDx
No.
0.2V)
1
2
LED pin voltage is released during PWM=H.
LED pin voltage is released during PWM=L.
The release condition
LED pin voltage is normal range during 3clk(3 positive edge)
As PWM=L, LED pin voltage do not exceed Short
protection voltage (VLSP) during more than 3clk. or
PWM positive edge is input when LED pin voltage do not
exceed VLSP for more than 3clk.
●3.2.2 List of Protection function
Action when protection function is detected
Protection function
DC/DC converter
LED driver
Soft-start
FAIL terminal
STB
Stop
Stop
Discharge
OPEN
LED Open
Normal operation
(Stop when all LED
CH stop)
Stop after CP charge
(Latch operation)
Normal operation
LED short
Normal operation
*1
Stop after CP charge
(Latch operation)
Normal operation
UVLO
Stop
Stop
Discharge
GND
OVP
Stop N output
Normal operation
Normal operation
OPEN
SCP
Stop N output
Stop after CP charge
(Latch operation)
Discharge after latch
DRAIN after the CP
charge is completed.
(Latch operation)
OCP
Stop the N output
(Pulse by Pulse)
Normal operation
Normal operation
OPEN
DRAIN after the CP
charge is completed.
(Latch operation)
DRAIN after the CP
charge is completed.
(Latch operation)
（*1）Short protection doesn't hang when becoming remainder 1ch. DCDC output falls as LED short.
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BD9422EFV
●3.3 Protection operation when the FAIL one shot outputs(FAILMODE=H)
●3.3.1 List of the threshold function terminal （typ. condition）
Please decide the resistance divider of the various protection detection using the following table.
Protection
name
Detection
Pin name
LED Open
LEDx
LED short
LEDx
UVLO
UVLO
OVP
Detection
condition
LEDx < 0.2V(4clk)
SS>3V
LEDx > 5×VLSP(4clk)
SS>3V
PWM
Release condition
High
LEDx > 0.2V(3clk)
High
LEDx < 5×VLSP(3clk)
UVLO < 2.3V
―
UVLO > 2.5V
OVP
OVP > 2.43V
―
OVP < 2.4V
SCP
OVP
OVP < 0.2V
―
OVP > 0.2V
OCP
CS
CS > 0.45V
―
CS < 0.45V
Protection type
FAIL drain state under the
detection.
FAIL drain state under the
detection.
Stop the system.
Stop the system
FAIL drain state under the
detection..
Stop the system.
FAIL drain state under the
detection..
Stop the N output under the
detection.
（Pulse by Pulse）
●3.3.2 List of the protection function
Protection
function
Action when protection function is detected
DC/DC
converter
LED driver
Soft-start
FAIL terminal
STB
Stop
Stop
Discharge
OPEN
LED Open
Normal operation
(Stop when the all CH
stop)
Normal operation
Normal operation
DRAIN under
the detection
LED short
Normal operation
Normal operation
Normal operation
DRAIN under
the detection
UVLO
Stop
Stop
Discharge
DRAIN
OVP
Stop the N output
Normal operation
Normal operation
DRAIN
SCP
Stop the N output
Normal operation
Normal operation
DRAIN
OCP
Stop the N output
(Pulse by Pulse)
Normal operation
Normal operation
OPEN
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BD9422EFV
●3.4 Connecting operation of Master/ slave
Recognized master mode
マスターモード認識
かつ and even one of slave’s
スレーブ側のみPWM on
どれか1つでもPWMがON
↓
↓
Add pull-up resistance
プルアップ付加
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
Master IC
PWM1
～
PWM6
SUMPWMDET
SUMPWM
A5V
+
100k
Recognized master mode
-
and all PWM off in Master
マスターモード認識
かつ
and Slave
マスター/スレーブ全てで
↓
PWM OFF
Cut FB output
↓
FB出力ｶｯﾄ
100k
+
MSDET
CS
RCS
FB
Master:ON
Slave :OFF
ERRAMP
+
Master:Low
Slave :High
-
スレーブモード
ﾞ 認識 slave mode
Recognized
かつ
and all PWM off in Slave
スレーブのPWMが全てOFF
↓
↓
FB出力カット
Cut FB output
Recognized
slave mode
スレーブモード認識
↓ ↓
エラーアンプシンク側カット
Cur erroramp sink side
3V
Slave IC
SUMPWM
FB
CS
Figure 19.
Connecting plural BD9422EFVs makes it a Master/slave, a DCDC in Master construct a system to drive LED driver. Here,
explanation of Master/slave operation in connecting 2 ICs.
[MSDET]
Convertor for recognizing Master/slave
Detect the voltage of CS terminal to judge master or slave of itself. The CS terminal of slave is OPEN when the
Master/slave mode is used. The CS terminal is high due to being supplied constant current from IC inside. The CS terminal
of Master is connected a resistance for DCDC switching current detection and swing 0V to 0.45V on operating. Convertor
can detect the differences of the voltage, which is a Master/slave recognizing signal.
[SUMPWMDET] Converter for all PWM signal detection
SUMPWM terminal is connected a switch that is ON when the PWM signal is high and a pull down resistance 100kΩ.
SUMPWM terminal becomes high more than one PWM signals are high.
When the SUMPWM terminal is connected between master and slave, it can judge if more than one signals of the entire
PWM signal in master/slave becomes high.
The operation of error amplifier part is decided by the signal of MSDET and SUMPWM
1.Error amplifier output part Diode/non diode
If the IC recognizes slave mode, the diode is connected to error amplifier output and cut the supply of sink side of error
amplifier.
2.Error amplifier output part Pull up resistance/ non pull up resistance
If the IC recognizes master mode and the PWM of slave become ON more than one, the pull up resistance is connected.
3. Error amplifier output FB output cut
In master recognizing, if all the PWM signals are OFF error amplifier output is cut.
In slave recognizing, if all the PWM signals of slave side are OFF error amplifier output is cut.
These are collected, the table below.
Use for Master／Slave mode
Master
Slave
PWM ON PWN ON
PWM ON PWM OFF
PWM OFF PWM ON
PWM OFF PWM OFF
M ast e r
Er r o r Am plifie r o u t pu t
so u r c e
sin k
pu ll u p
○
○
○
－
○
○
○
－
－
－
○
－
Slave
Er r o r Am plifie r o u t pu t
so u r c e
sin k
pu ll u p
○
－
○
－
－
－
－
－
－
－
－
－
Use for Master only
Master
PWM ON
PWM OFF
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○
－
○
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TSZ02201-0F1F0C100210-1-2
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BD9422EFV
●3.5 Setting of the external components.（typ. condition）
●3.5.1 Setting the LED current (VREF and Sx pin)
First, VREF pin voltage is determined. When performing Analog dimming, be careful of VREF pin input range (0.2 to 2.5V)
and decide typical voltage.
In BD9422EFV, LED constant current is controlled by Sx terminal voltage as a reference point. Sx terminal is controlled to
become one fifth of the voltage of VREF terminal voltage. In the case of VREF=1V, it is set to Sx=0.2V.
Therefore, when the resistance to Sx terminal versus GND is set to "RS", the relationship between RS, VREF and ILED is
as follows
RS [ohm] 
VVREF [V ]
I LED [ A]  5
REG9V=9V
●3.5.2 Setting the LED short detect voltage (LSP pin)
The voltage of LED short detection can be arbitrarily set up with LSP pin
voltage.
LSP pin cannot be used by OPEN because of High Impedance. Please be
sure to applied voltage from the exterior. About LED short detection voltage,
if "VLEDshort" and LSP pin voltage are set to "VLSP", it is as follows.
VLSP [V ] 
LSP
COMP
R1
LSP
+
CLSP
R2
3200kΩ
VLEDshort [V ]
5
LEDx
800kΩ
Figure20.
Since the setting range of a LSP pin is set to 0.8V to 3.0V, VLEDshort
can be set up in 4Vto15V.
○Equation of setting LSP detect Voltage
When the detection voltage VLSP of LSP is set up by resistance division of R1 and R2 using REG9V,
it becomes like the following formula.
R2 

VLEDshort   REG9V 
  5 [V ]
R1  R2 

*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant
setup, and inquire enough to it.
●3.5.3 Timer latch time(CP pin)
When various abnormalities are detected, the source current of 1.0uA is first flowed from CP pin.
BD9422EFV don’t stop by latch, unless abnormal state is continues and CP pin voltage reaches continues 2V.
With the capacity linked to CP pin, the unresponded time from detection to a latch stop. The relationship between the
unresponded time “Tcp” and CP pin connection capacitor “Ccp” is as follows.
CCP [F] 
TCP [S]  1.0  10 6 [ A ]
2 .0 [ V ]
●3.5.4 Setting the soft-start time (SS pin)
The starting time of a DCDC output is dependent on SS pin connection capacity.
Moreover, although SS pin is charged by source current of 1uA, IC does not perform LED protection as under DCDC
starting state until SS pin voltage arrive to 3.0V.
(The soft starting time set up here should be the mask time of a under [ starting ], and please keep in mind that it differs
from time until a DCDC output is stabilized.)
Time until a DCDC output is stabilized is greatly dependent on a ratio of step-up or load.
The relationship between soft starting time "TSS" and SS pin connection capacity "CSS" is as follows.
C SS [F] 
TSS [S]  1.0  10 6 [ A ]
3.0 [ V ]
●3.5.5 DCDC operation frequency (RT pin)
The oscillation frequency of the DCDC output is decided by RT resistance.
BD9422EFV is designed to become a 500-kHz setup at the time of 30kohm.
RT resistance and frequency have a relation of an inverse proportion, and become settled as the following formula.
RRT 
1.5  1010
[ ]
f SW
f sw
=DCDC convertor oscillation frequency [Hz]
Please connect RT resistance close as much as possible from RT pin and an AGND pin.
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BD9422EFV
●3.5.6 Maximum DCDC output voltage(Vout ,Max)
The DCDC output maximum voltage is restricted by Max Duty of N output.
Moreover, the voltage needed in order that Vf may modulate by LED current also with the same number of LEDs.
Vf becomes high, so that there is generally much current.
When you have grasped the variation factor of everythings, such as variation in a DCDC input voltage range, the variation
and temperature characteristics of LED load, and external parts, please carry out a margin setup.
●3.5.7 Setting the OVP
In BD9422EFV, when over voltage in VOUT line is detected,
the instant stop of the N pin output is carried out, and
voltage rise operation is stopped. But the latch stop by CP
charge is not performed. If VOUT drops by naturally
discharge, it is less than the hysteresis voltage of OVP
detection and the oscillation condition is fulfilled, N output
will be resumed again.
VOUT
200k
FB
R2
ERR AMP
○Equation of setting OVP detect
VOVP  2.43 
400k
-
LED_LV
+
R1  R2
[V ]
R2
R1
OVP
+
N pin output is suspended at the time of SCP detection, it
stops step-up operation, and the latch protection by CP
timer.
OVP COMP
-
SCP COMP
+
2.43V
REG9V=9V
0.2V
○Equation of setting SCP detect
VSCP  0.2 
R1  R2
[V ]
R2
Figure21.
Moreover, there is an OVPFB function which returns OVP voltage and controls error amplifier so that output voltage may be
raised, even when there is no PWM signal during a soft start.
○The VOUT setting formula by OVPFB in Soft Start
 3 R1  R2 R1 
VOUT  

  VLED _ LV
400 
 2 R2
[V ]
●3.5.8 FAIL Logic
FAIL signal output pin (OPEN DRAIN); when an abnormality is detected, NMOS is brought into GND Level.
The rating of this pin is 36V.
State
FAIL output
In normal state, In STB
In completion of an abnormality, when the
UVLO is detected(after CP latch)
OPEN
GND Level
(500ohm typ.)
●3.5.9 How to set the UVLO
UVLO pin detect the power supply voltage: Vin for step-up DC/DC converters.
Operation starts operation on more than 2.5V (typ.) and Operation stops on less
than 2.3V (typ.) .
Since internal impedance exists in UVLO pin, cautions are needed for selection of
resistance for resistance division.
A Vin voltage level to make it detecting becomes settled like the following formula
by resistance division of R1 and R2 (unit: kΩ).
○Equation of setting UVLO release
Vin
R1
Zin=610kΩ
(typ.)
1400k
530k
125k
480k
 R1  R2 

1
1

VinDET  2.5  


  R1 [V ]
R
2
1400
k
125
k
530
k
480
k






○ Equation of setting UVLO lock
Vinlock
UVLO
R2
1000pF
AGND
 R1  R2 

1
1

 2.3  


  R1 [V ]
 1400k  125k 530k  480k  87k 
 R2

AGND
Figure 22.
*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant setup,
and inquire enough to it.
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BD9422EFV
●3.5.10 Setting of the LED_LV voltage (LED_LV pin)
LED_LV pin is in the OPEN (High Impedance) state.
Please be sure to use an external seal of approval, carrying out by inputting REG9V output by resistance division. It cannot
use in the state of OPEN.
○Equation of Setting LED_LV voltage
When LED_LV voltage is set up by resistance division of R1 and R2 using REG9V, it becomes like the following formula.
V LED _ LV REG9V 
R2
[V ]
R1  R2
*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant setup,
and inquire enough to it.
●3.6 Selecting of DCDC part
Selecting inductor L
The value of inductor has a great influence on input ripple current. As
shown in Equation (1), as the inductor becomes large and switching
frequency becomes high, the ripple current of an inductor ⊿IL becomes low.
ΔIL 
ΔIL
VIN
Figure 23.
L
VOUT
・・・・・
(1)
When the efficiency is expressed by Equation (2), input peak current will be
given by Equation (3).

IL
(VOUT  V IN )  V IN
[ A]
L  VOUT  f SW
VOUT  I OUT
V IN  I IN
ILMAX  I IN 
・・・・・ (2)
ΔIL VOUT  I OUT

2
VIN  
ΔIL
2

・・・・・ (3)
Here,
VOUT: DC/DC output voltage [V]
L: reactance value [H]
VIN: input voltage [V]
LOUT: output load current (total of LED current) [A]
RCS
FSW: oscillation frequency [Hz]
IIN: input current [A]
Generally, ⊿IL is set at around 30 to 50 % of output load current.
COUT
Figure 24.
* Current exceeding the rated current value of inductor flown through the coil causes magnetic saturation, resulting in
decrease in efficiency. Inductor needs to be selected to have such adequate margin that peak current does not exceed
the rated current value of the inductor.
* To reduce inductor loss and improve efficiency, inductor with low resistance components (DCR, ACR) needs to be
selected.
Selecting output capacitor COUT
Output capacitor needs to be selected in consideration of equivalent series
resistance required to even the stable area of output voltage or ripple voltage.
Be aware that set LED current may not be flown due to decrease in LED
terminal voltage if output ripple voltage is high.
Output ripple voltage ⊿VOUT is determined by Equation (4):
VIN
IL
ΔVOUT  ILMAX  R ESR 
L
VOUT
RESR
RCS
COUT
1
C OUT

I OUT


1
[V ] ・・・・・
f SW
(4)
RESR: equivalent series resistance of COUT
* Rating of capacitor needs to be selected to have adequate margin against
output voltage.
* To use an electrolytic capacitor, adequate margin against allowable current
is also necessary. Be aware that current larger than set value flows
transitionally in case that LED is provided with PWM dimming especially.
Figure 25.
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BD9422EFV
Selecting switching MOSFET
Though there is no problem if the absolute maximum rating is the rated current of L or (withstand voltage of COUT + rectifying
diode) VF or higher, one with small gate capacitance (injected charge) needs to be selected to achieve high-speed
switching.
* One with over current protection setting or higher is recommended.
* Selection of one with small ON resistance results in high efficiency.
Selecting rectifying diode
A schottky barrier diode which has current ability higher than the rated current of L, reverse voltage larger than withstand
voltage of COUT, and low forward voltage VF especially needs to be selected.
Selecting MOSFET for load switch and its soft-start
As a normal step-up DC/DC converter does not have a switch on the path from VIN to VOUT, output voltage is generated
even though IC is OFF. To keep output voltage at 0 V until IC works, PMOSFET for load switch needs to be inserted
between VIN and the inductor. FAIL terminal needs to be used to drive the load switch. PMOSFET for the load switch of
which gate-source withstand voltage and drain-source withstand voltage are both higher than VIN needs to be selected.
To provide soft-start for the load switch, a capacitor must be inserted among gates and sources.
●3.7 How to set phase compensation
DC/DC converter application controlling current mode has each one pole (phase lag) fp due to CR filter composed of output
capacitor and output resistance (= LED current) and ZERO (phase lead) fZ by output capacitor and ESR of the capacitor.
Moreover, step-up DC/DC converter has RHP ZERO fZRHP as another ZERO. Since RHP ZERO has a characteristic of
phase lag (-90°) as pole does, cross-over frequency fc needs to be set at RHP ZERO or lower.
VIN
VOUT
L
ILED
VOUT
gm
RESR
+
RCS
CFB2
CFB1
Figure 27. Error Amplifier
Determine Pole fp and RHPZERO fZRHP of DC/DC converter:
fp 
I LED
[ Hz ]
2  VOUT  COUT
Here,、 ILED＝=sum of LED current,
ii.
RFB1
COUT
Figure 26. Output part
i.
FB
f ZRHP 
D
VOUT  VIN
VOUT
VOUT  (1  D) 2
[ Hz ]
2  L  I LED
Determine Phase compensation to be inserted into error amplifier (with fc set at 1/5 of fZRHP)
R FB1 
f RHZP  RCS  I LED
[]
5  f p  gm  VOUT  (1  D)
C FB1 
1
[F ]
2  RFB1  f p
Here,
gm  1.036  103[ S ]
iii.
Determine ZERO to compensate ESR (RESR) of COUT (electrolytic capacitor)
C FB 2 
RESR  C OUT
[F ]
RFB1
* When a ceramic capacitor (with RESR of the order of millimeters) is used to COUT, too, operation is
stabilized by insertion of RESR and CFB2.
Though increase in RFB1 and decrease in CFB1 are necessary to improve transient response, it needs to be adequately
verified with an actual device in consideration of variation between external parts since phase margin is decreased.
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●3.8 Timing chart
●3.8.1 Normal operation sequence
VCC
STB
REG9V
UVLO
7.5V
2.0V
0.8V
5.8V
5.4V
2.5V
FAIL
3.0V
SS
VOUT
PWM*
ILED*
LED open detection
LED short ,detection
,
Disable
Enable
Disable
・ILED* current is independent controlled by each PWM* pin.
・FAIL pin is pulled up.
Figure 28.
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●3.8.2 Protective operation state transition table at FAIL_MODE=L
(Open detection)
before CP charge
PWM
Error state
L(no pulse) or
pulse less than
4cnt.
→
CP charge
PWM
Error state
don't care
discharge
-
-
Not detect
discharge
-
Not detect
→
discharge
CP=2V arrival
PWM
Error state
-
-
normal state
-
Not detect
normal state
normal state
normal state
CH latch
FAIL latch
normal state
CH latch
FAIL latch
normal state
normal state
CH latch
FAIL latch
normal state
CH latch
FAIL latch
L(no pulse)
L(no pulse)
detect
charge
detect
start
charge
Not detect
discharge
L(no pulse)
H(input pulse)
detect
detect
Not detect
H(input pulse)
pulse over 4cnt.
end of state
charge
detect
Not detect
detect
Not detect
H(input pulse)
detect
(Short detection)
before CP charge
PWM
Error state
L(no pulse) or
puse less than
4cnt.
→
CP charge
PWM
Error state
→
CP=2V arrival
PWM
Error state
don't care
discharge
-
-
-
-
normal state
Not detect
discharge
-
-
-
-
L(no pulse)
don't care
normal state
CH latch
FAIL latch
normal state
CH latch
FAIL latch
normal state
CH latch
FAIL latch
normal state
CH latch
FAIL latch
L(no pulse)
charge
detect
start
charge
H(input pulse)
Not detect
discharge
detect
charge
don't care
Not deetect
H(input pulse)
pulse over 4cnt.
end of state
detect
-
-
L(no pulse)
don't care
Not deetect
H(input pulse)
detect
With "the pulse of less than 4 cnt", it is defined as the pulse width from (100n)sec to (Hi time of less than 4 cnt of DCDC frequency). In the pulse below (100n)sec,
since delay from a PWM pin input to internal logic exists, it becomes unfixed.
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●3.8.3 Protective operation sequence at FAIL_MODE=H
・Basic sequence
Figure 29.
・Actual sequence
Error detect
MASK synchronize
(4clk) (3clk) CP charge time
CP reset time
(1024clk)
CP charge time
…
…
(CLK)
2V detect hold CP reset time
(3clk) (1024clk)
…
…
…
(ERR)
2V
CP
FAIL
After it pasts CP charge time and CP
reset time, FAIL Output 1shot pulse.
PWM*
SHORT detect state
SHORT detect state
LSP detect voltage
LED*
If error signal input in this period, it is ignored.
Discharge CP by 2 times error signal
Charge is started at 1 times error detect, but it moved to reset period at 2 times error
detect immediately, therefore error signal can’t be detected.
Figure 30.
The above chart is sample of SHORT detection, but the chart of OPEN detection is also same structure.
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●3.8.4 About LED SHORT detection
LED SHORT detection don’t work by individual ch. The followings are needed for detection.
・Detection channel is PWM=H and LED terminal voltage is over LED SHORT detection threshold voltage.
・Except for detection ch, any 1ch is PWM=H and LED terminal voltage is under 3V.
・The above-mentioned 2 states continue over 4clk of DCDC oscillation frequency.
Detection sequence is the followings.(omit 4clk mask)
Figure 31.
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BD9422EFV
●Operational Notes
1.) This product is produced with strict quality control, but might be destroyed if used beyond its absolute maximum ratings including
the range of applied voltage or operation temperature. Failure status such as short-circuit mode or open mode can not be
estimated. If a special mode beyond the absolute maximum ratings is estimated, physical safety countermeasures like fuse
needs to be provided.
2.) Connecting the power line to IC in reverse polarity (from that recommended) may cause damage to IC. For protection against
damage caused by connection in reverse polarity, countermeasures, installation of a diode between external power source and IC
power terminal, for example, needs to be taken.
3.) When this product is installed on a printed circuit board, attention needs to be paid to the orientation and position of IC. Wrong
installation may cause damage to IC. Short circuit caused by problems like foreign particles entering between outputs or
between an output and power GND also may cause damage.
4.) Since the back electromotive force of external coil causes regenerated current to return, countermeasures like installation of a
capacitor between power source and GND as the path for regenerated current needs to be taken. The capacitance value must
be determined after it is adequately verified that there is no problem in properties such that the capacity of electrolytic capacitor
goes down at low temperatures. Thermal design needs to allow adequate margin in consideration of allowable loss (Pd) in
actual operation state.
5.) The GND pin needs to be at the lowest potential in any operation state.
6.) Thermal design needs to be done with adequate margin in consideration of allowable loss (Pd) in actual operation state.
7.) Use in a strong magnetic field may cause malfunction.
8.) Output Tr needs to not exceed the absolute maximum rating and ASO while using this IC. As CMOS IC and IC which has several
power sources may undergo instant flow of rush current at turn-on, attention needs to be paid to the capacitance of power source
coupling, power source, and the width and run length of GND wire pattern.
9.) This IC includes temperature protection circuit (TSD circuit). Temperature protection circuit (TSD circuit) strictly aims blockage of
IC from thermal runaway, not protection or assurance of IC. Therefore use assuming continuous use and operation after this
circuit is worked needs to not be done.
10.) As connection of a capacitor with a pin with low impedance at inspection of a set board may cause stress to IC, discharge needs
to be performed every one process. Before a jig is connected to check a process, the power needs to be turned off absolutely.
Before the jig is removed, as well, the power needs to be turned off.
11.) This IC is a monolithic IC which has P+ isolation for separation of elements and P board between elements.
A P-N junction is formed in this P layer and N layer of elements, composing various parasitic elements.
For example, a resistance and transistor are connected to a terminal as shown in the figure,
○
When GND>(Terminal A) in the resistance and when GND>(Terminal B) in the transistor (NPN), P-N junction operates
as a parasitic diode.
○
When GND>(Terminal B) in the transistor (NPN), parasitic NPN transistor operates in N layer of other elements nearby
the parasitic diode described before.
Parasitic elements are formed by the relation of potential inevitably in the structure of IC. Operation of parasitic elements can
cause mutual interference among circuits , malfunction as well as damage. Therefore such use as will cause operation of
parasitic elements like application of voltage on the input terminal lower than GND (P board) need to not be done.
Transistor (NPN)
Resistor
B
(Pin A)
P
N
P
P
P
N
N
E
C
(Pin B)
N
GND
P
P
N
N
N
P substrate
P substrate
GND
Parasitic element
GND
Parasitic element
(Pin B)
B
(Pin A)
C
E
Parasitic element
GND
ＧＮＤ
Adjacent other elements
Parasitic
Figure 32. Example of Simple Structure of Monolithic IC
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
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BD9422EFV
●Ordering Information
B
D
9
4
2
2
E
Part Number
F
V
-
XX
Package
EFV:SSOP-B
Packaging and forming specification
XX: Please confirm the formal name
to our sales
●Marking Diagram
HTSSOP-B40 (TOP VIEW)
Part Number Marking
BD9422EFV
LOT Number
1PIN MARK
●Physical Dimension Tape and Reel Information
HTSSOP-B40
<Tape and Reel information>
13.6±0.1
(MAX 13.95 include BURR)
4 +6
−4
(8.4)
1
1.2 ± 0.2
Embossed carrier tape (with dry pack)
Quantity
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
20
1PIN MARK
1.0Max.
0.625
0.5 ± 0.15
(3.2)
7.8±0.2
21
5.4±0.1
40
Tape
+0.05
0.17 −0.03
0.85±0.05
0.08±0.05
S
+0.05
0.24 −0.04
0.65
0.08
M
0.08 S
1pin
(Unit : mm)
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Datasheet
BD9422EFV
Revision History
Date
Revision
Changes
22.Sep.2012
001
Draft Version
6.Mar.2013
002
p.12 UVLO’s explanation 2.4V→2.3V
p.13 UVLO detection condition UVLO<2.4V→2.3V
p.14 UVLO detection condition UVLO<2.4V→2.3V
p.17 Equation of setting UVLO lock Vinlock=2.4×｛ → Vinlock=2.3×｛
1/530k+480k+40k）×R1 → 1/530k+480k+87k）×R1
9.Jun.2013
003
p.20 ●3.8 Timing chart modify FAIL logic
22.Dec.2014
004
p.2 Pin Configuration 37pin LPS→LSP
2.Jul.2015
005
p.14 ●3.3.2 List of the protection function
1.Sep.2015
006
p.13,14 The detailed timing condition for protections is added.
p.15 ●3.4 Connecting operation of Master/ slave
modify master/slave table
p.17 ●3.5.9 How to set the UVLO 2.4V -> 2.3V
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
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Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
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Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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Datasheet
BD9422EFV - Web Page
Buy
Distribution Inventory
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD9422EFV
HTSSOP-B40
2000
2000
Taping
inquiry
Yes