SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 FEATURES • • • • • • • • • • • • • • (1) Controlled Baseline – One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) Member of the Texas Instruments Widebus™ Family State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C High-Impedance State During Power Up and Power Down Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout High-Drive Outputs (–32-mA IOH, 64-mA IOL) Latch-Up Performance Exceeds 500 mA Per JESD 70 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Shrink Small-Outline (DL) Package DL PACKAGE (TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2DIR 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 1OE 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OE Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION/ORDERING INFORMATION The SN74ABT16245A-EP is a 16-bit noninverting 3-state transceiver designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impendance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74ABT16245A-EP is characterized for operation from –55°C to 125°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, EPIC-IIB are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005–2006, Texas Instruments Incorporated SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 ORDERING INFORMATION PACKAGE (1) TA –55°C to 125°C (1) SSOP – DL ORDERABLE PART NUMBER Reel of 1000 CABT16245AMDLREP ABT16245AMEP Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (EACH 8-BIT SECTION) INPUTS OPERATION OE DIR L L B data to A bus L H A data to B bus H X Isolation LOGIC SYMBOL(1) 48 1OE 1DIR 1 G3 3 EN1 [BA] 3 EN2 [AB] 25 2OE 2DIR 24 G6 6 EN4 [BA] 6 EN5 [AB] 1A1 47 2 1 1B1 2 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 46 3 44 5 43 6 41 8 40 9 38 11 37 12 36 13 4 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 5 2A2 2A3 2A4 2A5 2A6 2A7 2A8 (1) 2 TOP-SIDE MARKING 35 14 33 16 32 17 30 19 29 20 27 22 26 23 2B2 2B3 2B4 2B5 2B6 2B7 2B8 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 LOGIC DIAGRAM (POSITIVE LOGIC) 1DIR 1 2DIR 48 1A1 25 1OE 47 2A1 2 24 2OE 36 13 1B1 2B1 To Seven Other Channels To Seven Other Channels Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 7 V VI Input voltage range (except I/O ports) (2) –0.5 7 V VO Voltage range applied to any output in the high or power-off state –0.5 5.5 V IO Current into any output in the low state 96 mA IIK Input clamp current VI < 0 –18 mA IOK Output clamp current VO < 0 –50 mA 94 °C/W 150 °C θJA Package thermal Tstg Storage temperature range (1) (2) (3) impedance (3) –65 UNIT Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51. Recommended Operating Conditions (1) MIN MAX 4.5 5.5 VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage VI Input voltage IOH High-level output current IOL Low-level output current ∆t/∆v Input transition rise or fall rate ∆t/∆VCC Power-up ramp rate 200 TA Operating free-air temperature –55 (1) 2 Outputs enabled V V 0.8 0 UNIT V VCC V –24 mA 48 mA 10 ns/V µs/V 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 3 SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS MAX MIN VCC = 4.5 V, II = –18 mA VCC = 4.5 V, IOH = –3 mA 2.5 2.5 VCC = 5 V, IOH = –3 mA 3 3 IOH = –24 mA 2 2 IOH = –32 mA 2 VCC = 4.5 V VOL TA = 25°C MIN TYP (1) VCC = 4.5 V –1.2 IOL = 48 mA 0.55 IOL = 64 mA 0.55 Vhys MAX UNIT –1.2 V V 0.55 100 Control inputs VCC = 0 to 5.5 V, VI = VCC or GND A or B port V mV ±1 ±1 VCC = 2.1 V to 5.5 V, VI = VCC or GND ±20 ±100 IOZPU VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X ±50 µA IOZPD VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X ±50 µA II VCC = 2.7 V to 5.5 V, VO = 2.7 V, OE ≥ 2 V 10 (3) 10 µA VCC = 2.7 V to 5.5 V, VO = 0.5 V, OE ≥ 2 V –10 (3) –10 µA (2) IOZL (2) Ioff VCC = 0, VI or VO ≤ 5.5 V ICEX VCC = 5.5 V, VO = 5.5 V Outputs high VCC = 5.5 V, VO = 2.5 V IOZH IO (4) µA ±100 µA 50 –50 –100 –180 –50 50 µA –180 mA Outputs high 2 2 Outputs low 32 32 A or B port VCC = 5.5 V, IO = 0, VI = VCC or GND Data inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND Control inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND Ci Control inputs VI = 2.5 V or 0.5 V 3 pF Co A or B port VO = 2.5 V or 0.5 V 6 pF ICC ∆ICC (1) (2) (3) (4) (5) 4 (5) Outputs disabled 2 2 Outputs enabled 2 1.5 Outputs disabled 0.05 1 1.5 1.5 All typical values are at VCC = 5 V. The parameters IOZH and IOZL include the input leakage current. This limit may vary among suppliers. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. mA mA SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 Switching Characteristics over recommended operating ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A or B B or A OE B or A OE B or A VCC = 5 V, TA = 25°C MIN MAX 3.4 0.5 4 2.3 3.8 0.5 4.6 0.8 3.6 5.2 0.8 5.5 0.9 3.7 6.1 0.1 7.3 1.3 4.4 5.8 1.3 6.3 1.4 3.3 4.7 1.4 5.5 MIN TYP MAX 0.5 2.2 0.5 UNIT ns ns ns 5 SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V Input 1.5 V 1.5 V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 3V 1.5 V Input 1.5 V 0V tPLH tPHL 1.5 V 1.5 V VOL tPHL 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS tPLZ 3.5 V 1.5 V Output Waveform 2 S1 at Open (see Note B) VOL + 0.3 V VOL tPHZ tPZH 1.5 V 1.5 V 0V Output Waveform 1 S1 at 7 V (see Note B) tPLH VOH Output 1.5 V tPZL VOH Output 3V Output Control 1.5 V VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 CABT16245A*DL*EP Estim ated Device Life at Elevated Tem peratures Electrom igration and Wirebond Voiding Fail Modes 70 Electromigration Fail Mode 60 Years estimated life 50 40 30 20 Wirebond Voiding Fail Mode 10 0 120 125 130 135 140 145 150 155 Continuous Tj (°C) 7 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty CABT16245AMDLREP ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/06609-01XE ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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OTHER QUALIFIED VERSIONS OF SN74ABT16245A-EP : SN74ABT16245A • Catalog: • Military: SN54ABT16245A NOTE: Qualified Version Definitions: - TI's standard catalog product • Catalog • Military - QML certified for Military and Defense Applications Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device CABT16245AMDLREP Package Package Pins Type Drawing SSOP DL 48 SPQ Reel Reel Diameter Width (mm) W1 (mm) 1000 330.0 32.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 11.35 16.2 3.1 16.0 32.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CABT16245AMDLREP SSOP DL 48 1000 346.0 346.0 49.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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