HuaXinAn AP1154ADL33 Output ldo regulator Datasheet

[AP1154ADLXX]
-Preliminary-
AP1154ADLXX
14V Input / 1A Output LDO Regulator
1. Genaral Description
The AP1154ADLXX is a low dropout linear regulator with ON/OFF control, which can supply 1A load current.
The IC is an integrated circuit with a silicon monolithic bipolar structure. The output voltage, trimmed with high
accuracy, is available from 1.8 to 5.0V in 0.1V steps. The output capacitor is available to use a small 1μF ceramic
capacitor. The IC can be used for USB application (500mA), since the output limitation current can be set by
external resistor. The over current, thermal and reverse bias protections are integrated, and also the package is
high heat radiation type, HSOP-8. The IC is designed for space saving requirements.
2. Feature
 Available to use a small 1μF ceramic capacitor
 Dropout voltage
VDROP=160mV at 500mA
 Output current
1A
 High precision output voltage
1.5% or 50mV
 High ripple rejection ratio
80dB at 1kHz
 Wide operating voltage range
2.4V to 14.0V
 Very low quiescent current
IQUT=320A at IOUT=0mA
 Programmable output current limitation by an external resistor
 On/Off control (High active)
 Built-in Short circuit protection, thermal shutdown
 Built-in reverse bias over current protection
 Available very low noise application
 Small package
HSOP-8
3. Application
 Power supply for low voltage MPU and peripheral equipment
 Digital AV system
 Any electronic equipment
Rev.0.1
-1-
2014/07
[AP1154ADLXX]
4. Table of Contents
1.
2.
3.
4.
5.
6.
7.
Genaral Description ........................................................................................................................................... 1
Feature................................................................................................................................................................ 1
Application......................................................................................................................................................... 1
Table of Contents ............................................................................................................................................... 2
Block Diagram ................................................................................................................................................... 3
Ordering Information ......................................................................................................................................... 3
Pin Configurations and Functions ...................................................................................................................... 4
■ Pin Configurations ............................................................................................................................................ 4
■ Functions .......................................................................................................................................................... 4
8. Absolute Maximum Rating ................................................................................................................................ 5
9. Recommended Operating Conditions ................................................................................................................ 5
10.
Electrical Characteristics ................................................................................................................................ 6
■ Electrical Characteristics of Ta=Tj=25C ........................................................................................................ 6
■ Electrical Characteristics of Ta=-40C~85C .................................................................................................. 7
11.
Description ..................................................................................................................................................... 8
11.1 DC Characteristics ...................................................................................................................................... 8
11.2 ON/OFF Transient .................................................................................................................................... 17
11.3 Line transient ............................................................................................................................................ 18
11.4 Load transient ........................................................................................................................................... 19
11.5 Ripple Rejection ....................................................................................................................................... 21
11.6 Output Noise ............................................................................................................................................ 22
11.7 Setting of output current limitation .......................................................................................................... 23
11.8 Stability..................................................................................................................................................... 25
11.9 Operating Region and Power Dissipation ................................................................................................ 26
11.10 Operating Region and Power Dissipation ............................................................................................ 28
12.
Definition of term ......................................................................................................................................... 29
13.
Recommended External Circuits .................................................................................................................. 30
■Test Circuit ...................................................................................................................................................... 30
14.
Package ........................................................................................................................................................ 31
■ Outline Dimensions ........................................................................................................................................ 31
IMPORTANT NOTICE .......................................................................................................................................... 32
Rev.0.1
-2-
2014/07
[AP1154ADLXX]
5. Block Diagram
VCont
PCL
On/Off
Control
Thermal &
Over Current
Protection
Disconnect
Circuit
VRef
VIn
VOut
GND
CIn=1.0F
COut=1.0F
Figure 1. Block Diagram
6. Ordering Information
AP1154ADLXX
Ta = -40 to 85°C
HSOP-8
・ Output Voltage Code
For product name, please check the below chart. Please contact your authorized ASAHI KASEI
MICRODEVICES representative for voltage availability.
AP1154ADLXX
Output voltage code
Table 1. Standard Voltage Version, Output Voltage & Voltage Code
XX
VOUT
XX
VOUT
XX
VOUT
18
1.8
25
2.5
33
3.3
21
2.1
30
3.0
50
5.0
Rev.0.1
-3-
2014/07
[AP1154ADLXX]
7. Pin Configurations and Functions
NC
VIN
VCONT
NC
■ Pin Configurations
8
7
6
5
1
2
3
4
NC
VOUT
PCL
GND
(Top View)
■ Functions
Pin
No.
Pin
Description
Internal Equivalent Circuit
Description
Programmable Current Limitation
Vin
3
Vout
PCL
VB.G.
2
4
Vout
Connect a capacitor between the VOut
terminal and GND as follows.
PCL
GND
The output limitation current can be set by
an external resistance (RPCL). The RPCL is
connected between the PCL terminal and
GND. If there is no need of setting a
current limit, connect the PCL terminal to
GND.
Output Terminal
Vout≥2.4V: Capacitance ≥ 1μF
Vout<2.4V:Capacitance ≥ 2.2μF
GND Terminal
-
Cont
On/Off Control Terminal
300k 
6
Cont
The On/Off voltages are as follows:
VCont≥1.8V : ON
VCont≤0.35V : OFF
500k 
Pull-down resistance (500kΩ) is built-in.
Input Terminal
7
Rev.0.1
Vin
-
Connect a capacitor of 1.0F or higher
between the VIn terminal and GND.
-4-
2014/07
[AP1154ADLXX]
8. Absolute Maximum Rating
Parameter
Supply Voltage
Symbol
VccMAX
Reverse Bias
VrevMAX
PCL pin Voltage
Control pin Voltage
Junction temperature
Storage Temperature Range
VpclMAX
VcontMAX
Tj
Tstg
min
-0.4
-0.4
-0.4
-0.4
-0.4
-55
max
16
6
10
5
16
150
150
Unit
V
V
V
V
V
C
C
Condition
Vout≦2.0V
2.1V≦Vout
When mounted on PCB
(Note 1)
Note 1. Please derate 19.2mW/C above 25C or more. Thermal resistance (JA) = 52C/W.
Power Dissipation
PD
-
2400
mW
WARNING: The maximum ratings are the absolute limitation values with the possibility of the IC breakage.
When the operation exceeds this standard quality cannot be guaranteed.
9. Recommended Operating Conditions
Parameter
Symbol
min
typ
max
Unit
Operating Temperature Range
Operating Voltage Range
Ta
VOP
-40
2.4
-
85
14
C
V
Rev.0.1
-5-
Condition
2014/07
[AP1154ADLXX]
10. Electrical Characteristics
■ Electrical Characteristics of Ta=Tj=25C
The parameters with min or max values will be guaranteed at Ta=Tj=25C.
Parameter
Output Voltage
(VIN=Vouttyp+1V,Vcont=1.8V,Ta=Tj=25C, unless otherwise specified.)
Symbol
Condition
min
typ
max
Unit
V
Iout = 5mA
Vout
(Table 2)
Line Regulation
LinReg
LoaReg
Load Regulation
Vdrop
Dropout Voltage (Note 2)
Maximum Output Current
(Note 3)
Short Circuit Current(Note 3)
Quiescent Current
Standby Current
GND Pin Current
Iout,Peak
∆V=5V, Iout=5mA
Iout=5mA ~ 500mA
-5.0
-25
0.0
-
5.0
25
mV
mV
Iout=5mA ~ 1000mA
-45
-
45
mV
Iout=500mA
-
160
300
mV
Iout=1000mA
-
300
600
mV
Vout=Vout,typ  0.9
-
1400
-
mA
-
1500
-
mA
-
320
0.0
0.7
520
0.1
1.4
μA
μA
mA
-
0
0.1
μA
Vcont = 1.8V
-
5
10
μA
Vout ON state
1.8
-
-
V
-
-
0.35
V
ISHORT
Iq
Istandby
Ignd
Reverce Bias Current
Irev
Control Terminal
Control Current
Icont
Control Voltage
Vcont
Iout = 0mA
Vcont = 0V
Iout=30mA
Vrev=Vout,typ, Vin=0V,
Vcont=0V
Vout OFF state
Note 2. For Vout  2.0V , no regulations.
Note 3. The maximum output current is limited by power dissipation.
General Note:
Parameter with only typical value is for reference only.
Table 2. Standard Voltage Version
Output Voltage
Part Number
AP1154ADL18
AP1154ADL21
AP1154ADL25
AP1154ADL30
AP1154ADL33
AP1154ADL50
Rev.0.1
MIN
V
1.750
2.050
2.450
2.950
3.250
4.925
TYP
V
1.800
2.100
2.500
3.000
3.300
5.000
MAX
V
1.850
2.150
2.550
3.050
3.350
5.075
-6-
2014/07
[AP1154ADLXX]
■ Electrical Characteristics of Ta=-40C~85C
The parameters with min or max values will be guaranteed at Ta=Tj=-40 ~ 85C.
(VIN=VoutTYP+1V,Vcont=1.8V,Ta=-40 ~ 85C, unless otherwise specified.)
Symbol
Condition
min
typ
max
Unit
V
Iout = 5mA
Vout
(Table 3)
Parameter
Output Voltage
Line Regulation
Load Regulation
Dropout Voltage (Note 4)
Maximum Output Current
(Note 5)
Short Circuit Current(Note 5)
LinReg
LoaReg
∆V=5V, Iout=5mA
Iout=5mA ~ 500mA
Iout=5mA ~ 1000mA
Vdrop
Iout,Peak
-8.0
-40
-120
0.0
-
8.0
40
120
mV
mV
mV
Iout=500mA
Iout=1000mA
-
160
300
385
670
mV
mV
Vout=Vout,typ  0.9
-
1400
-
mA
-
1500
-
mA
-
320
0.0
624
0.5
μA
μA
Iout=30mA
Vrev=Vout,typ, Vin=0V,
Vcont=0V
-
0.7
1.8
mA
-
0
0.1
μA
Vcont = 1.8V
-
5
10
μA
Vout ON state
1.8
-
-
V
-
-
0.35
V
ISHORT
Quiescent Current
Standby Current
Iq
Istandby
GND Pin Current
Ignd
Reverce Bias Current
Irev
Control Terminal
Control Current
Icont
Control Voltage
Vcont
Iout = 0mA
Vcont = 0V
Vout OFF state
Note 4. For Vout  2.0V , no regulations.
Note 5. The maximum output current is limited by power dissipation.
General Note:
Parameter with only typical value is for reference only.
Table 3. Standard Voltage Version
Output Voltage
Part Number
AP1154ADL18
AP1154ADL21
AP1154ADL25
AP1154ADL30
AP1154ADL33
AP1154ADL50
Rev.0.1
MIN
V
1.720
2.020
2.420
2.920
3.217
4.875
TYP
V
1.800
2.100
2.500
3.000
3.300
5.000
MAX
V
1.880
2.180
2.580
3.080
3.383
5.125
-7-
2014/07
[AP1154ADLXX]
11. Description
11.1 DC Characteristics
 VOut vs VIn (AP1154ADL25)
 VOut vs VIn (AP1154ADL50)
LINE REG
LINE REG
6.0
6.0
VFB
5.0
4.0
4.0
3.0
2.0
Vout(V)
5.0
Vout [ V ]
Vout(V)
Vout [ V ]
VFB
1.0
3.0
2.0
1.0
0.0
0.0
0
2
4
6
8
10
12
14
16
0
2
4
Vin(V)
6
8
10
12
Vin [ V ]
 Line Regulation (AP1154ADL50)
 IQ vs VIn (AP1154ADL25)
 IQ vs VIn (AP1154ADL50)
400
400
380
380
360
360
340
340
320
320
Iq(mA)
Iq(mA)
 Line Regulation (AP1154ADL25)
300
280
16
14
16
300
280
260
260
240
240
220
220
200
200
0
2
4
6
8
10
12
14
16
0
Vin(V)
Rev.0.1
14
VinVin(V)
[V]
2
4
6
8
10
12
Vin(V)
-8-
2014/07
[AP1154ADLXX]
 IQ vs VIn (AP1154ADL50)
12
10
10
8
8
6
4
Iq(mA)
12
Iq [ mA ]
Iq(mA)
Iq [ mA ]
 IQ vs VIn (AP1154ADL25)
6
4
2
2
0
0
0
2
4
6
8
10
12
14
16
0
2
4
VinVin(V)
[V]
 Load Regulation (AP1154ADL25)
20
20
10
10
0
0
-10
-10
-20
-20
-30
-30
-40
-40
10
12
14
16
-50
0
200
400
600
Iout(mA)
800
1000
0
 IGND vs IOut (AP1154ADL25)
200
400
600
Iout(mA)
800
1000
800
1000
 IGND vs IOut (AP1154ADL50)
50
50
45
45
40
40
35
35
Ignd(mA)
Ignd(mA)
8
 Load Regulation (AP1154ADL50)
-50
30
25
20
30
25
20
15
15
10
10
5
5
0
0
0
200
400
600
800
1000
0
Iout(mA)
Rev.0.1
6
VinVin(V)
[V]
200
400
600
Iout(mA)
-9-
2014/07
[AP1154ADLXX]
 VDrop vs IOut (AP1154ADL50)
0
0
-100
-100
Vdrop(mV)
Vdrop [ mV ]
Vdrop(mV)
Vdrop [ mV ]
 VDrop vs IOut (AP1154ADL25)
-200
-300
-400
-200
-300
-400
-500
-500
0
200
400
600
800
1000
0
200
Iout(mA)
Iout
[ mA ]
600
800
1000
1600
2000
 Vout vs IOut (AP1154ADL50)
6.0
6.0
5.0
5.0
4.0
4.0
Vout(V)
Vout(V)
 Vout vs IOut (AP1154ADL25)
3.0
3.0
2.0
2.0
1.0
1.0
0.0
0.0
0
400
800
1200
Iout(mA)
1600
2000
0
400
800
1200
Iout(mA)
∆Vout [ mV ]
 ΔVOut vs VIn (AP1154ADL50)
∆Vout [ mV ]
 ΔVOut vs VIn (AP1154ADL25)
Vin-Vout,typ [ mV ]
Rev.0.1
400
Iout(mA)
Iout
[ mA ]
Vin-Vout,typ [ mV ]
- 10 -
2014/07
[AP1154ADLXX]
 PCL terminal current (IPCL) vs IOut
(AP1154ADL50)
5.0
4.5
4.5
4.0
4.0
3.5
3.5
3.0
2.5
2.0
1.5
Vout(V)
5.0
IPCL [ mA ]
Vout(V)
IPCL [ mA ]
 PCL terminal current (IPCL) vs IOut
(AP1154ADL25)
3.0
2.5
2.0
1.5
1.0
1.0
0.5
0.5
0.0
0.0
0
200
400
600
Iout(mA)
Iout [ mA ]
800
1000
 ICont vs VCont (AP1154ADL25)
0
100
100
90
90
80
80
70
70
60
60
50
50
40
40
30
30
20
20
10
10
2
4
6
8
10
12
14
16
0
Vrev(V)
 VOut vs VCont (AP1154ADL25)
1000
2
4
6
8
10
12
14
16
Vrev(V)
 VOut vs VCont (AP1154ADL50)
6
5
5
4
4
3
2
1
Iq(mA)
6
Vout [ V ]
Iq(mA)
800
0
0
Vout [ V ]
400
600
Iout(mA)
Iout [ mA ]
 ICont vs VCont (AP1154ADL50)
0
3
2
1
0
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Vin(V)
Vcont
[V]
Rev.0.1
200
Vin(V)
Vcont
[V]
- 11 -
2014/07
[AP1154ADLXX]
 IStandby vs VIn (AP1154ADL50)
1.E-05
1.E-05
1.E-06
1.E-06
1.E-07
1.E-07
Istandby [ A ]
Istandby [ A ]
 IStandby vs VIn (AP1154ADL25)
1.E-08
1.E-09
1.E-10
1.E-11
1.E-08
1.E-09
1.E-10
1.E-11
1.E-12
1.E-12
0
2
4
6
8
10
12
14
16
0
2
4
Vrev(V)
Iout
[ mA ]
10
12
14
16
12
14
16
 IRev vs VRev (AP1154ADL50)
1.E-03
1.E-03
1.E-04
1.E-04
1.E-05
1.E-05
1.E-06
1.E-06
Irev [ A ]
Irev [ A ]
8
Vrev(V)
Iout
[ mA ]
 IRev vs VRev (AP1154ADL25)
1.E-07
1.E-08
1.E-09
1.E-07
1.E-08
1.E-09
1.E-10
1.E-10
1.E-11
1.E-11
1.E-12
1.E-12
0
2
4
6
8
10
12
14
16
0
Vrev(V)
2
4
6
8
10
Vrev(V)
Vcont [ V ]
Rev.0.1
6
Vcont [ V ]
- 12 -
2014/07
[AP1154ADLXX]
・Temperature Characteristics
∆Vout [ mV ]
 ΔVOut vs Ta (AP1154ADL50)
∆Vout [ mV ]
 ΔVOut vs Ta (AP1154ADL25)
Ta [ C ]
Ta [ C ]
 IQ vs Ta (AP1154ADL25)
 IQ vs Ta (AP1154ADL50)
Iin(A)
Iin(A)
400
400
380
380
360
360
340
340
320
320
300
300
280
280
260
260
240
240
220
220
200
200
-40
-20
0
20
40
60
80
100
-40
-20
0
Ta(ーC)
60
80
100
80
100
 LoaReg vs Ta (AP1154ADL50)
10
10
Iout=100mA
Iout=500mA
Iout=1000mA
5
Iout=100mA
Iout=500mA
Iout=1000mA
5
0
LoaReg(mV)
LoaReg(mV)
40
Ta(ーC)
 LoaReg vs Ta (AP1154ADL25)
-5
-10
-15
0
-5
-10
-15
-20
-20
-40
-20
0
20
40
60
80
100
-40
Ta( ℃)
Rev.0.1
20
-20
0
20
40
60
Ta( ℃)
- 13 -
2014/07
[AP1154ADLXX]
 IGND vs Ta (AP1154ADL25)
 IGND vs Ta (AP1154ADL50)
70
70
Iout=100mA
Iout=500mA
Iout=1000mA
60
Ignd [ mA ]
40
30
20
Iq(mA)
50
Ignd [ mA ]
50
Iq(mA)
Iout=100mA
Iout=500mA
Iout=1000mA
60
40
30
20
10
10
0
0
-40
-20
0
20
40
60
80
100
-40
-20
0
Ta(ーC)
Iq(mA)
Iq(mA)
0
20
40
60
80
0
-50
-100
-150
-200
-250
-300
-350
-400
-450
-500
-550
-600
100
100
60
80
100
60
80
100
Iout=100mA
Iout=500mA
Iout=1000mA
-40
-20
0
Ta(ーC)
20
40
Ta(ーC)
 IOut,MAX vs Ta (AP1154ADL25)
 IOut,MAX vs Ta (AP1154ADL50)
1600
1600
1400
1400
1200
1200
1000
1000
800
800
600
600
400
400
200
200
0
0
-40
-20
0
20
40
60
80
100
-40
Ta(ーC)
Rev.0.1
80
 VDrop vs Ta (AP1154ADL50)
Iout=500mA
Iout=100mA
Iout=1000mA
-20
60
Ta [ C ]
 VDrop vs Ta (AP1154ADL25)
-40
40
Ta(ーC)
Ta [ C ]
0
-50
-100
-150
-200
-250
-300
-350
-400
-450
-500
-550
-600
20
-20
0
20
40
Ta(ーC)
- 14 -
2014/07
[AP1154ADLXX]
 IPCL vs Ta (AP1154ADL25)
 IPCL vs Ta (AP1154ADL50)
Iout=100mA
Iout=500mA
Iout=1000mA
5.0
4.5
4.5
3.5
3.0
2.5
2.0
1.5
Iq(mA)
4.0
3.5
IPCL [ mA ]
4.0
IPCL [ mA ]
Iq(mA)
Iout=100mA
Iout=500mA
Iout=1000mA
5.0
3.0
2.5
2.0
1.5
1.0
1.0
0.5
0.5
0.0
0.0
-40
-20
0
20
40
60
80
100
-40
-20
0
Ta(ーC)
60
80
100
Ta [ C ]
 ICont vs Ta (AP1154ADL25) (Vcont=1.8V)
 VOut On/Off Point vs Ta (AP1154ADL25)
 ICont vs Ta (AP1154ADL50) (Vcont=1.8V)
 VOut On/Off Point vs Ta (AP1154ADL50)
2.0
2.0
1.8
Vout_ON
1.8
Vout_ON
1.6
Vout_OFF
1.6
Vout_OFF
1.4
1.4
1.2
1.2
Vcont(V)
Vcont(V)
40
Ta(ーC)
Ta [ C ]
1.0
0.8
1.0
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0.0
0.0
-40
-20
0
20
40
60
80
100
-40
Ta (℃)
Rev.0.1
20
-20
0
20
40
60
80
100
Ta (℃)
- 15 -
2014/07
[AP1154ADLXX]
Rev.0.1
- 16 -
2014/07
[AP1154ADLXX]
11.2 ON/OFF Transient
Measurement circuit
Vin
Measurement Condition
Vout
Vin Vout
Cin
Vcont
2V
Vcont
PCL
GND
0V
Cout
RPCL
AP1154ADL25 Cout : 1μF , 10μF
Vin = Vout,typ + 1V
Vcont = 0V  2V ( f = 10Hz )
Iout = 1000mA
Cin = 1μF
Cout = 1μF
RPCL = 0Ω
AP1154ADL25
RPCL : 0Ω ~ 10kΩ , Iout=50mA
2V
2V
0V
V
c
o
n
Cout=1.0  10μF
t
V
o
u
t
0V
1V
10μsec
1V
Vertical axis:1V/Div, Horizontal axis:10μsec/Div
AP1154ADL50 Cout : 1μF , 10μF
AP1154ADL50
RPCL : 0Ω ~ 10kΩ , Iout=50mA
2V
V
c
o
n
Cout=1.0μFt , 10μF
V
o
u
t
0V
2V
10μsec
V
c
o
RPCL =0Ω , 1kΩ
n , 5kΩ , 10kΩ
t
V
o
u
t
2V
Vertical axis:1V/Div, Horizontal axis:10μsec/Div
Rev.0.1
10μsec
Vertical axis:1V/Div, Horizontal axis:10μsec/Div
2V
0V
V
c
o
n
RPCL= 0Ω , 1kΩ
t , 5kΩ , 10kΩ
V
o
u
t
10μsec
Vertical axis:1V/Div, Horizontal axis:10μsec/Div
- 17 -
2014/07
[AP1154ADLXX]
11.3 Line transient
Measurement circuit
Measurement condition
Vout,Typ+2V
Vin = Vout,typ + 1V  Vout,typ + 2V ( f = 1kHz )
Vcont = 2V
Cin = 1μF
Cout = 1μF
RPCL = 0Ω
Vout,Typ+1V
Vin
Vout
Vin Vout
Cin
Vcont
Vcont
PCL
GND
Cout
AP1154ADL25
AP1154ADL50
4.5V
4.5V
Vin
Vin
3.5V
3.5V
Iout=500mA
Iout=500mA
Vout
Vout
Iout=1000mA
5mV
Iout=1000mA
100μs
5mV
1
0
Vertical axis: 5mV/Div, Horizontal axis:100μsec/Div
0
μ
s
e
c
Rev.0.1
100μs
1
0
Vertical axis: 5mV/Div, Horizontal axis:100μsec/Div
0
μ
s
e
c
- 18 -
2014/07
[AP1154ADLXX]
11.4 Load transient
Measurement circuit
Measurement condition
500mA,
1000mA
0mA
Vin
Vout
Vin Vout
Cin
Vcont
Vcont
PCL
GND
Cout
AP1154ADL25
Iout:0A500mA, 1000mA (Freq=10Hz)
Vin = Vout,typ + 1V
Vcont = 2V
Cin = 1μF
Cout = 1μF
RPCL = 0Ω
AP1154ADL25
Iout:500mA, 1000mA0A (Freq=10Hz)
500mA or 1A
500mA or 1A
Iout
Iout
0A
0A
Iout=0A→500mA
Vout
Iout=500mA→0A
Vout
Iout=0A→1000mA
Iout=1000mA→0A
200mV
25μs
1
0
Vertical axis: 200mV/Div, Horizontal axis:25μsec/Div
0
μ
s
e
AP1154ADL50
c
Iout:0A500mA, 1000mA (Freq=10Hz)
500mV
2.5ms
1
Vertical axis: 500mV/Div, Horizontal axis:2.5msec/Div 0
0
μ
s
AP1154ADL50
e
c
Iout:500mA, 1000mA0A (Freq=10Hz)
500mA or 1A
500mA or 1A
Iout
Iout
0A
0A
Iout=0A→500mA
Vout
Iout=500mA→0A
Vout
Iout=0A→1000mA
Iout=1000mA→0A
200mV
25μs
1
Vertical axis: 200mV/Div, Horizontal axis:25μsec/Div 0
0
μ
s
e
c
Rev.0.1
- 19 -
500mV
2.5ms
1
Vertical axis: 500mV/Div, Horizontal axis:2.5msec/Div 0
0
μ
s
e
c
2014/07
[AP1154ADLXX]
AP1154ADL25
Iout:10mA500mA10mA(Freq=5kHz)
AP1154ADL25
Iout:10mA1000mA10mA(Freq=5kHz)
1A
500mA
Iout
Iout
10mA
10mA
10mA
25μs
200mV
Vout
1
0
0
μ
s
e
c
10mA
25μs
200mV
Vout
Vertical axis: 200mV/Div, Horizontal axis:25μsec/Div
Vertical axis: 200mV/Div, Horizontal axis:25μsec/Div
AP1154ADL50
Iout:10mA500mA10mA(Freq=5kHz)
AP1154ADL50
Iout:10mA1000mA10mA(Freq=5kHz)
I
o
u
t
1
0
m
A
5
0
0
m
A
2
5
2
μ
0
s
0 Vout
e
m c
V
Vout
縦軸:200mV/Div 横軸:25μsec/Div
Rev.0.1
I
o
u
t
1
0
0
μ
s
e
c
1
0
0
μ
s
e
c
1
A
1
0
m
A
2
0
0
m
V
縦軸:200mV/Div 横軸:25μsec/Div
- 20 -
2014/07
2
5
μ
s
e
c
[AP1154ADLXX]
11.5 Ripple Rejection
Measurement circuit
Measurement condition
500mVp-p
Vin
Vout
Vin Vout
Cout
Vcont
PCL
GND
Vin=Vout ,Typ+1.5V
Vcont
Vin = Vout,typ + 1.5V
Ripple Noise = 500mVp-p ( f = 1kHz , Sine wave )
Vcont = 2V
Iout=100mA
Cin : None
Cout = 1μF
RPCL = 0Ω
AP1154ADL25 Iout=100mA ~ 1A
AP1154ADL25 Cout=1.0μF ~ 10μF
R.R(dB)
R.R(dB)
0
0
Cout=1.0  2.2  4.7 10μF
-50
-50
-100
100
Iout=100  500  1000mA
1k
10k
100k
-100
100
1M
Frequency(Hz)
1k
10k
100k
1M
Frequency(Hz)
AP1154ADL50 Iout=100mA ~ 1A
AP1154ADL50 Cout=1.0μF ~ 10μF
R.R(dB)
R.R(dB)
0
0
Cout=1.0  2.2  4.7 10μF
-50
-50
Iout=100  500  1000mA
-100
100
1k
10k
100k
1M
Frequency(Hz)
Rev.0.1
-100
100
1k
10k
100k
1M
Frequency(Hz)
- 21 -
2014/07
[AP1154ADLXX]
AP1154ADL25 Iout=1mA~1A , f=1kHz
AP1154ADL50 Iout=1mA~1A , f=1kHz
0
0
-10
-10
R.R. [dB]
-40
-50
-60
-70
-20
-30
R.R.(dB)
-30
R.R.(dB)
R.R. [dB]
-20
-40
-50
-60
-80
-70
-90
-80
-100
-90
0
200
400
600
800
1000
-100
Iout(mA)
0
Iout [mA]
200
400
600
800
1000
Iout(mA)
Iout
[mA]
11.6 Output Noise
Measurement circuit
Vin
Measurement condition
Vout
Vin Vout
Cin
Vcont
Vcont
PCL
GND
AP1154ADL50 (f = 10 ~ 100kHz )
Noise. [μVrms]
Noise. [μVrms]
AP1154ADL25 (f = 10 ~ 100kHz )
Cout
Iout [mA]
Rev.0.1
Vin = Vout,typ + 1V
Vcont = 2V
Cin = 1μF
Cout = 1μF
RPCL = 0Ω
Iout [mA]
- 22 -
2014/07
[AP1154ADLXX]
11.7 Setting of output current limitation
The output current limit can be set by connecting an external resistance (RPCL) between the PCL terminal and
GND. If there is no need of setting a current limit, connect the PCL terminal to GND
AP1154ADL50 Iout,Peak vs Iout with RPCL
6.0
5.0
Vout. [V]
4.0
Vin Vout
Vin
Cin
Vcont
Vcont
PCL
GND
Cout
Iout
3.0
RPCL
10k,5k,2k,1k
500,100
2.0
10kΩ
5kΩ
1.0
2kΩ 1kΩ
500Ω
100Ω
0.0
0
500
1000
1500
Iout [mA]
The below figures show relation between RPCL value and Iout,Peak at Vin=Vout,typ+1V , Ta=25C
AP1154ADL50 Iout,Peak vs RPCL
1600
1600
1400
1400
1200
1200
Iout,Peak [mA]
Iout,Peak [mA]
AP1154ADL25 Iout,Peak vs RPCL
1000
800
600
1000
800
600
400
400
200
200
0
0
100
1k
10k
100
RPCL [Ω]
1k
10k
RPCL [Ω]
* Iout,Peak : Output current at 10% drop from typical output voltage.
Rev.0.1
- 23 -
2014/07
[AP1154ADLXX]
Relation between RPCL and IoutPeak has variation based on the supply voltage and the ambient temperature.
Please ensure the suitable value on the environment.
AP1154ADL25 Iout,Peak vs RPCL with Vin
Ta=25C
1400
Iout,Peak [mA]
1400
1000
800
Ta=25C
1600
Vin=4.5V
3.5V
1200
Iout,Peak [mA]
AP1154ADL50 Iout,Peak vs RPCL with Vin
3.0V
600
400
Vin=7.0V
6.0V
1200
1000
800
5.5V
600
400
200
200
0
0
100
1k
10k
100
1k
AP1154ADL25 Iout,Peak vs RPCL with Ta
Vin=Vouttyp+1V
1600
1400
Ta=85C
1200
0C
Iout,Peak [mA]
Iout,Peak [mA]
AP1154ADL50 Iout,Peak vs RPCL with Ta
Vin=Vouttyp+1V
1400
1000
800
-40C
600
400
1200
Ta=85C
0C
1000
800
-40C
600
400
200
200
0
0
100
1k
10k
100
1k
RPCL [Ω]
1200
1200
100Ω
1000
800
500Ω
600
1kΩ
400
2kΩ
200
5kΩ
10kΩ
0
-40
-20
0
20
40
60
80
Vin=Vouttyp+1V
1400
Iout,Peak [mA]
Iout,Peak [mA]
AP1154ADL50 Iout,Peak vs Ta with RPCL
Vin=Vouttyp+1V
1400
10k
RPCL [Ω]
AP1154ADL25 Iout,Peak vs Ta with RPCL
100Ω
1000
800
500Ω
600
1kΩ
400
2kΩ
200
5kΩ
10kΩ
0
100
-40
Ta [C]
Rev.0.1
10k
RPCL [Ω]
RPCL [Ω]
-20
0
20
40
60
80
100
Ta [C]
- 24 -
2014/07
[AP1154ADLXX]
11.8 Stability
The standard capacitor recommended for use on the output side is a ceramic capacitor equal to or greater than
1.0F. For operations at 2.4V or less, use at least a 2.2F capacitor.
Unstable Area
Stable Area
Figure 2. Stable operation area (COut≥0.47F)
Figure 2 indicates that operation is stable in the entire current range with a resistance of 1 or less (equivalent
series resistance or ‘ESR’) connected in series to the output capacitor. Generally, the ESR of a ceramic
capacitor is very low (several tens of m), and no problems should arise in actual use. If an application
requires use of a large ESR capacitor, connecting a ceramic capacitor with low ESR in parallel will enable
operations at this level. When parallel output capacitors are used, be sure to position the ceramic capacitor as
close to the IC as possible. The other capacitor connected in parallel may be located away from the IC. The IC
will not be damaged by the increased capacitance.
Input capacitors are necessary when the power supply impedance increases due to battery depletion or when
the line to the power supply is particularly long. There is no general rule that can be used to determine the
required number of capacitors used for such purposes. In some cases, only one capacitor is necessary for
several regulator ICs. In some cases, one capacitor is required for each IC. To determine the required number
of capacitors in a specific application, be sure to verify operation with all parts in the installed configuration.
Ceramic capacitors normally have specific temperature and voltage characteristics. Be sure to take the
operating voltage and temperature into consideration when selecting parts for use. We recommend parts
featuring B characteristics.
Figure 3. Example Ceramic Capacitance vs. Bias Voltage, Temperature
For evaluation
Kyocera : CM05B104K10AB , CM05B224K10AB , CM105B104K16A , CM105B224K16A ,
CM21B225K10A
Murata : GRM36B104K10 , GRM42B104K10 , GRM39B104K25 , GRM39B224K10 , GRM39B105K6.3
Rev.0.1
- 25 -
2014/07
[AP1154ADLXX]
11.9 Operating Region and Power Dissipation
Power dissipation capability is limited by the junction temperature that triggers the built-in overheat
protection circuit. Therefore, power dissipation capability is regarded as an internal limitation. The package
itself does not offer high heat dissipation because of its small size. The package is, however, designed to
release heat effectively when mounted on the PCB. Therefore, the heat-dissipation value will vary depending
on the material, copper pattern, etc. of the PCB on which the package is mounted.
When the regulator loss is large (high ambient temperature, poor heat radiation), the overheat protection
circuit is activated. When this occurs, output current cannot be obtained, and an output voltage drop is
observed. When the junction temperature reaches the set value, the IC stops operating. However, after the IC
has stopped operation and the junction temperature lowers sufficiently, the IC restarts operation immediately.
The thermal resistance when mounted on PCB
The chip junction temperature during operation is expressed by
Tj  θ ja  PD  25
The junction temperature of the AP1154ADLxx is limited to approximately 145C by the overheat protection
circuit. PD is the value observed when the overheat protection circuit is activated. The following example is
based on an ambient temperature of 25C.
145  θ ja  PD  25
θ ja  PD  120
θ ja 
120
(°C/W)
PD
Glass epoxy substrate with double-layer wiring
(x=30mm, y=30mm, t=1.0mm, copper pattern thickness: 35m)
AP1154ADLXX (HSOP-8)
PD is 2400mW. If the temperature exceeds 25C, be sure to derate at -20mW/C.
Method of obtaining Pd easily
With the output terminal shorted-circuited to GND, gradually increase the input voltage and measure the input
current. Slowly increase the input voltage to about 10V. The initial input current value becomes the maximum
instantaneous output current value, but gradually lowers as the chip temperature rises, and ultimately reaches
a state of thermal equilibrium (through natural air cooling).
PD is calculated using the input value for input current and the input voltage value in the equilibrium state.
PD  VIn  I In
Procedure (conducted at the time of installation on PCB)
1: Obtain PD ( VIn  I In when output is short-circuited).
PD (mW)
2: Plot PD on the 25C line.
3: Draw a straight line between PD and the 145C line.
4: Extend a straight-line perpendicular from the point of the
designed maximum operating temperature (for example,
75C).
5: Extend a line to the left from the intersection of the derating
curve and the line drawn in 4, and read the PD value (this value
is DPD).
6: DPD  (VIn,MAX  VOut )  I Out at 75C
2
PD
5
DPD
3
4
0
25
50
75
100
145
Ta (°C)
The maximum operating current at the maximum temperature is as follows:
I Out  {DPD  (VIn,MAX  VOut )}
Rev.0.1
- 26 -
2014/07
[AP1154ADLXX]
Try to achieve maximum heat dissipation in your design in order to minimize the part’s temperature during
operation. Generally, lower part temperatures result in higher reliability in operation.
Rev.0.1
- 27 -
2014/07
[AP1154ADLXX]
11.10 Operating Region and Power Dissipation
It is recommended to turn the regulator off when the circuit following the regulator is not operating. A design
with small electric power loss can be implemented. Because the control current is small, it is possible to
control it directly by CMOS logic.
Control Terminal Voltage (Vcont)
Vcont > 1.8V
Vcont < 0.35V
ON/OFF State
ON
OFF
Parallel Connected ON/OFF Control
Vout
Vin
5.0V
AP1154ADL
3.3V
R
AP1154ADL
2.5V
AP1154ADL
On/Off
Figure 4. Parallel Connection Example
Figure 4 shows the multiple regulators being controlled by a single ON/OFF control signal. There is fear of
overheating, because the power loss of the low voltage side (AP1154ADL20) is large. The series resistor (R) is
put in the input line of the low output voltage regulator in order to prevent over-dissipation. The voltage
dropped across the resistor reduces the large input-to-output voltage across the regulator, reducing the power
dissipation in the device. When the thermal sensor works, a decrease of the output voltage, oscillation, etc.
may be observed.
Rev.0.1
- 28 -
2014/07
[AP1154ADLXX]
12. Definition of term
Characteristics
 Output Voltage (VOut)
The output voltage is specified with VIn=VOut,TYP+1V and IOut=5mA.
 Output Current (IOut)
Output current, which can be used continuously (It is the range where overheating protection of the IC does
not operate).
 Maximum output current (IOut,Peak)
The rated output current is specified under the condition where the output voltage drops 0.9V times the value
specified with IOut=5mA by increasing the output current. The input voltage is set to VOutTYP+1V and the
current is pulsed to minimize temperature effect.
 Dropout Voltage (VDrop)
It is the difference between the input voltage and the output voltage when the circuit stops stable operation by
decreasing the input voltage. It is measured when the output voltage drops 100mV from its nominal value by
decreasing the input voltage gradually.
 Line Regulation (LinReg)
It is the fluctuations of the output voltage value when the input voltage is changed.
 Load Regulation (LoaReg)
It is the fluctuations of the output voltage value when the input voltage is assumed to be V Out,TYP+1V, and the
output current is changed.
 Ripple Rejection (RR)
Ripple rejection is the ability of the regulator to attenuate the ripple content of the input voltage at the output.
It is measured with the condition of VIn=VOut,TYP+1.5V. Ripple rejection is the ratio of the ripple content
between the output vs. input and is expressed in dB
 Standby Current (IStandby)
Standby current is the current which flows into the regulator when the output is turned off by the control
function (VCont=0V).
Protections
 Over Current Protection
It is a function to protect the IC by limiting the output current when excessive current flows into the IC, such
as the output is connected to GND, etc.
 Thermal Protection
It protects the IC not to exceed the permissible power consumption of the package in case of a large power
loss inside the regulator. The output is turned off when the chip reaches around 145°C, but it turns on again
when the temperature of the chip decreases.
 Reverse Voltage Protection
Reverse voltage protection prevents damage due to the output voltage being higher than the input voltage.
This fault condition can occur when the output capacitor remains charged and the input is reduced to zero, or
when an external voltage higher than the input voltage is applied to the output side. Generally, a LDO
regulator has a diode in the input direction from an output. If an input falls from an output in an input-GND
short circuit etc. and this diode turns on, current will flow for an input terminal from an output terminal. In
the case of excessive current, IC may break.In order to prevent this, it is necessary to connect an Schottky
Diode etc. outside. This product is equipped with reverse bias over-current prevention, and excessive current
does not flow in to IC. Therefore, no need to connect diode outside.
Vin
Vout
GND
 ESD
MM: 200pF 0 200V or over
HBM: 100pF 1.5k 2000V or over
Rev.0.1
- 29 -
2014/07
[AP1154ADLXX]
13. Recommended External Circuits
■Test Circuit
Vin
Iin
A
-
Vout
Cin
Vin
Cout
Vcont
A
-
Vout
V
Iout
5mA
PCL
GND
RPCL
Vcont
1.8V
Figure 5. Test Circuit
Rev.0.0
- 30 -
2014/07
[AP1154ADLXX]
14. Package
■ Outline Dimensions
・Unit: mm
Mark
8
5
4.4 0.2
AC30
xxxX
Green Product Mark
1
4
0.40 0.05
0.1
0 - 0.25
1.45 0.1
4.9 0.2
0.15 0.05
Lot No.
1.27
4
8
5
0.4 0.2
(2.7)
1
6.2 0.3
(2.9)
Rev.0.0
- 31 -
2014/07
[AP1154ADLXX]
IMPORTANT NOTICE
0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the
information contained in this document without notice. When you consider any use or application of
AKM product stipulated in this document (“Product”), please make inquiries the sales office of
AKM or authorized distributors as to current status of the Products.
1. All information included in this document are provided only to illustrate the operation and
application examples of AKM Products. AKM neither makes warranties or representations with
respect to the accuracy or completeness of the information contained in this document nor grants any
license to any intellectual property rights or any other rights of AKM or any third party with respect
to the information in this document. You are fully responsible for use of such information contained
in this document in your product design or applications. AKM ASSUMES NO LIABILITY FOR
ANY LOSSES INCURRED BY YOU OR THIRD PARTIES ARISING FROM THE USE OF
SUCH INFORMATION IN YOUR PRODUCT DESIGN OR APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require
extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may
cause loss of human life, bodily injury, serious property damage or serious public impact, including
but not limited to, equipment used in nuclear facilities, equipment used in the aerospace industry,
medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic
signaling equipment, equipment used to control combustions or explosions, safety devices, elevators
and escalators, devices related to electric power, and equipment used in finance-related fields. Do
not use Product for the above use unless specifically agreed by AKM in writing.
3. Though AKM works continually to improve the Product’s quality and reliability, you are
responsible for complying with safety standards and for providing adequate designs and safeguards
for your hardware, software and systems which minimize risk and avoid situations in which a
malfunction or failure of the Product could cause loss of human life, bodily injury or damage to
property, including data loss or corruption.
4. Do not use or otherwise make available the Product or related technology or any information
contained in this document for any military purposes, including without limitation, for the design,
development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or
missile technology products (mass destruction weapons). When exporting the Products or related
technology or any information contained in this document, you should comply with the applicable
export control laws and regulations and follow the procedures required by such laws and
regulations. The Products and related technology may not be used for or incorporated into any
products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or
foreign laws or regulations.
5. Please contact AKM sales representative for details as to environmental matters such as the RoHS
compatibility of the Product. Please use the Product in compliance with all applicable laws and
regulations that regulate the inclusion or use of controlled substances, including without limitation,
the EU RoHS Directive. AKM assumes no liability for damages or losses occurring as a result of
noncompliance with applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set forth
in this document shall immediately void any warranty granted by AKM for the Product and shall not
create or extend in any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior
written consent of AKM.
Rev.0.0
- 32 -
2014/07
Similar pages