BSC032N03S G OptiMOS™2 Power-Transistor Product Summary Features V DS 30 V • Fast switching MOSFET for SMPS R DS(on),max 3.2 mΩ • Optimized technology for notebook DC/DC converters ID 100 A • Qualified according to JEDEC1 for target applications PG-TDSON-8 • Logic level / N-channel • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance • Avalanche rated; dv/dt rated • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 Type Package Marking BSC032N03S G PG-TDSON-8 32N03S Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C 100 T C=100 °C 77 T A=25 °C, R thJA=45 K/W 2) I D,pulse T C=25 °C3) 200 Avalanche energy, single pulse E AS I D=50 A, R GS=25 Ω 550 Reverse diode dv /dt dv /dt I D=50 A, V DS=24 V, di /dt =200 A/µs, T j,max=150 °C 6 Gate source voltage V GS Power dissipation P tot T A=25 °C, R thJA=45 K/W 2) Operating and storage temperature T j, T stg Rev. 1.64 mJ kV/µs ±20 V 78 W 2.8 -55 ... 150 IEC climatic category; DIN IEC 68-1 A 23 Pulsed drain current T C=25 °C Unit °C 55/150/56 page 1 2009-10-22 BSC032N03S G Parameter Values Symbol Conditions Unit min. typ. max. - - 1.6 Thermal characteristics Thermal resistance, junction - case R thJC bottom top Thermal resistance, R thJA junction - ambient K/W 18 minimal footprint - - 62 6 cm2 cooling area2) - - 45 30 - - Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=70 µA 1.2 1.6 2 Zero gate voltage drain current I DSS V DS=30 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=30 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=50 A - 3.9 4.9 mΩ V GS=10 V, I D=50 A - 2.7 3.2 0.3 0.6 1.2 Ω 57 113 - S Gate resistance RG Transconductance g fs 1) |V DS|>2|I D|R DS(on)max, I D=50 A J-STD20 and JESD22 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See figure 3 Rev. 1.64 page 2 2009-10-22 BSC032N03S G Parameter Values Symbol Conditions Unit min. typ. max. - 3820 5080 - 1360 1810 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 173 260 Turn-on delay time t d(on) - 7.5 11 Rise time tr - 7.0 11 Turn-off delay time t d(off) - 32 48 Fall time tf - 5.4 8 Gate to source charge Q gs - 11 15 Gate charge at threshold Q g(th) - 6.1 8.1 Gate to drain charge Q gd - 7.2 11 Switching charge Q sw - 12 18 Gate charge total Qg - 29 39 Gate plateau voltage V plateau - 2.9 - Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 5 V - 26 34 Output charge Q oss V DD=15 V, V GS=0 V - 32 43 - - 50 - - 200 V GS=0 V, V DS=15 V, f =1 MHz V DD=15 V, V GS=10 V, I D=25 A, R G=2.7 Ω pF ns Gate Charge Characteristics 4) V DD=15 V, I D=25 A, V GS=0 to 5 V nC V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=50 A, T j=25 °C - 0.84 1 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/µs - - 15 nC 4) T C=25 °C A See figure 16 for gate charge parameter definition Rev. 1.64 page 3 2009-10-22 BSC032N03S G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 200 10 10 V 4.5 V 3V 3.4 V 3.2 V 4V 160 8 3.7 V 6 R DS(on) [mΩ] 120 I D [A] 3.7 V 80 4V 4 4.5 V 3.4 V 10 V 3.2 V 40 2 3V 2.8 V 0 0 0 1 2 3 0 V DS [V] 50 100 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 160 180 150 120 g fs [S] I D [A] 120 80 90 60 40 150 °C 30 25 °C 0 0 0 1 2 3 4 Rev. 1.64 0 50 100 I D [A] V GS [V] page 4 2009-10-22 BSC032N03S G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 80 100 80 I D [A] P tot [W] 60 40 60 40 20 20 0 0 0 40 80 120 160 0 40 T C [°C] 80 120 160 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 101 limited by on-state resistance 1 µs 10 µs 10 2 100 DC I D [A] 0.5 Z thJC [K/W] 100 µs 1 ms 0.2 0.1 0.05 101 10-1 0.02 10 ms 0.01 single pulse 100 10 10-2 -1 10 0 10 1 10 2 V DS [V] Rev. 1.64 10-5 10-4 10-3 10-2 10-1 100 t p [s] page 5 2009-10-22 BSC032N03S G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=50 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 6 2.5 5 2 700 µA R DS(on) [mΩ] 4 3 V GS(th) [V] 98 % typ 1.5 70 µA 1 2 0.5 1 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 10000 25°C, 98% 25 °C Ciss 150 °C 102 150°C, 98% 103 I F [A] C [pF] Coss 1000 101 Crss 102 100 100 0 10 20 30 V DS [V] Rev. 1.64 0 0.4 0.8 1.2 1.6 V SD [V] page 6 2009-10-22 BSC032N03S G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=25 A pulsed parameter: T j(start) parameter: V DD 100 12 15 V 10 125 °C 25 °C 100 °C 6V 24 V V GS [V] I AV [A] 8 10 6 4 2 1 0 1 10 100 1000 0 20 40 60 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 38 V GS Qg 35 V BR(DSS) [V] 32 29 V g s(th) 26 23 Q g(th) Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 1.64 page 7 2009-10-22 BSC032N03S G Package Outline PG-TDSON-8 : Outline Rev. 1.64 page 8 2009-10-22 BSC032N03S G Package Outline P-TDSON-8: Tape Dimensions in mm Rev. 1.64 page 9 2009-10-22 BSC032N03S G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.64 page 10 2009-10-22