ASAHI KASEI
[AK6420B/40B/80B]
AK6420B / 40B / 80B
2K / 4K / 8Kbit Serial CMOS EEPROM
Features
ADVANCED CMOS EEPROM TECHNOLOGY
Wide Vcc (1.8V ∼ 5.5V) operation
AK6420B • • 2048 bits: 128 Õ 16 organization
AK6440B • • 4096 bits: 256 Õ 16 organization
AK6480B • • 8192 bits: 512 Õ 16 organization
ONE CHIP MICROCOMPUTER INTERFACE
- Interface with one chip microcomputer's serial communication port directly
LOW POWER CONSUMPTION
- 0.8µA Max (Standby mode)
HIGH RELIABILITY
-Endurance
-Data Retention
: 100K cycles
: 10 years
SPECIAL FEATURES
- High speed operation ( fMAX=1MHz: Vcc=2.5V )
- Automatic write cycle time-out with auto-ERASE
- Automatic address increment (READ)
- Software and Hardware controlled write protection
IDEAL FOR LOW DENSITY DATA STORAGE
- Low cost, space saving, 8-pin package (MSOP)
DAS03E-00
1999/05
-1-
ASAHI KASEI
[AK6420B/40B/80B]
General Description
The AK6420B/40B/80B is a 2048/4096/8192bit, serial, read/write, non-volatile memory device fabricated using
an advanced CMOS E2PROM technology. The AK6420B has 2048bits of memory organized into 128
registers of 16 bits each. The AK6440B has 4096bits of memory organized into 256 registers of 16 bits each.
The AK6480B has 8192bits of memory organized into 512 registers of 16 bits each. The AK6420B/40B/80B
can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is
integrated for high voltage generation that is used for write operation.
The AK6420B/40B/80B can connect to the serial communication port of popular one chip microcomputer
directly (3 line negative clock synchronous interface). At write operation, AK6420B/40B/80B takes in the write
data from data input pin (DI) to a register synchronously with rising edge of input pulse of serial clock pin
(SK). And at read operation, AK6420B/40B/80B takes out the read data from a register to data output pin
(DO) synchronously with falling edge of SK.
The AK6420B/40B/80B has 4 instructions such as READ, WRITE, WREN (write enable) and WRDS (write
disable). Each instruction is organized by op-code block (8bits), address block (8bits) and data (8bits Õ 2).
When input level of SK pin is high level and input level of chip select (CS) pin is changed from high level to low
level, AK6420B/40B/80B can receive the instructions.
Special features of the AK6420B/40B/80B include : automatic write time-out with auto-ERASE, Ready/Busy
status signal output and ultra-low standby power mode when deselected (CS=high).
• Software and Hardware controlled write protection
The AK6420B/40B/80B has 2 (hardware and software) write protection functions.
After power on or after execution of WRDS (write disable) instruction, execution of WRITE instruction will be
disabled. This write protection condition continues until WREN instruction is executed or Vcc is removed from
the part.
Execution of READ instruction is independent of both WREN and WRDS instructions.
Reset pin should be low level when WRITE instruction is executed. When the Reset pin is high level, the
WRITE instruction is not executed.
• Ready/Busy status signal
The DO pin indicates the Busy status. When input level of SK pin is low level and input level of CS pin is
changed from high level to low level, the AK6420B/40B/80B is in the status output mode and the DO pin
indicates the Ready/Busy status. The Ready/ Busy status outputs on DO pin until CS pin is changed from low
level to high level, or first bit ("1") of op-code of next instruction is given to the part. Except when the device is
in the status output mode or outputs data, the DO pin is in the high impedance state.
Type of Products
Model
AK6420BH
AK6440BH
AK6480BH
Memory size
2Kbits
4Kbits
8Kbits
Temp.Range
-40°C∼85°C
-40°C∼85°C
-40°C∼85°C
DAS03E-00
Vcc
1.8V∼5.5V
1.8V∼5.5V
1.8V∼5.5V
Package
8pin Plastic MSOP
8pin Plastic MSOP
8pin Plastic MSOP
1999/05
-2-
ASAHI KASEI
[AK6420B/40B/80B]
Pin arrangement
Pin Name
Function
CS
Chip Select
SK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
RESET
RESET Input
Vcc
Power Supply
GND
Ground
NC
Not Connected
DAS03E-00
1999/05
-3-
ASAHI KASEI
[AK6420B/40B/80B]
Pin Description
CS (Chip Select)
When SK is high level and CS is changed from high level to low level, AK6420B/40B/80B can receive the
instructions. CS should be kept low level while receiving op-code, address and data and while outputting data.
If CS is changed to high level during the above period, AK6420B/40B/80B stops the instruction execution.
When SK is low and CS is changed from high level to low level, AK6420B/40B/80B will be in status output
mode. The CS need not be low level during the automatic write time-out period (BUSY status).
SK (Serial Clock)
The SK clock pin is the synchronous clock input for input/output data. At write operation, AK6420B/40B/80B
takes in the write data from data input pin (DI) synchronously with rising edge of input pulse of serial clock pin
(SK). And at read operation, AK6420B/40B/80B takes out the read data to data output pin (DO)
synchronously with falling edge of SK. The SK clock is not needed during the automatic write time-out period
(BUSY status), the status output period and when the device isn't selected (CS = high level).
DI (Data Input)
The op-code, address and write data is input to the DI pin.
DO (Data Output)
The DO pin outputs the read data and status signal and will be high impedance except for this timing.
RESET (Reset)
The AK6420B/40B/80B stops executing the write instruction when the RESET pin is high level. The RESET
pin should be low level while the write instruction input period and the automatic write time-out period. If the
RESET pin is high level while the automatic write time-out period, the AK6420B/40B/80B stops execution of
internal programming and the device returns to ready status. In this case the word data of the specified
address will be incomplete. When inputting the new instruction after RESET, the CS pin should be set to high
level. The read, write enable and write disable instructions are not affected by RESET pin status.
Vcc (Power Supply)
GND (Ground)
DAS03E-00
1999/05
-4-
ASAHI KASEI
[AK6420B/40B/80B]
Functional Description
The AK6420B/40B/80B has 4 instructions such as READ, WRITE, WREN (write enable) and WRDS (write
disable). Each instruction is organized by op-code block (8bits), address block (8bits) and data (8bitsÕ2).
When input level of SK pin is high level and input level of chip select (CS) pin is changed from high level to low
level, AK6420B/40B/80B can receive the instructions.
When the instructions are executed consecutively, the CS pin should be brought to high level for a minimum of
250ns(Tcs) between consecutive instruction cycle.
Instruction Set For 6420B
Instruction
Op-Code
Address
Data
READ
10101000
A6 A5 A4 A3 A2 A1 A0 0
D15 -D0
WRITE
10100100
A6 A5 A4 A3 A2 A1 A0 0
D15 -D0
WREN
10100011
Õ ý ý Õý ý Õý ý Õý ý Õý ý Õý ý Õý ý Õ
WRDS
10100000
Õ ý ý Õý ý Õý ý Õý ý Õý ý Õý ý Õý ý Õ
( WRAL )
10101111
Õ ý ý Õý ý Õý ý Õý ý Õý ý Õý ý Õý ý Õ
Op-Code
Address
READ
10101000
A7 A6 A5 A4 A3 A2 A1 A0
D15 -D0
WRITE
10100100
A7 A6 A5 A4 A3 A2 A1 A0
D15 -D0
WREN
10100011
ÕýýÕýýÕýýÕýýÕýýÕýýÕýýÕ
WRDS
10100000
ÕýýÕýýÕýýÕýýÕýýÕýýÕýýÕ
( WRAL )
10101111
ÕýýÕýýÕýýÕýýÕýýÕýýÕýýÕ
Op-Code
Address
READ
1 0 1 0 1 0 0 A8
A7 A6 A5 A4 A3 A2 A1 A0
D15 -D0
WRITE
1 0 1 0 0 1 0 A8
A7 A6 A5 A4 A3 A2 A1 A0
D15 -D0
WREN
10100011
ÕýýÕýýÕýýÕýýÕýýÕýýÕýýÕ
WRDS
10100000
ÕýýÕýýÕýýÕýýÕýýÕýýÕýýÕ
( WRAL )
10101111
ÕýýÕýýÕýýÕýýÕýýÕýýÕýýÕ
D15 -D0
Instruction Set For 6440B
Instruction
Data
D15 -D0
Instruction Set For 6480B
Instruction
Data
D15 -D0
Õ:don't care
(Note) The WRAL instruction is used for factory function test only. User can't use this instruction .
DAS03E-00
1999/05
-5-
ASAHI KASEI
[AK6420B/40B/80B]
Write
The write instruction is followed by 16 bits of data to be written into the specified address. After the 32nd
rising edge of SK to read D0 in, the AK6420B/40B/80B will be put into the automatic write time-out period.
During the automatic write time-out period (Busy status)and while entering write instruction, the RESET pin
should be low level. If the RESET pin is set to high level during the automatic write time-out period, the
AK6420B/40B/80B stops execution of internal programming and the device returns to ready status. In this
case the word data of the specified address will be incomplete. When inputting the new instruction after
RESET, the CS pin should be set to high level. When the RESET pin is kept at high level, the write is not
executed. This becomes write protection function.
The CS pin need not be high level during automatic write time-out period (BUSY status).
DAS03E-00
1999/05
-6-
ASAHI KASEI
[AK6420B/40B/80B]
Read
The read instruction is the only instruction which outputs serial data on the DO pin. When the 17th falling
edge of SK is received , the DO pin will come out of high impedance state and shift out the data from D15 first
in descending order which is located at the address specified in the instruction.
The data in the next address can be read sequentially by continuing to provide clock. The address
automatically cycles to the next higher address after the 16bit data shifted out.
AK6420B • • When the highest address is reached ($7F), the address counter rolls over to
address $00 allowing the read cycle to be continued indefinitely.
•
•
When the highest address is reached ($FF), the address counter rolls over to
AK6440B
address $00 allowing the read cycle to be continued indefinitely.
AK6480B • • When the highest address is reached ($1FF), the address counter rolls over to
address $000 allowing the read cycle to be continued indefinitely.
READ (AK6480B)
DAS03E-00
1999/05
-7-
ASAHI KASEI
[AK6420B/40B/80B]
WREN / WRDS ( Write Enable and Write Disable )
When Vcc is applied to the part, it powers up in the programming disable (WRDS) state.
Programming must be preceded by a programming enable (WREN) instruction. Programming
remains enabled until a programming disable (WRDS) instruction is executed or Vcc is removed
from the part. The programming disable instruction is provided to protect against accidental data
disturb. Execution of a read instruction is not affected by both WREN and WRDS instructions.
DAS03E-00
1999/05
-8-
ASAHI KASEI
[AK6420B/40B/80B]
Absolute Maximum Ratings
Parameter
Symbol
Min
Max
Unit
Power Supply
VCC
-0.6
+7.0
V
All Input Voltages
with Respect to Ground
VIO
-0.6
VCC+0.6
V
Ambient storage temperature
Tst
-65
+150
°C
Stress above those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of the specification is not implied. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
Recommended Operating Condition
Parameter
Symbol
Min
Max
Unit
Power Supply
VCC
1.8
5.5
V
Ambient Operating Temperature
Ta
-40
+85
°C
DAS03E-00
1999/05
-9-
ASAHI KASEI
[AK6420B/40B/80B]
Electrical Characteristics
(1) D.C. ELECTRICAL CHARACTERISTICS
( 1.8V≤Vcc≤5.5V, -40°C≤Ta≤85°C, unless otherwise specified )
Parameter
Symbol
Condition
Current Dissipation
ICC1 VCC=5.5V, tSKP=500ns, *1
(WRITE) ICC2 VCC=2.5V, *1 6420B
tSKP=500ns
6440B/80B
ICC3 VCC=1.8V, *1 6420B
tSKP=1.5us
6440B/80B
Current Dissipation
ICC4 VCC=5.5V, tSKP=500ns, *1
(READ,WREN,
ICC5 VCC=2.5V, tSKP=500ns, *1
WRDS) ICC6 VCC=1.8V, tSKP=1.5us, *1
Current Dissipation
ICCSB VCC=5.5V
*2
(Standby)
Input High Voltage1
VIH1 1.8V≤VCC≤5.5V
CS, SK, RESET pin
Input High Voltage2
VIH2 2.5V≤VCC≤5.5V
DI pin
VIH3 1.8V≤VCC<2.5V
1.8V≤VCC≤5.5V
Input Low Voltage1
VIL1
CS, SK, RESET pin
2.5V≤VCC≤5.5V
Input Low Voltage2
VIL2
DI pin
1.8V≤VCC<2.5V
VIL3
Output High Voltage
VOH1 2.5V≤VCC≤5.5V
IOH=-50µA
VOH2 1.8V≤VCC<2.5V
IOH=-50µA
2.5V
≤VCC≤5.5V
Output Low Voltage
VOL1
IOL=1.0mA
VOL2 1.8V≤VCC<2.5V
IOL=0.1mA
Input Leakage
ILI
VCC=5.5V,VIN=5.5V
Output Leakage
ILO
VCC=5.5V
VOUT=5.5V,CS=VCC
*1: VIN=VIH/VIL,DO=Open
*2: CS=Vcc, SK/DI/RESET=Vcc/GND,DO=Open
DAS03E-00
Min.
Max.
4.0
2.0
2.5
1.5
2.0
0.75
0.3
0.15
0.8
Unit
mA
mA
mA
mA
mA
mA
mA
mA
uA
0.8ÕVCC
VCC+0.5
V
0.7ÕVCC
0.8ÕVCC
0
VCC+0.5
VCC+0.5
0.2ÕVCC
V
V
V
0
0
VCC-0.3
0.3ÕVCC
0.2ÕVCC
V
V
V
VCC-0.3
V
0.4
V
0.4
V
1.0
1.0
uA
uA
1999/05
- 10 -
ASAHI KASEI
[AK6420B/40B/80B]
(2) A.C. ELECTRICAL CHARACTERISTICS
( 1.8V≤Vcc≤5.5V, -40°C≤Ta≤85°C, unless otherwise specified )
Parameter
SK Cycle Time
Symbol
Condition
Min.
Max.
Unit
500
ns
tSKP1 2.5V≤VCC≤5.5V
tSKP2 1.8V≤VCC<2.5V
1.5
us
SK Pulse Width
tSKW1 2.5V≤VCC≤5.5V
250
ns
tSKW2 1.8V≤VCC<2.5V
750
ns
SK High Pulse Width
tSKH1 4.5V≤VCC≤5.5V
250
ns
VCC<4.5V
2.5V
≤
500
ns
tSKH2
*3 tSKH3 1.8V≤VCC<2.5V
750
ns
CS Setup Time
tCSS
100
ns
CS Hold Time
tCSH
100
ns
SK Setup Time
tSKSH
100
ns
/tSKSL
RESET Setup Time
tRESS
0
ns
4.5V≤VCC≤5.5V
100
ns
Data Setup Time
tDIS1
1.8V≤VCC<4.5V
tDIS2
200
ns
4.5V≤VCC≤5.5V
Data Hold Time
tDIH1
100
ns
1.8V
VCC<4.5V
≤
tDIH2
200
ns
4.5V≤VCC≤5.5V, *4
DO pin
tPD1
150
ns
Output delay
2.5V≤VCC<4.5V, *4
300
ns
tPD2
1.8V≤VCC<2.5V. *4
tPD3
500
ns
Selftimed Programming tE/W
10
ms
Time
Min CS High Time
tCS
250
ns
DO High-Z Time
tOZ
500
ns
*3: tSKH is the high pulse width of 16th SK pulse in READ operation. When the data in the
next address are read sequentially by continuing to provide clock, t SKH are applied to
the high pulse width of 32nd and 48th (multiple of 16) SK pulse in READ operation.
*4: CL=100pF
DAS03E-00
1999/05
- 11 -
ASAHI KASEI
[AK6420B/40B/80B]
Synchronous Data Timing
(note) * = "A0" for AK6420B, "A1" for AK6440B/80B
+ = "0" for AK6420B, "A0" for AK6440B/80B
Data Output (READ)
DAS03E-00
1999/05
- 12 -
ASAHI KASEI
[AK6420B/40B/80B]
DAS03E-00
1999/05
- 13 -
ASAHI KASEI
[AK6420B/40B/80B]
Ready / BUSY Signal Output (DO pin)
DAS03E-00
1999/05
- 14 -
IMPORTANT NOTICE
zThese products and their specifications are subject to change without notice. Before
considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM)
sales office or authorized distributor concerning their current status.
zAKM assumes no liability for infringement of any patent, intellectual property, or other
right in the application or use of any information contained herein.
zAny export of these products, or devices or systems containing them, may require an
export license or other official approval under the law and regulations of the country of
export pertaining to customs and tariffs, currency exchange, or strategic materials.
zAKM products are neither intended nor authorized for use as critical components in any
safety, life support, or other hazard related device or system, and AKM assumes no
responsibility relating to any such use, except with the express written consent of the
Representative Director of AKM. As used here:
(a) A hazard related device or system is one designed or intended for life support or
maintenance of safety or for applications in medicine, aerospace, nuclear energy, or
other fields, in which its failure to function or perform may reasonably be expected to
result in loss of life or in significant injury or damage to person or property.
(b) A critical component is one whose failure to function or perform may reasonably be
expected to result, whether directly or indirectly, in the loss of the safety or
effectiveness of the device or system containing it, and which must therefore meet
very high standards of performance and reliability.
zIt is the responsibility of the buyer or distributor of an AKM product who distributes,
disposes of, or otherwise places the product with a third party to notify that party in
advance of the above content and conditions, and the buyer or distributor agrees to
assume any and all responsibility and liability for and hold AKM harmless from any and
all claims arising from the use of said product in the absence of such notification.