Kemet C1812C106K4R2C7168 Kps series, x7r dielectric, 10 - 250 vdc (commercial grade) Datasheet

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Overview
KEMET Power Solutions (KPS) Commercial Series stacked
capacitors utilize a proprietary lead-frame technology
to vertically stack one or two multilayer ceramic chip
capacitors into a single compact surface mount package.
The attached lead-frame mechanically isolates the
capacitor/s from the printed circuit board, therefore offering
advanced mechanical and thermal stress performance.
Isolation also addresses concerns for audible, microphonic
noise that may occur when a bias voltage is applied. A
two chip stack offers up to double the capacitance in
the same or smaller design footprint when compared to
traditional surface mount MLCCs devices. Providing up
to 10 mm of board flex capability, KPS Series capacitors
are environmentally friendly and in compliance with RoHS
legislation. Available in X7R dielectric, these devices are
capable of Pb-Free reflow profiles and provide lower ESR, ESL
and higher ripple current capability when compared to other
dielectric solutions.
Combined with the stability of an X7R dielectric, KEMET’s
KPS Series devices exhibit a predictable change in
capacitance with respect to time and voltage and boast a
minimal change in capacitance with reference to ambient
temperature. Capacitance change is limited to ±15% from
−55°C to +125°C.
Benefits
•
•
•
•
•
•
•
•
−55°C to +125°C operating temperature range
Reliable and robust termination system
EIA 1210, 1812, and 2220 case sizes
DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V,
and 250 V
Capacitance offerings ranging from 0.1 μF up to 47 μF
Available capacitance tolerances of ±10% and ±20%
Higher capacitance in the same footprint
Potential board space savings
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Ordering Information
C
Ceramic
2220
C
Case Size Specification/
(L" x W")
Series
1210
1812
2220
C = Standard
106
M
5
R
2
Rated
Capacitance Capacitance
Voltage Dielectric Failure Rate/Design
1
Code (pF)
Tolerance
(VDC)
Two
significant
digits +
number of
zeros
K = ±10%
M = ±20%
8 = 10
4 = 16
3 = 25
5 = 50
1 = 100
A = 250
R = X7R
1 = KPS Single
Chip Stack
2 = KPS Double
Chip Stack
C
7186
Leadframe Finish2
Packaging/
Grade
(C-Spec)
C = 100% Matte Sn
See
“Packaging
C-Spec
Ordering
Options Table”
below
Double chip stacks ("2" in the 13th character position of the ordering code) are only available in M (±20%) capacitance tolerance. Single chip stacks
("1" in the 13th character position of the ordering code) are available in K (±10%) or M (±20%) tolerances.
2
Additional leadframe finish options may be available. Contact KEMET for details.
1
One world. One KEMET
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Packaging C-Spec Ordering Options Table
1
Packaging Type1
Packaging/Grade
Ordering Code (C-Spec)2
7" Reel (Embossed Plastic Tape)/Unmarked
7186
13" Reel (Embossed Plastic Tape)/Unmarked
7289
The terms "Marked" and "Unmarked" pertain to laser marking option of capacitors. All packaging options labeled as "Unmarked" will contain capacitors
that have not been laser marked. The option to laser mark is not available on these devices. For more information see "Capacitor Marking".
Benefits cont'd
• Advanced protection against thermal
and mechanical stress
• Provides up to 10 mm of board flex capability
• Reduces audible, microphonic noise
• Extremely low ESR and ESL
•
•
•
•
Lead (Pb)-free, RoHS and REACH compliant
Capable of Pb-free reflow profiles
Non-polar device, minimizing installation concerns
Tantalum and electrolytic alternative
Applications
Typical applications include smoothing circuits, DC/DC converters, power supplies (input/output filters), noise reduction
(piezoelectric/mechanical), circuits with a direct battery or power source connection, critical and safety relevant circuits
without (integrated) current limitation and any application that is subject to high levels of board flexure or temperature
cycling. Markets include industrial, military, automotive and telecom.
Qualification/Certification
Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are
referenced in Table 4, Performance & Reliability.
Environmental Compliance
Lead (Pb)-free, RoHS, and REACH compliant without exemptions.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Dimensions
– Millimeters (Inches)
TOP VIEW
Single or Double Chip Stack
PROFILE VIEW
Double Chip Stack
Single Chip Stack
L
L
W
H
H
LW
Number
of Chips
EIA
Size Code
Metric
Size Code
1210
3225
1812
4532
2220
5650
1210
3225
1812
4532
2220
5650
Single
Double
LW
L Length
W Width
H Height
LW Lead Width
Mounting
Technique
3.50 (0.138)
±0.30 (.012)
5.00 (0.197)
±0.50 (.020)
6.00 (0.236)
±0.50 (.020)
3.50 (0.138)
±0.30 (0.012)
5.00 (0.197)
±0.50 (0.020)
6.00 (0.236)
±0.50 (.020)
2.60 (0.102)
±0.30 (.012)
3.50 (0.138)
±0.50 (.020)
5.00 (0.197)
±0.50 (.020)
2.60 (0.102)
±0.30 (.012)
3.50 (0.138)
±0.50 (0.020)
5.00 (0.197)
±0.50 (0.020)
3.35 (0.132)
±0.10 (.004)
2.65 (0.104)
±0.35 (0.014)
3.50 (0.138)
±0.30 (0.012)
6.15 (0.242)
±0.15 (0.006)
5.00 (0.197)
±0.50 (0.020)
5.00 (0.197)
±0.50 (0.020)
0.80 (0.032)
±0.15 (0.006)
1.10 (0.043)
±0.30 (0.012)
1.60 (0.063)
±0.30 (0.012)
0.80 (0.031)
±0.15 (0.006)
1.10 (0.043)
±0.30 (0.012)
1.60 (0.063)
±0.30 (0.012)
Solder Reflow
Only
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
−55°C to +125°C
Capacitance Change with Reference to
+25°C and 0 Vdc Applied (TCC)
±15%
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
3.0%
1
2
250% of rated voltage
(5±1 seconds and charge/discharge not exceeding 50mA)
Dissipation Factor (DF) Maximum Limit at 25°C
5%(10V), 3.5%(16V & 25V) and 2.5%(50V to 250V)
Insulation Resistance (IR) Minimum Limit at 25°C
See Insulation Resistance Limit Table
(Rated voltage applied for 120±5 seconds at 25°C)
3
4
Dielectric Withstanding Voltage (DWV)
Regarding Aging Rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part
number specific datasheet for referee time details.
2
DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the
capacitor.
3
Capacitance and dissipation factor (DF) measured under the following conditions:
1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF
120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF
4
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known
as Automatic Level Control (ALC). The ALC feature should be switched to "ON."
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Rated DC
Voltage
Dielectric
Capacitance
Value
Dissipation Factor
(Maximum %)
> 25
X7R
Capacitance
Shift
Insulation
Resistance
±20%
10% of Initial
Limit
3.0
16/25
All
5.0
< 16
7.5
Insulation Resistance Limit Table
EIA Case Size
1,000 Megohm
Microfarads or 100 GΩ
500 Megohm
Microfarads or 10 GΩ
1210
< 0.39 µF
≥ 0.39 µF
1812
< 2.2 µF
≥ 2.2 µF
2220
< 10 µF
≥ 10 µF
Electrical Characteristics
Z and ESR C2220C225MAR2C
Z and C1210C475M5R1C
ESR C1210C475M5R1C
Z and ESR
10
10
3
4
ESR
ESR
Z
10
10
2
10
10
10
10
10
2
1
Magnitude Ohms
Magnitude Ohms
10
Z
3
0
10
10
-1
10
-2
10
10
-3
10
0
10
2
10
4
10
6
10
8
10
10
1
0
-1
-2
-3
10
0
Frequency (Hz)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
10
2
10
4
10
6
10
8
10
10
Frequency (Hz)
C1020_X7R_KPS_SMD • 8/11/2016
4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Electrical Characteristics cont'd
ESR – 1812, .10 µF, 50 V X7R
Z and ESR C2220C476M3R2C
10
10
ESR
Z
10
10
C1812C104K5R2C (2 Chip Stack)
C1812C104K5R1C (1 Chip Stack)
2
1
0
ESR (Ohms)
Magnitude Ohms
10
ESR vs. Frequency
4
-2
0.1
10
10
-4
-6
10
0
10
2
10
4
10
6
10
8
10
0.01
1.E+03
10
Frequency (Hz)
Impedance – 1812, .10 µF, 50 V X7R
C1812C104K5R2C (2 Chip Stack)
1.E+08
C1210C224K5R2C (2 Chip Stack)
C1210C224K5R1C (1 Chip Stack)
1
ESR (Ohms)
100
Impedance (Ohms)
1.E+07
ESR vs. Frequency
10
C1812C104K5R1C (1 Chip Stack)
1000
1.E+05
1.E+06
Frequency (Hz)
ESR – 1210, .22 µF, 50 V X7R
Impedance vs. Frequency
10000
1.E+04
10
0.1
1
0.1
0.01
1.E+03
1.E+04
1.E+05
1.E+06
Frequency (Hz)
1.E+07
1.E+08
0.01
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
1.E+08
Frequency (Hz)
Impedance – 1210, .22 µF, 50 V X7R
Impedance vs. Frequency
1000
C1210C224K5R2C (2 Chip Stack)
C1210C224K5R1C (1 Chip Stack)
Impedance (Ohms)
100
10
1
0.1
0.01
1.E+03
1.E+04
1.E+05
1.E+06
Frequency (Hz)
1.E+07
1.E+08
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Electrical Characteristics cont'd
Microphonics – 2220, 22 µF, 50 V, X7R
Microphonics – 1210, 4.7 µF, 50 V, X7R
60
50
40
30
20
10
0
Sound Pressure (dB)
Sound Pressure (dB)
50
40
30
20
Standard SMD MLCC
KPS - 1 Chip Stack
0
5
Vp-p
10
15
0
Microphonics – 2220, 47 µF, 25 V, X7R
2
4
Vp-p
6
50
40
Sound Pressure (dB)
Sound Pressure (dB)
0
Microphonics – 1210, 22 µF, 25 V, X7R
50
40
30
30
20
20
Standard SMD MLCC
KPS - 2 Chip Stack
10
0
Standard SMD MLCC
KPS - 2 Chip Stack
10
0
5
10
Vp-p
15
Standard SMD MLCC
KPS - 2 Chip Stack
10
20
0
0
2
Vp-p
4
6
Competitive Comparision
Microphonics – 1210, 4.7 µF, 50 V, X7R
Ripple Current (Arms) 2220, 22 µF, 50 V
Absolute Temperature (C)
Sound Pressure (dB)
120
60
50
40
30
20
10
0
100
Competitor
KEMET - KPS
0
5
Vp-p
10
15
80
60
40
KEMET KPS, 2220, 22µF, 50V rated (2 Chip Stack)
20
0
Competitor 2220, 22µF, 50V rated (2 Chip Stack)
0
10
20
Ripple Current (Arms)
30
Note: Refer to Table 4 for test method.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Electrical Characteristics cont'd
Board Flex vs. Termination Type
Board Flex vs. Termination Type
Weibull
X7R 1210 10 uF – (22uF KPS Stacked)
2
Standard Termination
KPS – 2 Chip Stack
90
Standard Termination
KPS – 2 Chip Stack
90
80
70
60
50
40
Percent
80
70
60
50
40
Percent
Weibull
X7R 2220 22uF 25V – (47uF KPS Stacked)
2
30
20
30
20
10
10
2.0
1.5
1 .0
3 .0
4 .0
Board Flexure (mm)
1 .0
7. 0 8 .0 9.0 10 .0
6 .0
5.0
1.5
0
4.
0
0
5.
6.
0
0
0
7. 8 . 9.0 10 .0
Board Flexure to 10 mm
Weibull
X7R 1210 4.7 uF 50V
2
Weibull
X7R 1812 47uF 16V
90
90
80
70
60
50
40
30
80
70
60
50
40
Percent
Percent
3.
Board Flexure (mm)
Board Flexure to 10 mm
2
2.0
20
10
30
20
10
0
1.
1.
5
2.
0
0
3.
0
4.
Board Flexure (mm)
5.
0
6.
0
7.
0
8.
0
0 0
9. 10.
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
Board Flexure (mm)
10
C1020_X7R_KPS_SMD • 8/11/2016
7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Table 1 – Capacitance Range/Selection Waterfall (1210 – 2220 Case Sizes)
Case Size/Series
Capacitance
Cap
Code
C1210C
C1812C
8
4
3
5
1
A
4
3
5
1
A
4
3
5
1
A
Rated Voltage (VDC)
10
16
25
50
100
250
16
25
50
100
250
16
25
50
100
250
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
Capacitance Tolerance
0.10 µF
0.22 µF
0.47 µF
1.0 µF
2.2 µF
3.3 µF
4.7 µF
10 µF
15 µF
22 µF
104
224
474
105
225
335
475
106
156
226
0.10 µF
0.22 µF
0.47 µF
1.0 µF
2.2 µF
3.3 µF
4.7 µF
10 µF
22 µF
33 µF
47 µF
104
224
474
105
225
335
475
106
226
336
476
Capacitance
Cap
Code
C2220C
Voltage Code
K
K
K
K
K
K
K
K
K
K
M
M
M
M
M
M
M
M
M
M
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
M
M
M
M
M
M
M
M
M
M
M
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
Rated Voltage (VDC)
10
Voltage Code
8
Case Size/Series
Single Chip Stack
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
FV
Double Chip Stack
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
JP
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
FW
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
GR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
JR
16
25
50
100
250
16
25
50
100
250
16
25
50
100
250
4
3
5
1
A
4
3
5
1
A
4
3
5
1
A
C1210C
C1812C
C2220C
These products are protected under US Patent 8,331,078 other patents pending, and any foreign counterparts.
Table 2 – Chip Thickness/Tape & Reel Packaging Quantities
Paper Quantity
Plastic Quantity
Thickness
Code
Case
Size
Thickness ±
Range (mm)
7" Reel
13" Reel
7" Reel
13" Reel
FV
FW
GP
GR
JP
JR
1210
1210
1812
1812
2220
2220
3.35 ± 0.10
6.15 ± 0.15
2.65 ± 0.35
5.00 ± 0.50
3.50 ± 0.30
5.00 ± 0.50
0
0
0
0
0
0
0
0
0
0
0
0
600
300
500
400
300
200
2,000
1,000
2,000
1,700
1,300
800
Thickness
Code
Case
Size
Thickness ±
Range (mm)
7" Reel
13" Reel
7" Reel
13" Reel
Paper Quantity
Plastic Quantity
Package quantity based on finished chip thickness specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Table 3 – KPS Land Pattern Design Recommendations (mm)
V1
Median (Nominal) Land
Protrusion
EIA SIZE
CODE
METRIC
SIZE
CODE
C
Y
X
V1
V2
1210
3225
1.50
1.14
1.75
5.05
3.40
1812
4532
2.20
1.35
2.87
6.70
4.50
2220
5650
2.69
2.08
4.78
7.70
6.00
Y
Y
Image at right based on an EIA 1210 case size.
X
X
C
C
V2
Grid Placement Courtyard
Soldering Process
To prevent degradation of temperature cycling capability,
care must be taken to prevent solder from flowing into
the inner side of the lead frames (inner side of "J" lead in
contact with the circuit board).
After soldering, the capacitors should be air cooled to
room temperature before further processing. Forced air
cooling is not recommended.
Hand soldering should be performed with care due to the
difficulty in process control. If performed, care should be
taken to avoid contact of the soldering iron to the capacitor
body. The iron should be used to heat the solder pad,
applying solder between the pad and the lead, until reflow
occurs. Once reflow occurs, the iron should be removed
immediately. (Preheating is required when hand soldering to
avoid thermal shock.)
Profile Feature
SnPb Assembly Pb-Free Assembly
Preheat/Soak
Temperature Minimum (TSmin)
100°C
150°C
Temperature Maximum (TSmax)
150°C
200°C
Time (ts) from Tsmin to Tsmax)
60 – 120 seconds
60 – 120 seconds
Ramp-up Rate (TL to TP)
3°C/seconds maximum 3°C/seconds maximum
Liquidous Temperature (TL)
183°C
217°C
Time Above Liquidous (tL)
60 – 150 seconds
60 – 150 seconds
Peak Temperature (TP)
235°C
250°C
Time within 5°C of Maximum
Peak Temperature (tP)
20 seconds maximum
10 seconds maximum
Ramp-down Rate (TP to TL)
Time 25°C to Peak
Temperature
6°C/seconds maximum 6°C/seconds maximum
6 minutes maximum
8 minutes maximum
Note: All temperatures refer to the center of the package, measured on the
package body surface that is facing up during assembly reflow.
TP
TL
Temperature
KEMET’s KPS Series devices are compatible with IR
reflow techniques. Preheating of these components is
recommended to avoid extreme thermal stress. KEMET's
recommended profile conditions for IR reflow reflect the
profile conditions of the IPC/J–STD–020D standard for
moisture sensitivity testing.
tP
Maximum Ramp Up Rate = 3ºC/sec
Maximum Ramp Down Rate = 6ºC/sec
tL
Tsmax
Tsmin
25
ts
25ºC to Peak
Time
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Reference
Test or Inspection Method
Terminal Strength
JIS–C–6429
Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Board Flex
JIS–C–6429
Appendix 2, Note: 5.0 mm minimum
Magnification 50 X. Conditions:
Solderability
J–STD–002
a) Method B, 4 hours at 155°C, dry heat at 235°C
b) Method B at 215°C category 3
c) Method D, category 3 at 250°C
Temperature Cycling
JESD22 Method JA–104
Biased Humidity
MIL–STD–202 Method
103
Moisture Resistance
Thermal Shock
High Temperature Life
Storage Life
Vibration
Mechanical Shock
Resistance to Solvents
MIL–STD–202 Method
106
MIL–STD–202 Method
107
MIL–STD–202 Method
108
MIL–STD–202 Method
108
MIL–STD–202 Method
204
MIL–STD–202 Method
213
MIL–STD–202 Method
215
1,000 cycles (−55°C to +125°C). Measurement at 24 hours +/− 4 hours after test conclusion.
Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor.
Measurement at 24 hours +/− 4 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours +/− 4 hours after test conclusion.
t = 24 hours/cycle. Steps 7a and 7b not required.
Measurement at 24 hours +/− 4 hours after test conclusion.
−55°C/+125°C. Note: Number of cycles required – 300. Maximum transfer time – 20
seconds. Dwell time – 15 minutes. Air-Air.
1,000 hours at 125°C with 1.5X rated voltage applied.
150°C, 0 VDC for 1,000 hours.
5 g's for 20 minutes, 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB .031" thick,
7 secure points on one long side and 2 secure points at corners of opposite sides. Parts
mounted within 2" from any secure point. Test from 10 – 2,000 Hz.
Figure 1 of Method 213, Condition F.
Add aqueous wash chemical, OKEM Clean or equivalent.
Storage & Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in
other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres,
and long term storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp
and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum
storage humidity not exceed 70% relative humidity. Temperature fluctuations should be minimized to avoid condensation on
the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock
should be used promptly, preferably within 1.5 years of receipt.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Construction (Typical)
Detailed Cross Section
Dielectric Material
(BaTiO3)
Leadframe
(Phosphor Bronze - Alloy 510)
Leadframe Attach
(High Melting Point Solder)
Inner Electrodes
(Ni)
End Termination/
External Electrode
(Cu)
Barrier Layer
(Ni)
Dielectric Material
(BaTiO3)
Termination Finish
(Sn)
Termination Finish
(Sn)
Inner Electrodes
Barrier Layer
(Ni)
(Ni)
End Termination/
External Electrode
(Cu)
Product Marking
Laser marking option is not available on:
•
•
•
•
C0G, Ultra Stable X8R and Y5V dielectric devices
EIA 0402 case size devices
EIA 0603 case size devices with Flexible Termination option.
KPS Commercial and Automotive grade stacked devices.
These capacitors are supplied unmarked only.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with
EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for
details on reeling quantities for commercial chips.
Table 5 – Carrier Tape Configuration – Embossed Plastic (mm)
EIA Case Size
Tape Size (W)*
Pitch (P1)*
01005 – 0402
8
2
0603 – 1210
8
4
1805 – 1808
12
4
≥ 1812
12
8
KPS 1210
12
8
KPS 1812 & 2220
16
12
Array 0508 & 0612
8
4
*Refer to Figure 1 for W and P1 carrier tape reference locations.
*Refer to Table 5 for tolerance specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
P2
T
T2
ØDo
Po
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
E1
Ao
F
Ko
B1
Bo
S1
W
E2
P1
T1
Center Lines of Cavity
ØD
Cover Tape
B 1 is for tape feeder reference only,
including draft concentric about B
o.
Embossment
For cavity size,
see Note 1 Table 4
1
User Direction of Unreeling
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
8 mm
12 mm
1.5+0.10/0.0−0.0
(0.059+0.004/−0.0)
16 mm
D1 Minimum
Note 1
1.0
(0.039)
1.5
(0.059)
E1
P0
P2
1.75±0.10
4.0±0.10
2.0±0.05
(0.069±0.004) (0.157±0.004) (0.079±0.002)
R Reference
Note 2
25.0
(0.984)
30
(1.181)
S1 Minimum
Note 3
T
Maximum
T1
Maximim
0.600
(0.024)
0.600
(0.024)
0.100
(0.004)
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8 mm
Single (4 mm)
12 mm
Single (4 mm) &
Double (8 mm)
16 mm
Triple (12 mm)
B1 Maximum
E2 Minimum
Note 4
4.35
6.25
(0.171)
(0.246)
8.2
10.25
(0.323)
(0.404)
12.1
14.25
(0.476)
(0.561)
F
P1
3.5±0.05
4.0±0.10
(0.138±0.002) (0.157±0.004)
5.5±0.05
8.0±0.10
(0.217±0.002) (0.315±0.004)
7.5±0.05
12.0±0.10
(0.138±0.002) (0.157±0.004)
T2
Maximum
2.5
(0.098)
4.6
(0.181)
4.6
(0.181)
W
Maximum
8.3
(0.327)
12.3
(0.484)
16.3
(0.642)
A0 , B 0 & K0
Note 5
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment
location and hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 5).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 2).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see
Figure 3).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
Peel Strength
8 mm
0.1 to 1.0 Newton (10 to 100 gf)
12 and 16 mm
0.1 to 1.3 Newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be
165° to 180° from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of
300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 2 – Maximum Component Rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Maximum
Width (mm) Rotation (
8,12
20
16 – 200
10
Bo
°
T)
Typical Component Centerline
Ao
Figure 3 – Maximum Lateral Movement
8 mm & 12 mm Tape
0.5 mm maximum
0.5 mm maximum
°
s
Tape
Width (mm)
8,12
16 – 56
72 – 200
Maximum
Rotation (
20
10
5
Figure 4 – Bending Radius
Embossed
Carrier
16 mm Tape
°
S)
Punched
Carrier
1.0 mm maximum
1.0 mm maximum
R
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
Bending
Radius
R
C1020_X7R_KPS_SMD • 8/11/2016
14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Figure 5 – Reel Dimensions
Full Radius,
See Note
W3
(Includes
flange distortion
at outer edge)
Access Hole at
Slot Location
(Ø 40 mm minimum)
W2
D
A
(See Note)
N
C
(Arbor hole
diameter)
B
(see Note)
(Measured at hub)
W1
(Measured at hub)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 7 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
A
B Minimum
C
D Minimum
8 mm
178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/-0.2
(0.521 +0.02/-0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size
N Minimum
W1
W2 Maximum
W3
50
(1.969)
8.4 +1.5/-0.0
(0.331 +0.059/-0.0)
12.4 +2.0/-0.0
(0.488 +0.078/-0.0)
16.4 +2.0/-0.0
(0.646 +0.078/-0.0)
14.4
(0.567)
18.4
(0.724)
22.4
(0.882)
Shall accommodate tape
width without interference
8 mm
12 mm
16 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
Figure 6 – Tape Leader & Trailer Dimensions
Embossed Carrier
Carrier Tape
Punched Carrier
8 mm & 12 mm only
END
Round Sprocket Holes
START
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
Trailer
160 mm Minimum
Components
100 mm
Minimum Leader
400 mm Minimum
Top Cover Tape
Figure 7 – Maximum Camber
Elongated sprocket holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm Maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
KPS Series, X7R Dielectric, 10 – 250 VDC (Commercial Grade)
KEMET Electronic Corporation Sales Offices
For a complete list of our global sales offices, please visit www.kemet.com/sales.
Disclaimer
All product specifications, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for
checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.
All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such
applications, but are not intended to constitute – and KEMET specifically disclaims – any warranty concerning suitability for a specific customer application or use.
The Information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. Any
technical advice inferred from this Information or otherwise provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no
obligation or liability for the advice given or results obtained.
Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component
failures may still occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards
(such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or
property damage.
Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other
measures may not be required.
KEMET is a registered trademark of KEMET Electronics Corporation.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1020_X7R_KPS_SMD • 8/11/2016
17
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