Infineon BGSX210MA18 Dp10t diversity cross switch for carrier aggregation Datasheet

BGSX210MA18
DP10T Diversity Cross Switch for Carrier Aggregation
Data Sheet
Revision 3.1 - 2016-11-03
Power Management & Multimarket
Edition 2016-11-03
Published by Infineon Technologies AG
81726 Munich, Germany
c 2016 Infineon Technologies AG
All Rights Reserved.
LEGAL DISCLAIMER
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.
With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding
the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon
Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used
in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such
components can reasonably be expected to cause the failure of that life-support device or system or to affect the
safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in
the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to
assume that the health of the user or other persons may be endangered.
BGSX210MA18
Revision History
Document No.: BGSX210MA18__v3.1.pdf
Revision History: Rev. v3.1
Previous Version: 3.0
Page
Subjects (major changes since last revision)
9
RF performance updated in Table 5
13
Application information updated in Table 12
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Data Sheet
3
Revision 3.1 - 2016-11-03
BGSX210MA18
Contents
1 Features
5
2 Product Description
5
3 Maximum Ratings
6
4 Operation Ranges
8
5 RF Characteristics
9
6 MIPI RFFE Specification
10
7 Application Information
13
8 Package Information
14
List of Figures
1
2
3
4
5
6
7
BGSX210MA18 Block diagram . . . . . . . . . . . . . .
BGSX210MA18 Application Schematic . . . . . . . . . .
BGSX210MA18 Pin Configuration (top view) . . . . . .
ATSLP-18 Package Outline (top, side and bottom views)
Land Pattern and Stencil Mask . . . . . . . . . . . . . .
Laser Marking (top view) . . . . . . . . . . . . . . . . . .
Carrier Tape . . . . . . . . . . . . . . . . . . . . . . . . .
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14
List of Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Maximum Ratings, Table I . . . . . . . . . . . . . . . .
Maximum Ratings, Table II . . . . . . . . . . . . . . . .
Operation Ranges . . . . . . . . . . . . . . . . . . . .
RF Input Power . . . . . . . . . . . . . . . . . . . . . .
RF Characteristics . . . . . . . . . . . . . . . . . . . .
MIPI Features . . . . . . . . . . . . . . . . . . . . . . .
Startup Behavior . . . . . . . . . . . . . . . . . . . . .
Register Mapping . . . . . . . . . . . . . . . . . . . . .
Truth Table, Switch A . . . . . . . . . . . . . . . . . . .
Truth Table, Switch B . . . . . . . . . . . . . . . . . . .
Truth Table, Cross Ports . . . . . . . . . . . . . . . . .
Bill of Materials for frequency range 2500 to 2700MHz
Bill of Materials for frequency range 3400 to 3800MHz
Pin Definition and Function . . . . . . . . . . . . . . .
Data Sheet
4
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Revision 3.1 - 2016-11-03
BGSX210MA18
BGSX210MA18 DP10T Diversity Cross Switch for Carrier Aggregation
1 Features
• RF CMOS DP10T diversity switch with power handling capability
of up to 27 dBm
• Industry’s first flexible carrier aggregation switch via cross switch
functionality of two ports
• Device configurations SP5T/SP5T, SP4T/SP6T, and SP6T/SP4T
featured via cross switch functionality
• Suitable for LTE carrier aggregation applications
• Ultra-low insertion loss and harmonics generation
• 0.1 to 3.8 GHz coverage
• High port-to-port-isolation
• No decoupling capacitors required if no DC applied on RF lines
• Integrated MIPI RFFE interface operating in 1.1 to 1.95 V voltage
range
• Software programmable MIPI RFFE USID
• Leadless and halogen free package ATSLP-18 with lateral size of
2.0 mm x 2.4 mm and thickness of 0.6 mm
• No power supply blocking required
• High EMI robustness
• RoHS and WEEE compliant package
2 Product Description
The BGSX210MA18 RF CMOS switch is specifically designed for LTE carrier aggregation applications. This DP10T
offers low insertion loss and low harmonic generation. In addition, two ports feature cross functionality enabling
higher flexibility for carrier aggregation applications.
The switch is controlled via a MIPI RFFE controller. The on-chip controller allows power-supply voltages from
1.1 to 1.95 V. The switch features direct-connect-to-battery functionality and DC-free RF ports. Unlike GaAs technology, external DC blocking capacitors at the RF Ports are only required if DC voltage is applied externally. The
BGSX210MA18 RF Switch is manufactured in Infineon’s patented MOS technology, offering the performance of
GaAs with the economy and integration of conventional CMOS including the inherent higher ESD robustness. The
device has a very small size of only 2.0 x 2.4 mm2 and a maximum thickness of 0.6 mm.
Data Sheet
5
Revision 3.1 - 2016-11-03
BGSX210MA18
ANT_A
ANT_B
SP5T/SP5T
TRXA1
TRXA2
TRXA3
TRXA4
TRXA5
TRXB1
TRXB2
TRXB3
TRXB4
TRXB5
SP5T
VDD
SP5T
VIO
MIPI-RFFE
ControlKInterface
GND
SCLK
SDATA
Figure 1: BGSX210MA18 Block diagram
3 Maximum Ratings
Table 1: Maximum Ratings, Table I at TA = 25 ◦C, unless otherwise specified
Parameter
Symbol
Min.
Values
Typ.
Max.
Unit
Note / Test Condition
Frequency Range
f
0.1
–
3.8
GHz
1)
Supply voltage
VDD
-0.5
–
3.6
V
–
C
–
C
–
Storage temperature range
TSTG
-55
–
150
◦
Junction temperature
Tj
–
–
125
◦
RF input power at all TRX
PRF
–
–
32
dBm
VESDHBM
-1
–
+1
kV
VESDANT
-8
–
+8
kV
CW
ports
ESD capability, HBM2)
3)
ESD capability, system level
ANT versus system GND,
with 27 nH shunt inductor
1) Switch
has no highpass response. There is also a DC connection between switched paths. The DC voltage at RF ports VRFDC has to be
0V.
2) ANSI/ESDA/JEDEC JS-001-2012 (R=1.5 kΩ, C=100 pF).
3) IEC 61000-4-2 (R=330 Ω, C=150 pF), contact discharge.
Data Sheet
6
Revision 3.1 - 2016-11-03
BGSX210MA18
Table 2: Maximum Ratings, Table II at TA = 25 ◦C, unless otherwise specified
Parameter
Maximum DC-voltage on RF-
Symbol
VRFDC
Values
Min.
Typ.
Max.
0
–
0
Unit
Note / Test Condition
V
No DC voltages allowed on
Ports and RF-Ground
RF-Ports
RFFE Supply Voltage
VIO
-0.5
–
RFFE Control Voltage Levels
VSCLK,
-0.7
–
VSDATA
3.6
V
–
VIO+0.7
V
–
(max.
3.6)
Data Sheet
7
Revision 3.1 - 2016-11-03
BGSX210MA18
4 Operation Ranges
Table 3: Operation Ranges
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
Typ.
Max.
VDD
2.5
–
3.4
V
–
Supply current
IDD
–
90
200
µA
–
Supply current in standby
IDD
–
0.5
1
µA
VIO=low or MIPI low-power
Supply voltage
2)
2)
mode
mode
RFFE supply voltage
VIO
1.1
1.8
1.95
V
–
VIH
0.7*VIO
–
VIO
V
–
RFFE input low voltage
VIL
0
–
0.3*VIO
V
–
RFFE output high voltage1)
VOH
0.8*VIO
–
VIO
V
–
RFFE output low voltage
VOL
0
–
0.2*VIO
V
–
RFFE control input capaci-
CCtrl
–
–
2
pF
–
IVIO
–
15
–
µA
Idle State
85
◦
–
1)
RFFE input high voltage
1)
1)
tance
RFFE supply current
Ambient temperature
TA
-30
25
C
1) SCLK
and SDATA
2) T = −30 ◦C ... 85 ◦C, V
A
DD = 2.5 ... 3.4 V
Table 4: RF Input Power
Parameter
TRX ports (50 Ω)
Data Sheet
Symbol
PRF
Values
Min.
Typ.
Max.
–
–
27
8
Unit
Note / Test Condition
dBm
–
Revision 3.1 - 2016-11-03
BGSX210MA18
5 RF Characteristics
Table 5: RF Characteristics at TA = −30 ◦C...85 ◦C, PIN = 0 dBm, Supply Voltage VDD= 2.5 V...3.4 V, unless
otherwise specified
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
Typ.
Max.
–
0.30
0.45
dB
100 to 960MHz
–
0.45
0.75
dB
960 to 2170MHz
–
0.65
0.90
dB
2170 to 2700MHz2)
–
0.90
1.35
dB
3400 to 3800MHz3)
–
0.30
0.50
dB
100 to 960MHz
–
0.45
0.85
dB
960 to 2170MHz
–
0.65
1.00
dB
2170 to 2700MHz2)
–
0.90
1.45
dB
3400 to 3800MHz3)
17
24
–
dB
100 to 960MHz
14
21
–
dB
960 to 2170MHz
12
16
–
dB
2170 to 2700MHz2)
10
15
–
dB
3400 to 3800MHz3)
26
36
–
dB
100 to 960MHz
19
26
–
dB
960 to 2170MHz
16
21
–
dB
2170 to 2700MHz
38
48
–
dB
100 to 960MHz
31
41
–
dB
960 to 2170MHz
29
39
–
dB
2170 to 2700MHz
Insertion Loss1)
All TRX ports
IL
Insertion Loss
All TRX ports
IL
Return Loss
All TRX ports
RL
Isolation
Adjacent TRX ports A-A/B-B
Opposite TRX ports A-B/B-A
ISO
ISO
Harmonic Generation4)
All TRX ports, H2
PHarm
80
90
–
dBc
25 dBm, 50 Ω, CW mode
All TRX ports, H3
PHarm
80
90
–
dBc
25 dBm, 50 Ω, CW mode
1) 4)
Intermodulation Distortion in Rx Band
◦
(TA = 25 C, VDD= 3.0 V)
IMD2, low
IMD2low
–
-105
-100
dBm
IMD3
IMD3
–
-115
-110
dBm
IMD2, high
IMD2high
–
-105
-100
dBm
tINT
–
1.5
3
µs
tPUP
–
10
25
µs
Tx = 20 dBm,
Interferer = −15 dBm, 50 Ω
Switching Time
MIPI to RF time1)
1)
Power up settling time
50 % last SCLK falling edge to
90 % ON
After power down mode
at 25◦C.
2) On application board with application circuit according to Fig. 2 and Tab. 12.
3) On application board with application circuit according to Fig. 2 and Tab. 13.
4) Measured at Band 5.
1) Measured
Data Sheet
9
Revision 3.1 - 2016-11-03
BGSX210MA18
6 MIPI RFFE Specification
All sequences are implemented according to the ’MIPI Alliance Specification for RF Front-End Control Interface’
document version 1.10 - 26. July 2011.
Table 6: MIPI Features
Feature
Supported
Comment
Register write command sequence
Yes
Register read command sequence
Yes
Extended register write command sequence
No
Up to 4 Bytes
Extented register read command sequence
No
Up to 4 Bytes
Register 0 write command sequence
Yes
Trigger function
Yes
Programmable USID
Yes
3 register command sequence
Status Register
Yes
Register for debugging
Reset
Yes
By VIO, Power Mode and RFFE_STATUS
Group SID
Yes
USID_Sel pin
No
Full speed write
Yes
Half speed read
Yes
Full speed read
Yes
Trigger assignment to each control register is supported
External pin for changing USID is not implemented
Table 7: Startup Behavior
Feature
State
Comment
Power status
LOW POWER
The chip is in low power mode after startup
Trigger function
ENABLED
Trigger function is enabled after startup. Trigger function can be disabled via PM_TRIG register.
Table 8: Register Mapping
Register
Address
0x0000
0x0001
0x001D
Register Name
Function
Description
REGISTER_0
REGISTER_1
PRODUCT_ID
Data
Bits
7:0
7:0
7:0
MODE_CTRL
MODE_CTRL
PRODUCT_ID
MANUFACTURER_ID
7:0
MANUFACTURER_ID [7:0]
Switch control
Switch control
This is a read-only register. However,
during the programming of the USID
a write command sequence is performed on this register, even though
the write does not change its value.
This is a read-only register. However,
during the programming of the USID,
a write command sequence is performed on this register, even though
the write does not change its value.
0x001E
Default
00000000
00000000
11100000
00011010
Broadcast_ID
Support
No
No
No
No
Trigger
Support
Yes
Yes
No
No
R/W
R/W
R/W
R
R
Continued on next page
Data Sheet
10
Revision 3.1 - 2016-11-03
BGSX210MA18
Table 8: Register Mapping – Continued from previous page
Register
Address
0x001C
0x001F
0x001A
Register Name
PM_TRIG
MAN_USID
RFFE_STATUS
Data
Bits
7:6
00: Normal operation
01: Default settings (STARTUP)
10: Low power (LOW POWER)
11: Reserved
If this bit is set, trigger 2 is disabled.
When all triggers disabled, if writing to
a register that is associated to trigger
2, the data goes directly to the destination register.
If this bit is set, trigger 1 is disabled.
When all triggers disabled, if writing to
a register that is associated to trigger
1, the data goes directly to the destination register.
If this bit is set, trigger 0 is disabled.
When all triggers disabled, if writing to
a register that is associated to trigger
0, the data goes directly to the destination register.
A write of a one to this bit loads trigger
2’s registers.
A write of a one to this bit loads trigger
1’s registers.
A write of a one to this bit loads trigger
0’s registers.
These are read-only bits that are reserved and yield a value of 0b00 at
readback.
These bits are read-only. However,
during the programming of the USID,
a write command sequence is performed on this register even though
the write does not change its value.
Programmable USID. Performing a
write to this register using the described programming sequences will
program the USID in devices supporting this feature. These bits store the
USID of the device.
0: Normal operation
1: Software reset
Command sequence received with
parity error - discard command.
Command length error
Address frame parity error = 1
4
TRIGGER_MASK_1
3
TRIGGER_MASK_0
2
TRIGGER_2
1
TRIGGER_1
0
TRIGGER_0
7:6
SPARE
5:4
MANUFACTURER_ID [9:8]
3:0
USID
7
SOFTWARE RESET
6
COMMAND_FRAME_
PARITY_ERR
COMMAND_LENGTH_ERR
ADDRESS_FRAME_
PARITY_ERR
DATA_FRAME_
PARITY_ERR
READ_UNUSED_REG
WRITE_UNUSED_REG
BID_GID_ERR
2
1
0
Data Sheet
PWR_MODE
TRIGGER_MASK_2
3
GROUP_SID
Description
5
5
4
0x001B
Function
7:4
3:0
RESERVED
GROUP_SID
Default
10
R/W
R/W
No
No
0
No
No
0
No
No
0
Yes
No
0
Yes
No
0
Yes
No
00
No
No
R/W
0
No
No
R/W
0
No
No
R
No
No
R/W
R/W
01
1010
0
0
0
Read command to an invalid address
Write command to an invalid address
Read command with a BROADCAST_ID or GROUP_SID
0
0
0
11
Trigger
Support
No
0
Data frame with parity error
Group slave ID
Broadcast_ID
Support
Yes
0
0
Revision 3.1 - 2016-11-03
BGSX210MA18
Table 9: Modes of Operation (Truth Table, Switch A)
State
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17-26
Mode
All Isolation
TRXA1
TRXA2
TRXA3
TRXA4
TRXA5
TRXA5+TRXA4
TRXA5+TRXA3
TRXA5+TRXA2
TRXA5+TRXA1
TRXA4+TRXA3
TRXA4+TRXA2
TRXA4+TRXA1
TRXA3+TRXA2
TRXA3+TRXA1
TRXA2+TRXA1
All Isolation
D7
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
D6
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
D5
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
REGISTER_1 Bits
D4
D3
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
0x16 - 0x1F
D2
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
D1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
0
0
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
REGISTER_0 Bits
D4
D3
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
0x16 - 0x1F
D2
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
D1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
0
0
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D2
x
x
D1
x
1
D0
1
x
Table 10: Modes of Operation (Truth Table, Switch B)
State
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43-52
Mode
All Isolation
TRXB1
TRXB2
TRXB3
TRXB4
TRXB5
TRXB5+TRXB4
TRXB5+TRXB3
TRXB5+TRXB2
TRXB5+TRXB1
TRXB4+TRXB3
TRXB4+TRXB2
TRXB4+TRXB1
TRXB3+TRXB2
TRXB3+TRXB1
TRXB2+TRXB1
All Isolation
D7
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
D6
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
D5
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Table 11: Modes of Operation (Truth Table, Cross Ports)
State
53
54
Data Sheet
Mode
ANT_A-TRXB1
ANT_B-TRXA5
D7
x
x
D6
x
x
REGISTER_2 Bits
D4
D3
x
x
x
x
D5
x
x
12
Revision 3.1 - 2016-11-03
BGSX210MA18
7 Application Information
Application Board Configuration
ANT_A
ANT_B
N1
SP5T/SP5T
L1
TRXA1
L3
C1
TRXB1
C3
TRXA2
TRXA3
TRXA4
TRXA5
TRXB2
TRXB3
TRXB4
TRXB5
L2
C2
SP5T
SP5T
VDD=3.0V
SCLK
SDATA
MIPI2RFFE
Control_Interface
GND
C4
roptional
VIO=1.8V
C5
roptional
Figure 2: BGSX210MA18 Application Schematic
Table 12: Bill of Materials Table for frequency range 2500 to 2700MHz
Name
Value
Package
Manufacturer
Function
C1=C2=C3
0.8 pF
0402
Various
Impedance Matching
C4=C5 (optional)
1 nF
0402
Various
Impedance Matching
L1=L2=L3
2.1 nH
0402
Various
Impedance Matching
N1
BGSX210MA18
ATSLP-18
Infineon
RF CMOS Switch
Table 13: Bill of Materials Table for frequency range 3400 to 3800MHz
Name
Value
Package
Manufacturer
Function
C1=C2=C3
0.8 pF
0402
Various
Impedance Matching
C4=C5 (optional)
1 nF
0402
Various
Impedance Matching
L1=L2=L3
1 nH
0402
Various
Impedance Matching
N1
BGSX210MA18
ATSLP-18
Infineon
RF CMOS Switch
Data Sheet
13
Revision 3.1 - 2016-11-03
BGSX210MA18
8 Package Information
4
NC
5
TRXA1
TRXB5
16
15
19
GND
6
7
8
9
SCLK
3
ANT_A
TRXB4
17
SDATA
2
ANT_B
TRXB3
18
VIO
1
VDD
TRXB2
TRXB1
Pin Configuration and Function
14
TRXA2
13
TRXA3
12
TRXA4
11
TRXA5
10
NC
Figure 3: BGSX210MA18 Pin Configuration (top view)
Table 14: Pin Definition and Function
Pin No.
Name
Function
1
TRXB2
TRX port B2
2
TRXB3
TRX port B3
3
TRXB4
TRX port B4
4
TRXB5
TRX port B5
5
NC
Not connected
6
VDD
Power supply
7
VIO
MIPI RFFE power supply
8
SDATA
MIPI RFFE data
9
SCLK
MIPI RFFE clock
10
NC
Not connected
11
TRXA5
TRX port A5
12
TRXA4
TRX port A4
13
TRXA3
TRX port A3
14
TRXA2
TRX port A2
15
TRXA1
TRX port A1
16
ANT_A
Antenna port A
17
ANT_B
Antenna port B
18
TRXB1
TRX port B1
19
GND
RF ground
Data Sheet
14
Revision 3.1 - 2016-11-03
BGSX210MA18
Bottom±view
10 11
12
0.1 A
0.2 ±0.05
18x
13
0.4
2.4 ±0.05
5±x± 0.4± =± 2
0.2 ±0.05
18x
14
9
15
8
16
7
17
18
6
5
B
4
3
2
0.1 A
0.1 B
0.02±MAX.
STANDOFF
2 ±0.05
A
0.7 ±0.05
0.1 B
0.6 ±0.05
0.5 ±0.05
Top±view
1
0.4
Pin±1±marking
4±x± 0.4± =± 1.6
Figure 4: ATSLP-18 Package Outline (top, side and bottom views)
0.8
18xd0.25
0.8
1
0.45
1
0.5
0.4
18xd0.25
18xd0.25
0.4
18xd0.25
0.4
0.4
0.7
Copper
0.65
Optionaldsolderdmaskddam
(stencildthicknessdmax.d100dµm)
Stencildapertures
Solderdmask
Figure 5: Land Pattern and Stencil Mask
Data Sheet
15
Revision 3.1 - 2016-11-03
BGSX210MA18
12
Type code
Date code
(YW)
Pin 1 marking
Figure 6: Laser Marking (top view)
4
8
2.6
Pin 1
marking
0.75
2.2
Figure 7: Carrier Tape
Data Sheet
16
Revision 3.1 - 2016-11-03
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Published by Infineon Technologies AG