DM54180/DM74180 9-Bit Parity Generators/Checkers General Description These universal 9-bit (8 data bits plus 1 parity bit) parity generators/checkers feature odd/even outputs and control inputs to facilitate operation in either odd or even parity applications. Depending on whether even or odd parity is being generated or checked, the even or odd input can be utilized as the parity or 9th-bit input. The word-length capability is easily expanded by cascading. Input buffers are provided so that each data input represents only one normalized series 54/74 load. A full fan-out to 10 normalized series 54/74 loads is available from each of the outputs at a low logic level. A fan-out to 20 normalized loads is provided at a high logic level to facilitate the connection of unused inputs to used inputs. Connection Diagram Dual-In-Line Package TL/F/6559 – 1 Order Number DM54180J, DM54180W or DM74180N See NS Package Number J14A, N14A or W14B Function Table Inputs R of H’s at A thru H Even Outputs Odd R Even R Odd Even H L H L Odd H L L H Even L H L H Odd L H H L X H H L L X L L H H H e High Level, L e Low Level, X e Don’t Care C1995 National Semiconductor Corporation TL/F/6559 RRD-B30M105/Printed in U. S. A. DM54180/DM74180 9-Bit Parity Generators/Checkers June 1989 Absolute Maximum Ratings (Note) Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range b 55§ C to a 125§ C DM54 DM74 0§ C to a 70§ C b 65§ C to a 150§ C Storage Temperature Range Recommended Operating Conditions Symbol DM54180 Parameter DM74180 Units Min Nom Max Min Nom Max 4.5 5 5.5 4.75 5 5.25 V 0.8 0.8 V VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage IOH High Level Output Current b 0.8 b 0.8 mA IOL Low Level Output Current 16 16 mA TA Free Air Operating Temperature 70 §C 2 2 b 55 125 V 0 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI Parameter Conditions Min Typ (Note 1) Max Units b 1.5 V Input Clamp Voltage VCC e Min, II e b12 mA VOH High Level Output Voltage VCC e Min, IOH e Max VIL e Max, VIH e Min VOL Low Level Output Voltage VCC e Min, IOL e Max VIH e Min, VIL e Max II Input Current @ Max Input Voltage VCC e Max, VI e 5.5V IIH High Level Input Current VCC e Max VI e 2.4V Odd or Even 80 Data 40 Low Level Input Current VCC e Max VI e 0.4V Odd or Even b 3.2 Data b 1.6 Short Circuit Output Current VCC e Max (Note 2) DM54 b 20 b 55 DM74 b 18 b 55 Supply Current VCC e Max (Note 3) DM54 34 49 DM74 34 56 IIL IOS ICC Note 1: All typicals are at VCC e 5V, TA e 25§ C. Note 2: Not more than one output should be shorted at a time. Note 3: ICC is measured with EVEN and ODD inputs at 4.5V, all other inputs and outputs open. 2 2.4 V 0.4 V 1 mA mA mA mA mA Switching Characteristics at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load) Parameter From (Input) To (Output) tPLH Propagation Delay Time Low to High Level Output Data to R Even tPHL Propagation Delay Time High to Low Level Output Data to R Even tPLH Propagation Delay Time Low to High Level Output tPHL Symbol Conditions Max Units 60 ns 68 ns Data to R Odd 48 ns Propagation Delay Time High to Low Level Output Data to R Odd 38 ns tPLH Propagation Delay Time Low to High Level Output Data to R Even 48 ns tPHL Propagation Delay Time High to Low Level Output Data to R Even 38 ns tPLH Propagation Delay Time Low to High Level Output Data to R Odd 60 ns tPHL Propagation Delay Time High to Low Level Output Data to R Odd 68 ns tPLH Propagation Delay Time Low to High Level Output Even or Odd to R Even or R Odd 20 ns tPHL Propagation Delay Time High to Low Level Output Even or Odd to R Even or R Odd 10 ns CL e 15 pF RL e 400X Odd Input Low CL e 15 pF RL e 400X Odd Input High CL e 15 pF RL e 400X Min Logic Diagram TL/F/6559 – 2 3 4 Physical Dimensions inches (millimeters) 14-Lead Ceramic Dual-In-Line Package (J) Order Number DM54180J NS Package Number J14A 14-Lead Molded Dual-In-Line Package (N) Order Number DM74180N NS Package Number N14A 5 DM54180/DM74180 9-Bit Parity Generators/Checkers Physical Dimensions inches (millimeters) 14-Lead Ceramic Flat Package (W) Order Number DM54180W NS Package Number W14B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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