CD74FCT240AT and CD74FCT244AT were not acquired from Harris Semiconductor. Data sheet acquired from Harris Semiconductor SCHS270A CD54/74FCT240, CD54/74FCT240AT, CD54/74FCT241, CD54/74FCT244, CD54/74FCT244AT FCT Interface Logic Octal Buffers/Line Drivers, Three-State February 1996 Features Description • CD54/74FCT240, CD54/74FCT240AT - Inverting The CD54/74FCT240, 240AT, 241, 244 and 244AT threestate octal buffers/line drivers use a small-geometry BiCMOS technology. The output stage is a combination of bipolar and CMOS transistors that limits the output-HIGH level to two diode drops below VCC. This resultant lowering of output swing (0V to 3.7V) reduces power bus ringing (a source of EMI) and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 48mA to 64mA. • CD54/74FCT241, CD54/74FCT244, CD54/74FCT244AT Non-Inverting • Buffered Inputs • Typical Propagation Delay: 4.1ns at VCC = 5V, TA = 25oC (FCT240AT, FCT244AT) • SCR-Latchup-Resistant BiCMOS Process and Circuit Design The CD54/74FCT240, 240AT, 244 and 244AT have activeLOW output enables (1OE, 2OE). The CD54/74FCT241 and CD54/74FCT241AT have one active-LOW (1OE) and one active-HIGH (2OE) output enable. • FCTXXX Types - Speed of Bipolar FAST®/AS/S; FCTXXXAT Types - 30% Faster Than FAST/AS/S with Significantly Reduced Power Consumption • 48mA to 64mA Output Sink Current (Commercial/Extended Industrial) Functional Diagram • Output Voltage Swing Limited to 3.7V at VCC = 5V 1A0 1A1 1A2 1A3 2A0 2A1 2A2 2A3 240, 244 241 1OE 1OE • Controlled Output-Edge Rates • Input/Output Isolation to VCC • BiCMOS Technology with Low Quiescent Power Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE 2OE 2 4 6 8 11 13 15 17 18 16 14 12 9 7 5 3 1 19 241, 244 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 240 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 VCC = 20 GND = 10 2OE CD54/74FCT240E -55 to 125, 0 to 70 20 Ld PDIP CD54/74FCT240ATE -55 to 125, 0 to 70 20 Ld PDIP INPUT INPUT CD54/74FCT241E -55 to 125, 0 to 70 20 Ld PDIP 1OE, 20E A Y CD54/74FCT244E -55 to 125, 0 to 70 20 Ld PDIP L L H CD54/74FCT244ATE -55 to 125, 0 to 70 20 Ld PDIP L H L H X Z CD54/74FCT240M -55 to 125, 0 to 70 20 Ld SOIC CD54/74FCT240ATM -55 to 125, 0 to 70 20 Ld SOIC CD54/74FCT241M -55 to 125, 0 to 70 20 Ld SOIC CD54/74FCT244M -55 to 125, 0 to 70 20 Ld SOIC CD54/74FCT244ATM -55 to 125, 0 to 70 20 Ld SOIC CD54/74FCT240SM -55 to 125, 0 to 70 20 Ld SSOP CD54/74FCT241SM -55 to 125, 0 to 70 20 Ld SSOP CD54/74FCT244SM -55 to 125, 0 to 70 20 Ld SSOP CD54/74FCT240, CD54/74FCT240AT TRUTH TABLE OUTPUT CD54/74FCT244, CD54/74FCT244AT TRUTH TABLE INPUT INPUT OUTPUT 1OE, 2OE A Y L L H L H L H X Z CD54/74FCT241 TRUTH TABLE INPUT OUTPUT CD54FCT240H -55 to 125 1OE CD54FCT241H -55 to 125 L L CD54FCT244H -55 to 125 L H H X Z NOTE: 1A 1Y INPUT OUTPUT 2OE 2A 2Y L L X Z H H L L H H H H = High Voltage Level, L = LOW Voltage Level X = Immaterial, Z = HIGH Impedance FAST® is a registered trademark of Fairchild Semiconductor Corporation. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1996 1 File Number 2227.3 CD54/74FCT540, CD54/74FCT540AT, CD54/74FCT241, CD54/74FCT244, CD54/74FCT244AT Switching Specifications FCT Series tr, tf = 2.5ns, CL = 50pF, RL - See Figure 2 +25o C PARAMETER SYMBOL 0oC to +70oC -55oC to +125oC +25o C 0oC to +70oC -55oC to +125oC VCC (V) TYP MIN MAX MIN MAX TYP MIN MAX MIN MAX UNITS Propagation Delays Data to Outputs Output Enable Times Output Disable Times Power Dissipation Capacitance FCT240/AT tPLH , tPHL 5† 5 1.5 8 1.5 9 4.4 1.5 5.6 1.5 6.7 ns FCT241 tPLH , tPHL 5 4 1.5 6.5 1.5 7 - - - - - ns FCT244/AT tPLH , tPHL 5 4.5 1.5 6.5 1.5 7 3.8 1.5 5.3 1.5 6.2 µs FCT240/AT tPZL , tPZH 5 7 1.5 10 1.5 10.5 4.7 1.5 6.2 1.5 7.7 µs FCT241 tPZL , tPZH 5 5.5 1.5 8 1.5 8.5 - - - - - ns FCT244/AT tPZL , tPZH 5 6 1.5 8 1.5 8.5 4.8 1.5 6.5 1.5 7.8 ns FCT240/AT tPLZ , tPHZ 5 6 1.5 9.5 1.5 10 4 1.5 5.6 1.5 6.5 µs FCT241 tPLZ , tPHZ 5 4.5 1.5 7 1.5 7.5 - - - - - ns FCT244/AT tPLZ , tPHZ 5 5 1.5 7 1.5 7.5 4.5 1.5 5.8 1.5 6.8 µs FCT240/AT CPD § - 38 Typical 38 Typical pF FCT241 CPD § - 33 Typical - pF FCT244/AT CPD § 35 Typical 35 Typical pF Min. (Valley) VOHV During Switching of Other Outputs (Output Under Test Not Switching) VOHV See Figure 1 5 0.5 Typical at +25oC V Max. (Peak) VOLP During Switching of Other Outputs (Output Under Test Not Switching) VOLP See Figure 1 5 1 Typical at +25oC V Input Capacitance CI - - - 10 - 10 - - 10 - 10 pF 3-State Output Capacitance CO - - - 15 - 15 - - 15 - 15 pF † 5V: min. is at 5.5V, max. is at 4.5V. 5V: min. is at 5.25V for 0oC to +70oC, max. is at 4.75V for 0oC to +70oC, typ. is at 5V § CPD, measured per function, is used to determine the dynamic power consumption. PD (per package) = VCC ICC + ∑ (VCC2 fi CPD + VO2 fo CL + VCC ∆ICC D) where: VCC = supply voltage ∆ICC = flow through current x unit load CL = output load capacitance D = duty cycle of input high fo = output frequency fi = input frequency 2 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1999, Texas Instruments Incorporated